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Here is a brief summary of how to invoke as
. For details,
see Comand-Line Options.
as [-a[cdhlns][=file]] [-D] [--defsym sym=val] [-f] [--gstabs] [--gdwarf2] [--help] [-I dir] [-J] [-K] [-L] [--listing-lhs-width=NUM] [--listing-lhs-width2=NUM] [--listing-rhs-width=NUM] [--listing-cont-lines=NUM] [--keep-locals] [-o objfile] [-R] [--statistics] [-v] [-version] [--version] [-W] [--warn] [--fatal-warnings] [-w] [-x] [-Z] [--target-help] [target-options] [--|files ...] Target Alpha options: [-mcpu] [-mdebug | -no-mdebug] [-relax] [-g] [-Gsize] [-F] [-32addr] Target ARC options: [-marc[5|6|7|8]] [-EB|-EL] Target ARM options: [-mcpu=processor[+extension...]] [-march=architecture[+extension...]] [-mfpu=floating-point-fromat] [-mthumb] [-EB|-EL] [-mapcs-32|-mapcs-26|-mapcs-float| -mapcs-reentrant] [-mthumb-interwork] [-moabi] [-k] Target CRIS options: [--underscore | --no-underscore] [--pic] [-N] [--emulation=criself | --emulation=crisaout] Target D10V options: [-O] Target D30V options: [-O|-n|-N] Target i386 options: [--32|--64] Target i960 options: [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB| -AKC|-AMC] [-b] [-no-relax] Target M32R options: [--m32rx|--[no-]warn-explicit-parallel-conflicts| --W[n]p] Target M680X0 options: [-l] [-m68000|-m68010|-m68020|...] Target M68HC11 options: [-m68hc11|-m68hc12] [--force-long-branchs] [--short-branchs] [--strict-direct-mode] [--print-insn-syntax] [--print-opcodes] [--generate-example] Target MCORE options: [-jsri2bsr] [-sifilter] [-relax] [-mcpu=[210|340]] Target MIPS options: [-nocpp] [-EL] [-EB] [-G num] [-mcpu=CPU ] [-mips1] [-mips2] [-mips3] [-mips4] [-mips5] [-mips32] [-mips64] [-m4650] [-no-m4650] [--trap] [--break] [-n] [--emulation=name ] Target MMIX options: [--fixed-special-register-names] [--globalize-symbols] [--gnu-syntax] [--relax] [--no-predefined-symbols] [--no-expand] [--no-merge-gregs] [-x] [--linker-allocated-gregs] Target PDP11 options: [-mpic|-mno-pic] [-mall] [-mno-extensions] [-mextension|-mno-extension] [-mcpu] [-mmachine] Target picoJava options: [-mb|-me] Target PowerPC options: [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604| -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke| -mbooke32|-mbooke64] [-mcom|-many|-maltivec] [-memb] [-mregnames|-mno-regnames] [-mrelocatable|-mrelocatable-lib] [-mlittle|-mlittle-endian|-mbig|-mbig-endian] [-msolaris|-mno-solaris] Target SPARC options: [-Av6|-Av7|-Av8|-Asparclet|-Asparclite -Av8plus|-Av8plusa|-Av9|-Av9a] [-xarch=v8plus|-xarch=v8plusa] [-bump] [-32|-64]
-a[cdhlmns]
-ac
-ad
-ah
-al
-am
-an
-as
=file
You may combine these options; for example, use -aln
for assembly
listing without forms processing. The =file
option, if used, must be
the last one. By itself, -a
defaults to -ahls
.
-D
--defsym sym=value
0x
indicates a hexadecimal value, and a leading 0
indicates an octal value.
-f
--gstabs
--gdwarf2
--help
--target-help
-I dir
.include
directives.
-J
-K
-L
--keep-locals
L
, but different systems have different local
label prefixes.
--listing-lhs-width=number
--listing-lhs-width2=number
--listing-rhs-width=number
--listing-cont-lines=number
-o objfile
as
objfile.
-R
--statistics
--strip-local-absolute
-v
-version
as
version.
--version
as
version and exit.
-W
--no-warn
--fatal-warnings
--warn
-w
-x
-Z
-- | files ...
The following options are available when as is configured for an ARC processor.
-marc[5|6|7|8]
-EB | -EL
The following options are available when as is configured for the ARM processor family.
-mcpu=processor[+extension...]
-march=architecture[+extension...]
-mfpu=floating-point-format
-mthumb
-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi
-EB | -EL
-mthumb-interwork
-k
See the info pages for documentation of the CRIS-specific options.
The following options are available when as is configured for a D10V processor.
-O
The following options are available when as is configured for a D30V processor.
-O
-n
-N
The following options are available when as is configured for the Intel 80960 processor.
-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
-b
-no-relax
The following options are available when as is configured for the Mitsubishi M32R series.
--m32rx
--warn-explicit-parallel-conflicts or --Wp
--no-warn-explicit-parallel-conflicts or --Wnp
The following options are available when as is configured for the Motorola 68000 series.
-l
-m68000 | -m68008 | -m68010 | -m68020 | -m68030
| -m68040 | -m68060 | -m68302 | -m68331 | -m68332
| -m68333 | -m68340 | -mcpu32 | -m5200
-m68881 | -m68882 | -mno-68881 | -mno-68882
-m68851 | -mno-68851
For details about the PDP-11 machine dependent features options, see PDP-11-Options.
-mpic | -mno-pic
-mpic
.
-mall
-mall-extensions
-mno-extensions
-mextension | -mno-extension
-mcpu
-mmachine
The following options are available when as is configured for a picoJava processor.
-mb
-ml
The following options are available when as is configured for the Motorola 68HC11 or 68HC12 series.
-m68hc11 | -m68hc12
--force-long-branchs
-S | --short-branchs
--strict-direct-mode
--print-insn-syntax
--print-opcodes
--generate-example
as
.
The following options are available when as
is configured
for the SPARC architecture:
-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite
-Av8plus | -Av8plusa | -Av9 | -Av9a
-Av8plus
and -Av8plusa
select a 32 bit environment.
-Av9
and -Av9a
select a 64 bit environment.
-Av8plusa
and -Av9a
enable the SPARC V9 instruction set with
UltraSPARC extensions.
-xarch=v8plus | -xarch=v8plusa
-bump
The following options are available when as is configured for a MIPS processor.
-G num
gp
register. It is only accepted for targets that
use ECOFF format, such as a DECstation running Ultrix. The default value is 8.
-EB
-EL
-mips1
-mips2
-mips3
-mips4
-mips32
-mips64
-mips1
corresponds to the R2000 and R3000 processors,
-mips2
to the R6000 processor, and -mips3
to the R4000
processor.
-mips5
, -mips32
, and -mips64
correspond
to generic MIPS V, MIPS32, and MIPS64 ISA
processors, respectively.
-m4650
-no-m4650
mad
and madu
instruction, and to not schedule nop
instructions around accesses to the HI
and LO
registers.
-no-m4650
turns off this option.
-mcpu=CPU
-mcpu
, except that there are more value of cpu
understood.
--emulation=name
as
to emulate as
configured
for some other target, in all respects, including output format (choosing
between ELF and ECOFF only), handling of pseudo-opcodes which may generate
debugging information or store symbol table information, and default
endianness. The available configuration names are: mipsecoff
,
mipself
, mipslecoff
, mipsbecoff
, mipslelf
,
mipsbelf
. The first two do not alter the default endianness from that
of the primary target for which the assembler was configured; the others change
the default to little- or big-endian as indicated by the b
or l
in the name. Using -EB
or -EL
will override the endianness
selection in any case.
This option is currently supported only when the primary target
as
is configured for is a MIPS ELF or ECOFF target.
Furthermore, the primary target or others specified with
--enable-targets=...
at configuration time must include support for
the other format, if both are to be available. For example, the Irix 5
configuration includes support for both.
Eventually, this option will support more configurations, with more
fine-grained control over the assembler's behavior, and will be supported for
more processors.
-nocpp
as
ignores this option. It is accepted for compatibility with
the native tools.
--trap
--no-trap
--break
--no-break
--trap
or --no-break
(which are synonyms) take a trap exception
(and only work for Instruction Set Architecture level 2 and higher);
--break
or --no-trap
(also synonyms, and the default) take a
break exception.
-n
as
will issue a warning every
time it generates a nop instruction from a macro.
The following options are available when as is configured for an MCore processor.
-jsri2bsr
-nojsri2bsr
-nojsri2bsr
can be used to disable it.
-sifilter
-nosifilter
-sifilter
command line option.
-relax
-mcpu=[210|340]
-EB
-EL
See the info pages for documentation of the MMIX-specific options.