This is the mail archive of the
systemtap@sourceware.org
mailing list for the systemtap project.
using utrace for instruction tracing
- From: Dave Nomura <dcnltc at us dot ibm dot com>
- To: Roland McGrath <roland at redhat dot com>
- Cc: "Frank Ch. Eigler" <fche at redhat dot com>, systemtap at sourceware dot org, Maynard Johnson <mpjohn at us dot ibm dot com>, James Keniston <kenistoj at us dot ibm dot com>
- Date: Wed, 05 Sep 2007 15:46:57 -0700
- Subject: using utrace for instruction tracing
- Organization: LTC Power Linux Toolchain
- References: <20070819204722.E3A9A4D058C@magilla.localdomain>
- Reply-to: dcnltc at us dot ibm dot com
I notice that the utrace documentation says that single-stepping is only
supported if ARCH_HAS_SINGLE_STEP/ARCH_HAS_BLOCK_STEP is supported. My
googling found a note you sent the says it is supported on ia64 and ppc,
but not on x86 yet. Any idea if there are any work underway to support
this on x86?
Frank: Is this a unacceptable, or can we live with no user instruction
tracing on x86 until support is added? I'm not very familiar with how
PI ITRACE does single step tracing on x86, for kernel/user code tracing
but I know it is significantly different than the PPC.