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build breakage with gcc-4.7.2

From: Alan Modra <amodra at gmail dot com>
To: sid at sourceware dot org
Date: Sat, 21 Sep 2013 11:27:51 +0930
Subject: build breakage with gcc-4.7.2
Authentication-results: sourceware.org; auth=none
Found when attempting to build sid with gcc-4.7

looser throw specifier for âsome_derived_class destructorâ overriding
âparent_class destructor throw ()â.

âsome_functionâ was not declared in this scope, and no declarations were found by argument-dependent lookup at the point of instantiation [-fpermissive]
note: declarations in dependent base âsome_classâ are not found by unqualified lookup
note: use âthis->some_functionâ instead

OK to apply?

sid/component/cgen-cpu/mep/
	* mep.h (mep_cpu_cgen::~mep_cpu_cgen): New.
	* mep_basic.h (mep_basic_cpu::~mep_basic_cpu): New.
	* mep_ext1.h (mep_ext1_cpu::~mep_ext1_cpu): New.
sid/component/cgen-cpu/sh/
	* sh.h (sh_cpu_impl::~sh_cpu_impl): New.
	* sh2a_model.cxx: Specify dependent base class function with 'this->'.
	* sh3_model.cxx: Likewise.
	* sh4.cxx: Likewise.
	* sh64.c: Include sysdep.h first.
sid/component/gloss/
	* angel.h (arm_angel::~arm_angel): New.
	* m32r.h (m32r_libgloss::~m32r_libgloss): New.
	* mips.h (mips32_idt::~mips32_idt): New.
sid/component/mmu/armRemap.cxx
	* armRemap.cxx (operator<<): Avoid redeclaration of "it".

Index: sid/component/cgen-cpu/mep/mep.h
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/mep/mep.h,v
retrieving revision 1.4
diff -u -p -r1.4 mep.h
--- sid/component/cgen-cpu/mep/mep.h	30 Apr 2009 21:18:37 -0000	1.4
+++ sid/component/cgen-cpu/mep/mep.h	20 Sep 2013 08:33:03 -0000
@@ -91,6 +91,9 @@ namespace mep
 	: cr64_queuelen(0),
 	  ccr_queuelen(0)
         { }
+
+      ~mep_cpu_cgen() throw ()
+        { }
     };
 
   class debugger_bus_with_control_bus_vision :
Index: sid/component/cgen-cpu/mep/mep_basic.h
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/mep/mep_basic.h,v
retrieving revision 1.1
diff -u -p -r1.1 mep_basic.h
--- sid/component/cgen-cpu/mep/mep_basic.h	5 Feb 2007 20:28:40 -0000	1.1
+++ sid/component/cgen-cpu/mep/mep_basic.h	20 Sep 2013 08:33:03 -0000
@@ -26,6 +26,7 @@ namespace mep_basic {
 	this->insn_options[DSP] = false;
 	this->insn_options[UCI] = false;
       }
+    ~mep_basic_cpu () throw () { }
     void core_model_insn_before (bool first_p = true) { my_core_model.model_insn_before (first_p); }
     void core_model_step_latency (sid::host_int_4 cycles = 0) { my_core_model.step_latency (cycles); }
 
Index: sid/component/cgen-cpu/mep/mep_ext1.h
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/mep/mep_ext1.h,v
retrieving revision 1.2
diff -u -p -r1.2 mep_ext1.h
--- sid/component/cgen-cpu/mep/mep_ext1.h	30 Apr 2009 21:18:37 -0000	1.2
+++ sid/component/cgen-cpu/mep/mep_ext1.h	20 Sep 2013 08:33:03 -0000
@@ -36,6 +36,7 @@ namespace mep_ext1 {
       my_cop48_model (this),
       my_cop64_model (this)
     {}
+    ~mep_ext1_cpu() throw() {}
 
     void core_model_insn_before (bool first_p = true) { my_core_model.model_insn_before (first_p); }
     void core_model_step_latency (sid::host_int_4 cycles = 0) { my_core_model.step_latency (cycles); }
Index: sid/component/cgen-cpu/sh/sh.h
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/sh/sh.h,v
retrieving revision 1.2
diff -u -p -r1.2 sh.h
--- sid/component/cgen-cpu/sh/sh.h	13 Aug 2007 14:47:43 -0000	1.2
+++ sid/component/cgen-cpu/sh/sh.h	20 Sep 2013 08:33:05 -0000
@@ -315,6 +315,7 @@ namespace sh
   class sh_cpu_impl: public sh_cpu<CGEN_CPU>
     {
     public:
+      ~sh_cpu_impl() throw() { }
       PCADDR get_fetched_insn_pc () { return this->fetched_insn_pc; }
 
     protected:
Index: sid/component/cgen-cpu/sh/sh2a_model.cxx
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/sh/sh2a_model.cxx,v
retrieving revision 1.1
diff -u -p -r1.1 sh2a_model.cxx
--- sid/component/cgen-cpu/sh/sh2a_model.cxx	18 Oct 2006 18:27:27 -0000	1.1
+++ sid/component/cgen-cpu/sh/sh2a_model.cxx	20 Sep 2013 08:33:05 -0000
@@ -120,9 +120,9 @@ sh2a_model<BASE, CPU, IDESC>::model_u_us
       // LDS.L has a longer pipeline and can execute 1 cycle
       // earlier than other insns.
       if (insn_is_ldsl_mac (idesc) && this->multiply_busy >= 2)
-	set_current_stall (this->multiply_busy - 2);
+	this->set_current_stall (this->multiply_busy - 2);
       else
-	set_current_stall (this->multiply_busy - 1);
+	this->set_current_stall (this->multiply_busy - 1);
     }
 
   return 0;
@@ -134,7 +134,7 @@ sh2a_model<BASE, CPU, IDESC>::model_u_wr
 {
   // Only used by STS and STS.L. Stall until the multiply unit is completely free.
   if (write_back_busy)
-    set_current_stall (this->multiply_busy);
+    this->set_current_stall (this->multiply_busy);
 
   return 0;
 }
Index: sid/component/cgen-cpu/sh/sh3_model.cxx
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/sh/sh3_model.cxx,v
retrieving revision 1.1
diff -u -p -r1.1 sh3_model.cxx
--- sid/component/cgen-cpu/sh/sh3_model.cxx	18 Oct 2006 18:27:27 -0000	1.1
+++ sid/component/cgen-cpu/sh/sh3_model.cxx	20 Sep 2013 08:33:05 -0000
@@ -88,7 +88,7 @@ sh3_model<BASE, CPU, IDESC>::model_u_mac
   UINT extra_cycle = this->model_mac_after (cpu, 3);
 
   // Basic execution cycles for this insn.
-  UINT cycles = unit_cycles (idesc, BASE::UNIT_U_MACW);
+  UINT cycles = this->unit_cycles (idesc, BASE::UNIT_U_MACW);
 
   return cycles + extra_cycle;
 }
@@ -101,7 +101,7 @@ sh3_model<BASE, CPU, IDESC>::model_u_mac
   UINT extra_cycle = this->model_mac_after (cpu, 3);
 
   // Basic execution cycles for this insn.
-  UINT cycles = unit_cycles (idesc, BASE::UNIT_U_MACL);
+  UINT cycles = this->unit_cycles (idesc, BASE::UNIT_U_MACL);
 
   return cycles + extra_cycle;
 }
@@ -111,10 +111,10 @@ UINT
 sh3_model<BASE, CPU, IDESC>::model_u_dmul_after (CPU *cpu, const IDESC *idesc, int unit_num, unsigned long long referenced)
 {
   // MAC model with multiply latency of 3.
-  UINT extra_cycle = model_mac_after (cpu, 3);
+  UINT extra_cycle = this->model_mac_after (cpu, 3);
 
   // Basic execution cycles for this insn.
-  UINT cycles = unit_cycles (idesc, BASE::UNIT_U_DMUL);
+  UINT cycles = this->unit_cycles (idesc, BASE::UNIT_U_DMUL);
 
   return cycles + extra_cycle;
 }
@@ -124,10 +124,10 @@ UINT
 sh3_model<BASE, CPU, IDESC>::model_u_mull_after (CPU *cpu, const IDESC *idesc, int unit_num, unsigned long long referenced)
 {
   // MAC model with multiply latency of 3.
-  UINT extra_cycle = model_mac_after (cpu, 3);
+  UINT extra_cycle = this->model_mac_after (cpu, 3);
 
   // Basic execution cycles for this insn.
-  UINT cycles = unit_cycles (idesc, BASE::UNIT_U_MULL);
+  UINT cycles = this->unit_cycles (idesc, BASE::UNIT_U_MULL);
 
   return cycles + extra_cycle;
 }
Index: sid/component/cgen-cpu/sh/sh4.cxx
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/sh/sh4.cxx,v
retrieving revision 1.1
diff -u -p -r1.1 sh4.cxx
--- sid/component/cgen-cpu/sh/sh4.cxx	18 Oct 2006 18:27:27 -0000	1.1
+++ sid/component/cgen-cpu/sh/sh4.cxx	20 Sep 2013 08:33:05 -0000
@@ -32,25 +32,25 @@ template <class CPU, class CGEN_CPU, cla
 void
 sh4_cpu_base<CPU,CGEN_CPU,IDESC,SCACHE,MODEL>::sh64_ftrv (unsigned n)
 {
-  SF result = sh64_fmuls (this->h_xf_get (0), this->h_frc_get (n));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (4),  this->h_frc_get (n + 1)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (8),  this->h_frc_get (n + 2)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (12), this->h_frc_get (n + 3)));
+  SF result = this->sh64_fmuls (this->h_xf_get (0), this->h_frc_get (n));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (4),  this->h_frc_get (n + 1)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (8),  this->h_frc_get (n + 2)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (12), this->h_frc_get (n + 3)));
   this->h_frc_set (n, result);
-  result = sh64_fmuls (this->h_xf_get (1), this->h_frc_get (n));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (5),  this->h_frc_get (n + 1)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (9),  this->h_frc_get (n + 2)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (13), this->h_frc_get (n + 3)));
+  result = this->sh64_fmuls (this->h_xf_get (1), this->h_frc_get (n));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (5),  this->h_frc_get (n + 1)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (9),  this->h_frc_get (n + 2)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (13), this->h_frc_get (n + 3)));
   this->h_frc_set (n + 1, result);
-  result = sh64_fmuls (this->h_xf_get (2), this->h_frc_get (n));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (6),  this->h_frc_get (n + 1)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (10), this->h_frc_get (n + 2)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (14), this->h_frc_get (n + 3)));
+  result = this->sh64_fmuls (this->h_xf_get (2), this->h_frc_get (n));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (6),  this->h_frc_get (n + 1)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (10), this->h_frc_get (n + 2)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (14), this->h_frc_get (n + 3)));
   this->h_frc_set (n + 2, result);
-  result = sh64_fmuls (this->h_xf_get (3), this->h_frc_get (n));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (7),  this->h_frc_get (n + 1)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (11), this->h_frc_get (n + 2)));
-  result = sh64_fadds (result, sh64_fmuls (this->h_xf_get (15), this->h_frc_get (n + 3)));
+  result = this->sh64_fmuls (this->h_xf_get (3), this->h_frc_get (n));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (7),  this->h_frc_get (n + 1)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (11), this->h_frc_get (n + 2)));
+  result = this->sh64_fadds (result, this->sh64_fmuls (this->h_xf_get (15), this->h_frc_get (n + 3)));
   this->h_frc_set (n + 3, result);
 }
 
Index: sid/component/cgen-cpu/sh/sh64.c
===================================================================
RCS file: /cvs/src/src/sid/component/cgen-cpu/sh/sh64.c,v
retrieving revision 1.1
diff -u -p -r1.1 sh64.c
--- sid/component/cgen-cpu/sh/sh64.c	18 Oct 2006 18:27:28 -0000	1.1
+++ sid/component/cgen-cpu/sh/sh64.c	20 Sep 2013 08:33:05 -0000
@@ -8,8 +8,8 @@
 /* These C functions are not used but needed for static linking.
    We need to refer to the ELF header structure.  */
 
-#include "dis-asm.h"
 #include "sysdep.h"
+#include "dis-asm.h"
 #include "sh64-opc.h"
 #include "libiberty.h"
 #include "elf-bfd.h"
Index: sid/component/gloss/angel.h
===================================================================
RCS file: /cvs/src/src/sid/component/gloss/angel.h,v
retrieving revision 1.2
diff -u -p -r1.2 angel.h
--- sid/component/gloss/angel.h	10 Oct 2001 17:19:16 -0000	1.2
+++ sid/component/gloss/angel.h	20 Sep 2013 08:33:07 -0000
@@ -35,6 +35,7 @@ class arm_angel: public gloss32
 public:
 
   arm_angel();
+  ~arm_angel() throw() { }
 
 private:
 
Index: sid/component/gloss/m32r.h
===================================================================
RCS file: /cvs/src/src/sid/component/gloss/m32r.h,v
retrieving revision 1.2
diff -u -p -r1.2 m32r.h
--- sid/component/gloss/m32r.h	3 Jan 2002 01:42:02 -0000	1.2
+++ sid/component/gloss/m32r.h	20 Sep 2013 08:33:07 -0000
@@ -15,6 +15,7 @@ class m32r_libgloss: public gloss32
 public:
 
   m32r_libgloss();
+  ~m32r_libgloss() throw() { }
 
 private:
 
Index: sid/component/gloss/mips.h
===================================================================
RCS file: /cvs/src/src/sid/component/gloss/mips.h,v
retrieving revision 1.1
diff -u -p -r1.1 mips.h
--- sid/component/gloss/mips.h	7 Dec 2000 19:30:50 -0000	1.1
+++ sid/component/gloss/mips.h	20 Sep 2013 08:33:07 -0000
@@ -18,6 +18,7 @@ class mips32_idt: public gloss32
 public:
 
   mips32_idt();
+  ~mips32_idt() throw() { }
 
 private:
 
Index: sid/component/mmu/armRemap.cxx
===================================================================
RCS file: /cvs/src/src/sid/component/mmu/armRemap.cxx,v
retrieving revision 1.3
diff -u -p -r1.3 armRemap.cxx
--- sid/component/mmu/armRemap.cxx	1 Mar 2006 21:07:01 -0000	1.3
+++ sid/component/mmu/armRemap.cxx	20 Sep 2013 08:33:07 -0000
@@ -392,14 +392,14 @@ ostream& operator<< (ostream& op, const 
      << " num-relocs " << static_cast<unsigned int> (obj.num_relocations)
      << " relocs ";
 
-  for (armRemapPause::entry_t::const_iterator it = obj.entries.begin();
-       it != obj.entries.end();
-       it++)
+  for (armRemapPause::entry_t::const_iterator ie = obj.entries.begin();
+       ie != obj.entries.end();
+       ie++)
     {
-      op << make_attribute(it->second.first) << ",";    // start address
-      op << make_attribute(it->second.second) << ",";   // end address
+      op << make_attribute(ie->second.first) << ",";    // start address
+      op << make_attribute(ie->second.second) << ",";   // end address
       
-      host_int_4 start_addr = it->second.first;
+      host_int_4 start_addr = ie->second.first;
       armRemapPause::translation_t::const_iterator it = obj.translations.find(start_addr);
       assert(it != obj.translations.end());
       op << it->second << " ";                          // relocated address

-- 
Alan Modra
Australia Development Lab, IBM
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