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Re: Level sensitive ARM interrupts
Robert Shideleff <bigbob@shideleff.com> writes:
> This patch makes arm interrupts level sensitive, as they are in hardware.
> The nirq and nfiq pins are no longer callbacks, but rather simple input
> pins. They are 'pulled' to high at processor invocation and reset. Their
> level is 'sense()-ed' at the beginning of each step.
>
> The patch file was taken from within the sid/component/cgen-cpu/arm7t
> directory.
>
> This is necessary for proper operation of eCos, and for the ability to
> model interrupts as they occur in actual hardware.
There are a number of ARM-related interrupt tests which, from
recollection, passed. Does your patch suggest that the tests are
wrong? If so, can you update them, too?
Ben