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Re: best options for a wide bus?
- To: Paul Miach <paul dot miach at edion dot com>
- Subject: Re: best options for a wide bus?
- From: Ben Elliston <bje at redhat dot com>
- Date: Fri, 5 Jan 2001 15:20:36 +1100 (EST)
- Cc: <sid at sources dot redhat dot com>
Hi Paul,
I am looking at getting SID to simulate a bus architecture with busses
wider than 32 bits, ideally busses that are a little over 64 bits wide
[...]
- Use multiple 32 bit busses to reach the required width
- Use "memory" as a pseudo bus
- Extend the bus object/component to cope with more than 32 bits.
In terms of performance (simulator time) and ease of implementation,
what are the trade off in each of the above?
The first two options are easier to implement (since you can do it using
existing facilities). Both of these options will require twice as many "bus
transactions" as a proper 64+ bit bus. They also suffer from less obvious
behaviour and, in the case of option 1, will probably limit your component's
usefulness to anyone who doesn't have a similar interface to components they
may wish to connect to yours.
Implementing a proper 64-bit (or greater) bus requires careful
implementation on "smaller" hosts, but since it will be needed sooner or
later for many other components, I believe it's the right way to go.
If you'd like to take a crack at extending the bus class, I'd be glad to
offer any assistance.
Cheers, Ben