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Hi Jeff, Thanks for committing this patch so quickly. Unfortunately there's a small mistake in the patch I submitted (totally my fault) that was picked up by one of our builds this morning. I've attached a fix to the problem (one line fix). newlib/newlib/Changelog 2013-11-27 Matheus Almeida <Matheus.Almeida@imgtec.com> * libc/machine/mips/setjmp.S: Fix definition of macro FPR_LAYOUT for ABI == N32. Regards, Matheus -----Original Message----- From: Jeff Johnston [mailto:jjohnstn@redhat.com] Sent: 26 November 2013 19:59 To: Matheus Almeida Cc: newlib@sourceware.org; Doug Gilmore Subject: Re: [Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp Patch checked in. In the future, please add a ChangeLog entry so I don't have to make one up for you. -- Jeff J. ----- Original Message ----- From: "Matheus Almeida" <Matheus.Almeida@imgtec.com> To: newlib@sourceware.org Cc: "Doug Gilmore" <Doug.Gilmore@imgtec.com> Sent: Tuesday, November 26, 2013 6:30:04 AM Subject: [Patch, mips]: Add support for FR=1/o32. Update implemention of setjmp/longjmp Mips allow the width of FPU registers to be controlled by specifying the FR configuration bit: FR=0 -> 32-bit FPU registers FR=1 -> 64-bit FPU registers This can be controlled by -mfp32/-mfp64 command line options. This patch updates the definition of setjmp, longjmp and jmp_buf so that on a call to setjmp/longjmp, all the required floating-point callee-saved registers are properly saved/restored. We are aware that updating the size of jmp_buf can potentially break existing applications but we expect the number of applications built with FR=1 mode to be very small, possibly zero. Nevertheless this should be clearly stated in the release notes that existing applications built with FR=1 (-mfp64) need to be recompiled in order to use new versions of the library. Regards, Matheus Matheus Almeida MIPS processor IP www.imgtec.com
Attachment:
fix_fp64setjmp.diff
Description: fix_fp64setjmp.diff
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