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Re: [patch] fix up mips libgloss bogons.


Patch checked in.  Thanks.

-- Jeff J.

cgd@broadcom.com wrote:
The following patch:

* checks for 32 or 64-bit mips using the __mips64 define rather than
by checking (__mips < 3). Given that MIPS32 and MIPS32r2 exist,
there are "32-bit MIPS" isas with __mips values > 32. Plus, i
believe that checking __mips64 is actually the normal way of
checking for a machine w/ 64-bit GPRs. 8-) Note that the change to
crt0.S isn't _strictly_ necessary right now, as all 32-bit MIPS
arches also set __mips_fpr==32 ("for now" 8-), but better to clean
up all of the bad code in one go.

* avoids multi-line string literals, which trunk gcc doesn't seem to
allow anymore.

checked w/ mipsisa32-elf (hacked to use EABI rather than MEABI as
default ABI, since the latter seems broken), and mipsisa32r2-elf
(before i changed it to act like mipsisa32-elf; i compiled pmon.S
accidentally, was getting unsupported instructions, and that's how i
noticed the problem. 8-)



cgd
--
2002-01-06 Chris Demetriou <cgd@broadcom.com>

* crt0.S: Check for definition of __mips64 rather than
checking (__mips < 3).
* pmon.S: Likewise.

* cygmon.c (sysCall): Avoid multi-line string literals.

diff -rup combined.CLEAN/libgloss/mips/crt0.S combined/libgloss/mips/crt0.S
--- combined.CLEAN/libgloss/mips/crt0.S Tue Nov 12 15:14:24 2002
+++ combined/libgloss/mips/crt0.S Fri Jan 3 17:45:15 2003
@@ -66,7 +66,7 @@ _start:
nop
move s0,$31
#endif
-#if (__mips < 3) || (__mips_fpr==32)
+#if !defined(__mips64) || (__mips_fpr==32)
#define STATUS_MASK (SR_CU1|SR_PE)
#else
# For mips3 or mips4, turn on 64-bit addressing and additional float regs
diff -rup combined.CLEAN/libgloss/mips/cygmon.c combined/libgloss/mips/cygmon.c
--- combined.CLEAN/libgloss/mips/cygmon.c Tue Nov 12 15:14:24 2002
+++ combined/libgloss/mips/cygmon.c Fri Jan 3 17:46:42 2003
@@ -60,13 +60,13 @@ struct s_mem
int sysCall(unsigned long func, unsigned long p1, unsigned long p2, unsigned long p3)
{
int ret = 0;
- asm volatile ( "
- move $4, %1
- move $5, %2
- move $6, %3
- move $7, %4
- syscall - nop
+ asm volatile ( " \n\
+ move $4, %1 \n\
+ move $5, %2 \n\
+ move $6, %3 \n\
+ move $7, %4 \n\
+ syscall \n\
+ nop \n\
move %0, $2" : "=r"(ret) : "r"(func), "r"(p1), "r"(p2), "r"(p3));
return ret;
}
diff -rup combined.CLEAN/libgloss/mips/pmon.S combined/libgloss/mips/pmon.S
--- combined.CLEAN/libgloss/mips/pmon.S Tue Nov 12 15:14:24 2002
+++ combined/libgloss/mips/pmon.S Fri Jan 3 17:45:37 2003
@@ -19,7 +19,7 @@
.set nomips16
#endif
-#if __mips < 3
+#if !defined(__mips64)
/* This machine does not support 64-bit operations. */
#define ADDU addu
#define SUBU subu



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