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Re: [patches] Re: [PATCH v4 08/17] RISC-V: Generic <math.h> and soft-fp Routines


On Mon, 22 Jan 2018, Palmer Dabbelt wrote:

> > > diff --git a/sysdeps/riscv/math-tests.h b/sysdeps/riscv/math-tests.h
> > 
> > > +#define EXCEPTION_TESTS_float 0
> > > +#define EXCEPTION_TESTS_double        0
> > > +#define EXCEPTION_TESTS_long_double   0
> > 
> > I'd expect that to be conditional on soft-float, as exceptions should be
> > supported for hard-float (whether the hard-float or soft-float ABI is
> > used).  I'd also expect ROUNDING_TESTS_* to be defined to ((MODE) ==
> > FE_TONEAREST) for soft-float, as on other architectures, given that
> > rounding modes are only supported for hard-float.
> 
> The RISC-V ISA doesn't support taking traps on floating-point exceptions, just
> polling the flags register.  My understanding was that we should be
> unconditionally setting these flags, but if I'm wrong we'll go through and
> change it.

EXCEPTION_TESTS_* are not about traps, they're about raising/testing the 
exception flags.  It's EXCEPTION_ENABLE_SUPPORTED that's about trapping on 
floating-point exceptions (along with EXCEPTION_SET_FORCES_TRAP for those 
architectures that support trapping and where explicitly setting an 
exception flag automatically causes a trap).

-- 
Joseph S. Myers
joseph@codesourcery.com


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