Re: [RFC][PATCH 0/2] aarch64: Add optimized ASIMD versions of sinf/cosf

["Sekhar, Ashwin" <Ashwin dot Sekhar at cavium dot com>]

On Tue, 2017-06-13 at 10:33 +0000, Sekhar, Ashwin wrote:
> Hi Siddhesh,
> > 
> > > 
> > > > 
> > > > 
> > > >  
> > > Thank you for doing this.  Please:
> > > 
> > > 1. Explain why you chose these input values as optimization
> > > targets
> > > and
> > The algorithm splits the inputs into different intervals and uses
> > different code paths for these different intervals. The input
> > values
> > I
> > chose covers all these code paths.
> > 
> > > 
> > > 
> > > 2. Write a microbenchmark test for glibc
> > Sure. Will share this via github.
> Please find the microbenchmark code at 
> https://github.com/ashwinyes/glibc_microbenchmarks/blob/master/sinf/s
> in
> f_benchmark.c

Forgot to mention. The benchmark code uses PMU cycles counter to
measure the number of cycles. Please follow section "38.2.2. High-
resolution cycle counter" in the DPDK guide at http://dpdk.org/doc/guid
es/prog_guide/profile_app.html to enable the access to PMU cycle counter from userspace.

> Thanks 
> Ashwin
> > 
> >  
> > >