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Re: [PATCH 1/3] Guess L1 cache linesize for aarch64
- From: Siddhesh Poyarekar <siddhesh at gotplt dot org>
- To: Richard Henderson <rth at twiddle dot net>, libc-alpha at sourceware dot org
- Cc: Marcus Shawcroft <marcus dot shawcroft at arm dot com>
- Date: Fri, 9 Jun 2017 11:21:25 +0530
- Subject: Re: [PATCH 1/3] Guess L1 cache linesize for aarch64
- Authentication-results: sourceware.org; auth=none
- References: <20170608225728.26779-1-rth@twiddle.net> <20170608225728.26779-2-rth@twiddle.net>
On Friday 09 June 2017 04:27 AM, Richard Henderson wrote:
> Using the cache hierarchy linesize minimum in CTR_EL0.
> See the comment within the code for rationale.
>
> * sysdeps/unix/sysv/linux/aarch64/sysconf.c: New file.
>
Looks good to me.
Thanks,
Siddhesh