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[PATCH 02/05] Math optimizations for POWER8


This patch add a optimized isinf/isinff implementation for POWER8 using
the new Move From VSR Doubleword instruction to gains some cycles from
FP to GRP register move.

---

2014-02-17  Adhemerval Zanella  <azanella@linux.vnet.ibm.com>

        * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add isinf power8
	implementation.
        * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S: New file:
	POWER8 isinf ifunc implementation.
        * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c (__isinf): Add
	POWER8 implementation.
        * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c (__isinff):
	Likewise.
	* sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: New file:
	POWER8 isinf implementation.
	* sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S: New file.

--

diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile b/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile
index 124d325..abbf7d0 100644
--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile
+++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile
@@ -4,7 +4,8 @@ sysdep_routines += s_isnan-power7 s_isnan-power6x s_isnan-power6 \
 		   s_copysign-ppc64 s_finite-power7 s_finite-ppc64 \
 		   s_finitef-ppc64 s_isinff-ppc64 s_isinf-power7 \
 		   s_isinf-ppc64 s_modf-power5+ s_modf-ppc64 \
-		   s_modff-power5+ s_modff-ppc64 s_isnan-power8
+		   s_modff-power5+ s_modff-ppc64 s_isnan-power8 \
+		   s_isinf-power8
 
 libm-sysdep_routines += s_isnan-power7 s_isnan-power6x s_isnan-power6 \
 			s_isnan-power5 s_isnan-ppc64 s_llround-power6x \
@@ -22,7 +23,7 @@ libm-sysdep_routines += s_isnan-power7 s_isnan-power6x s_isnan-power6 \
 			s_logbl-ppc64 s_modf-power5+ s_modf-ppc64 \
 			s_modff-power5+ s_modff-ppc64 e_hypot-ppc64 \
 			e_hypot-power7 e_hypotf-ppc64 e_hypotf-power7 \
-			s_isnan-power8
+			s_isnan-power8 s_isinf-power8
 
 CFLAGS-s_logbf-power7.c = -mcpu=power7
 CFLAGS-s_logbl-power7.c = -mcpu=power7
diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S
new file mode 100644
index 0000000..5892929
--- /dev/null
+++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S
@@ -0,0 +1,33 @@
+/* isinf().  PowerPC64/POWER8 version.
+   Copyright (C) 2013 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+#undef hidden_def
+#define hidden_def(name)
+#undef weak_alias
+#define weak_alias(name, alias)
+#undef strong_alias
+#define strong_alias(name, alias)
+#undef compat_symbol
+#define compat_symbol(lib, name, alias, ver)
+
+#define __isinf __isinf_power8
+
+#include <sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S>
diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c
index 1ee230b..e349a06 100644
--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c
+++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c
@@ -23,10 +23,13 @@
 
 extern __typeof (__isinf) __isinf_ppc64 attribute_hidden;
 extern __typeof (__isinf) __isinf_power7 attribute_hidden;
+extern __typeof (__isinf) __isinf_power8 attribute_hidden;
 
 libc_ifunc (__isinf,
-	    (hwcap & PPC_FEATURE_ARCH_2_06)
-	    ? __isinf_power7
+	    (hwcap2 & PPC_FEATURE2_ARCH_2_07)
+	    ? __isinf_power8 :
+	      (hwcap & PPC_FEATURE_ARCH_2_06)
+	      ? __isinf_power7
             : __isinf_ppc64);
 
 weak_alias (__isinf, isinf)
diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c
index 1336feb..71da7a3 100644
--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c
+++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c
@@ -24,10 +24,13 @@
 extern __typeof (__isinff) __isinff_ppc64 attribute_hidden;
 /* The double-precision version also works for single-precision.  */
 extern __typeof (__isinff) __isinf_power7 attribute_hidden;
+extern __typeof (__isinff) __isinf_power8 attribute_hidden;
 
 libc_ifunc (__isinff,
-	    (hwcap & PPC_FEATURE_ARCH_2_06)
-	    ? __isinf_power7
+	    (hwcap2 & PPC_FEATURE2_ARCH_2_07)
+	    ? __isinf_power8 :
+	      (hwcap & PPC_FEATURE_ARCH_2_06)
+	      ? __isinf_power7
             : __isinff_ppc64);
 
 weak_alias (__isinff, isinff)
diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S
new file mode 100644
index 0000000..e054db9
--- /dev/null
+++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S
@@ -0,0 +1,60 @@
+/* isinf().  PowerPC64/POWER8 version.
+   Copyright (C) 2013 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+/* int [r3] __isinf([fp1] x)  */
+
+	.machine    power8
+EALIGN (__isinf, 4, 0)
+	CALL_MCOUNT 0
+	mfvsrd  r3,v1         /* r3 = fp1 bitwise  */
+	lis	r9,0x7ff0     /* r9 = 0x7ff0  */
+	rldicl	r10,r3,0,1    /* r10 = r3 & (0x8000000000000000)  */
+	sldi	r9,r9,32      /* r9 = r9 << 52  */
+	cmpd	cr7,r10,r9    /* fp1 & 0x7ff0000000000000 ?  */
+	beq	cr7,L(inf)
+	li	r3,0          /* Not inf  */
+	blr
+L(inf):
+	sradi   r3,r3,63      /* r3 = r3 >> 63  */
+	ori     r3,r3,1       /* r3 = r3 | 0x1  */
+	blr
+END (__isinf)
+
+hidden_def (__isinf)
+weak_alias (__isinf, isinf)
+
+/* It turns out that the 'double' version will also always work for
+   single-precision.  */
+strong_alias (__isinf, __isinff)
+hidden_def (__isinff)
+weak_alias (__isinff, isinff)
+
+#ifdef NO_LONG_DOUBLE
+strong_alias (__isinf, __isinfl)
+weak_alias (__isinf, isinfl)
+#endif
+
+#ifndef IS_IN_libm
+# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0)
+compat_symbol (libc, __isinf, __isinfl, GLIBC_2_0);
+compat_symbol (libc, isinf, isinfl, GLIBC_2_0);
+# endif
+#endif
diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S
new file mode 100644
index 0000000..be759e0
--- /dev/null
+++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S
@@ -0,0 +1 @@
+/* This function uses the same code as s_isinf.S.  */


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