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Re: [PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Dmitrieva Liubov <liubov dot dmitrieva at gmail dot com>
- Cc: Ondřej Bílka <neleai at seznam dot cz>, GNU C Library <libc-alpha at sourceware dot org>
- Date: Wed, 19 Jun 2013 13:36:23 -0700
- Subject: Re: [PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.
- References: <CAHjhQ93=uegeZg9iTqoJ+PFuUrvn8e2mA8tZ96Jy4CaV6aPbWg at mail dot gmail dot com> <20130617163729 dot GA15981 at domone dot kolej dot mff dot cuni dot cz> <CAHjhQ93zmP525hqW-2RnHBREc_949XLnm7sE-CSv3Nj8PQgUig at mail dot gmail dot com> <CAMe9rOqT31AFq1S3V0Krh2CZnHu=FiyXqhg840fimRtfU4_hXQ at mail dot gmail dot com> <20130618064910 dot GA19972 at domone dot kolej dot mff dot cuni dot cz> <CAHjhQ90Fc0kdZfQrUwLwpKbz2va4X9rzf1EkGD-s-RH-iF7guQ at mail dot gmail dot com> <CAHjhQ92qfjdKZthqAwxCVuCnLqDr2stdEbQpne5rKhzJPeN_cQ at mail dot gmail dot com>
On Wed, Jun 19, 2013 at 12:44 PM, Dmitrieva Liubov
<liubov.dmitrieva@gmail.com> wrote:
> My patch is ready. Ok to commit?
>
> Change Log.
>
> 2013-06-19 Liubov Dmitrieva <liubov.dmitrieva@intel.com>
>
> * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
> Set bit_Slow_SSE4_2 for Intel Silvermont architecture.
> Set bit_Prefer_PMINUB_for_stringop for Intel Silvermont.
> * sysdeps/x86_64/multiarch/init-arch.h: Define
> bit_Slow_SSE4_2 and index_Slow_SSE4_2.
> Define index_Prefer_PMINUB_for_stringop which was undefined.
> * sysdeps/x86_64/multiarch/strchr.S: Use SSE2 version if
> bit_Slow_SSE4_2 is on.
> * sysdeps/x86_64/multiarch/strrchr.S: Use SSE2 version if
> bit_Slow_SSE4_2 is on.
> * sysdeps/x86_64/multiarch/strcmp.S: Use SSSE3 or SSE2 version if
> bit_Slow_SSE4_2 is on.
>
>
Your change ignores bit_Slow_BSF when bit_Slow_SSE4_2
is set in strchr.S and strrchr.S. You should always check
bit_Slow_SSE4_2 before bit_SSE4_2. If bit_Slow_SSE4_2
is set, you should skip bit_SSE4_2 and move to next.
--
H.J.