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Re: [PATCH] powerpc: Use generic memset for RTLD for ppc32/64

We use a cache-based instruction (dcbz) to optimize memset when it's
called with a 0 value (bzero). In short, we clear 128 bytes in a row and
move to the next iteration.

Since PPCA2 has a different cache-line size, this assumption isn't valid
anymore. So we will end up cleaning less than those 128 bytes and will
jump to the next iteration thinking we've cleared 128 bytes.

This is really the only problem with the current generic memset code and
PPCA2. The other scenarios would work ok since they don't use dcbz.


On Mon, 2010-09-27 at 22:58 -0400, Ulrich Drepper wrote:
> On Mon, Sep 27, 2010 at 13:14, Luis Machado <> wrote:
> > The usual cache line size for the POWER server processors is 128 bytes.
> > PPCA2 has a different size, and thus we can't use our current generic
> > memset code (powerpc/powerpc[32|64]/memset.S) as a base for RTLD's
> > memset since it assumes cache-line size to be 128 bytes.
> What does "can't use" mean?
> memset mustn't exceed the buffer limits at either the low or high end
> of the buffer.  Therefore the cache line size can really only be used
> for optimization purposes but not for functional changes.  As opposed
> to, say, memchr where we can overread the buffer if we disregard the
> invalid bytes.

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