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Re: [PATCH][BZ #5768 fix SIGFPE in isnan(0 for SNaN
- From: Daniel Jacobowitz <drow at false dot org>
- To: munroesj at us dot ibm dot com
- Cc: GLIBC-alpha <libc-alpha at sources dot redhat dot com>, "Ryan S. Arnold" <rsa at us dot ibm dot com>
- Date: Mon, 18 Feb 2008 19:02:59 -0500
- Subject: Re: [PATCH][BZ #5768 fix SIGFPE in isnan(0 for SNaN
- References: <1203377225.9440.31.camel@spokane1.rchland.ibm.com>
On Mon, Feb 18, 2008 at 05:27:05PM -0600, Steven Munroe wrote:
> The attached patch fixes a problem we found in PPC where GCC4.1+ code
> motion rearranges the inline asm macros for isnan(). GCC moves the
> (x==x) after the original fpscr (with FE_INVALID enabled) is restored.
> If a Signaling NaN is passed we will get a SIGFPE.
Isn't moving a potentially trapping computation across a volatile asm
a gcc bug?
--
Daniel Jacobowitz
CodeSourcery