Re: [PATCH] hp-timing for ppc32/64

[Steve Munroe <sjmunroe at us dot ibm dot com>]

Kumar Gala <kumar.gala@freescale.com> wrote on 10/17/2005 11:00:23 AM:

> 
> On Oct 17, 2005, at 10:47 AM, Steve Munroe wrote:
> 
> > libc-alpha-owner@sources.redhat.com wrote on 10/15/2005 11:21:09 AM:
> >
> >
> >> Steve,
> >>
> >> Is there any advantage to having access to a higher frequency counter
> >> than the time base if it exists in the CPU for this functionality?
> >>
> >>
> >
> > I am using the timebase register per the PowerPC Architecture.
> >
> > What timer would have a higher frequency then CPU_clock/8 ? Which 
> > is the
> >
> > timebase for all the POWER3/POWER4/POWER5/970 implementations.
> > Especially
> > as the accessing the timebase requires at least 10 cycles!
> >
> > I would like to avoid non-standard implementations.
> 
> On Freescale Book-e parts we have added the concept of an 'alternate 
> timebase' which has the ability to tick at a higher frequency that 
> the normal time base.  So far we have made it a cycle counter. 
> Obviously, there is a bit of skew in accessing it, but its a much 
> faster counter than the TB.  I wasn't sure if that was at all helpful 
> for the hp-timing support or not.
> 
For the extra 3 bits or resolution I don't see the adavantage. In fact I 
suspect you will only see more jitter in the results from the alternate 
timebase and the averages will come out the same as the architected 
timebase.

> Agree, by default we should use the TB since the majority of PPCs 
> have support for it.  Just wondering if there was any value in using 
> something even faster if it existed.
> 
For the powerpc32/powerpc64 target we will stick to the PowerPC 
architected timebase. If you want to negotiate additional canonical target 
names for your booke stuff, knock yourself out.



Steven J. Munroe
Linux on Power Toolchain Architect
IBM Corporation, Linux Technology Center

> - kumar
>