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GNU C Library master sources branch master updated. glibc-2.25-613-ga37b5da
- From: stli at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 27 Jun 2017 15:11:19 -0000
- Subject: GNU C Library master sources branch master updated. glibc-2.25-613-ga37b5da
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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=a37b5daa6bc7fbcbbc229b2549a161fa15023f41
commit a37b5daa6bc7fbcbbc229b2549a161fa15023f41
Author: Stefan Liebler <stli@linux.vnet.ibm.com>
Date: Tue Jun 27 17:09:43 2017 +0200
S390: Use cu21 instruction for converting from utf16 to utf8.
This patch adds an ifunc variant to use the cu instruction on arch12 CPUs.
This new ifunc variant can be built if binutils support z13 vector
instructions. At runtime, HWCAP_S390_VXE decides if we can use the
cu21 instruction.
ChangeLog:
* sysdeps/s390/utf8-utf16-z9.c (__to_utf8_loop_vx_cu):
Use vector and cu21 instruction.
* sysdeps/s390/multiarch/utf8-utf16-z9.c:
Add __to_utf8_loop_vx_cu in ifunc resolver.
diff --git a/ChangeLog b/ChangeLog
index 62aacea..8ef682a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,12 @@
2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+ * sysdeps/s390/utf8-utf16-z9.c (__to_utf8_loop_vx_cu):
+ Use vector and cu21 instruction.
+ * sysdeps/s390/multiarch/utf8-utf16-z9.c:
+ Add __to_utf8_loop_vx_cu in ifunc resolver.
+
+2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+
* sysdeps/s390/utf16-utf32-z9.c (__from_utf16_loop_vx_cu):
Use vector and cu24 instruction.
diff --git a/sysdeps/s390/multiarch/utf8-utf16-z9.c b/sysdeps/s390/multiarch/utf8-utf16-z9.c
index b55ef1a..1252281 100644
--- a/sysdeps/s390/multiarch/utf8-utf16-z9.c
+++ b/sysdeps/s390/multiarch/utf8-utf16-z9.c
@@ -41,8 +41,10 @@ s390_libc_ifunc_expr (FROM_LOOP_DEFAULT, FROM_LOOP,
: FROM_LOOP_DEFAULT);
s390_libc_ifunc_expr (TO_LOOP_DEFAULT, TO_LOOP,
- (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
- ? TO_LOOP_VX
- : TO_LOOP_DEFAULT);
+ (HAVE_TO_VX_CU && (hwcap & HWCAP_S390_VXE))
+ ? TO_LOOP_VX_CU
+ : (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
+ ? TO_LOOP_VX
+ : TO_LOOP_DEFAULT);
#include <iconv/skeleton.c>
diff --git a/sysdeps/s390/utf8-utf16-z9.c b/sysdeps/s390/utf8-utf16-z9.c
index 42163e7..8486682 100644
--- a/sysdeps/s390/utf8-utf16-z9.c
+++ b/sysdeps/s390/utf8-utf16-z9.c
@@ -52,9 +52,11 @@
#if defined HAVE_S390_VX_ASM_SUPPORT && defined USE_MULTIARCH
# define HAVE_FROM_VX 1
# define HAVE_TO_VX 1
+# define HAVE_TO_VX_CU 1
#else
# define HAVE_FROM_VX 0
# define HAVE_TO_VX 0
+# define HAVE_TO_VX_CU 0
#endif
#if defined HAVE_S390_VX_GCC_SUPPORT
@@ -817,6 +819,121 @@ gconv_end (struct __gconv_step *data)
# define TO_LOOP_VX NULL
#endif /* HAVE_TO_VX != 1 */
+#if HAVE_TO_VX_CU == 1
+#define BODY_TO_VX_CU \
+ { \
+ register const unsigned char* pInput asm ("8") = inptr; \
+ register size_t inlen asm ("9") = inend - inptr; \
+ register unsigned char* pOutput asm ("10") = outptr; \
+ register size_t outlen asm ("11") = outend - outptr; \
+ unsigned long tmp, tmp2, tmp3; \
+ asm volatile (".machine push\n\t" \
+ ".machine \"z13\"\n\t" \
+ ".machinemode \"zarch_nohighgprs\"\n\t" \
+ /* Setup to check for values <= 0x7f. */ \
+ " larl %[R_TMP],9f\n\t" \
+ " vlm %%v30,%%v31,0(%[R_TMP])\n\t" \
+ CONVERT_32BIT_SIZE_T ([R_INLEN]) \
+ CONVERT_32BIT_SIZE_T ([R_OUTLEN]) \
+ /* Loop which handles UTF-16 chars <=0x7f. */ \
+ "0: clgijl %[R_INLEN],32,20f\n\t" \
+ " clgijl %[R_OUTLEN],16,20f\n\t" \
+ "1: vlm %%v16,%%v17,0(%[R_IN])\n\t" \
+ " lghi %[R_TMP2],0\n\t" \
+ /* Check for > 1byte UTF-8 chars. */ \
+ " vstrchs %%v19,%%v16,%%v30,%%v31\n\t" \
+ " jno 10f\n\t" /* Jump away if not all bytes are 1byte \
+ UTF8 chars. */ \
+ " vstrchs %%v19,%%v17,%%v30,%%v31\n\t" \
+ " jno 11f\n\t" /* Jump away if not all bytes are 1byte \
+ UTF8 chars. */ \
+ /* Shorten to UTF-8. */ \
+ " vpkh %%v18,%%v16,%%v17\n\t" \
+ " la %[R_IN],32(%[R_IN])\n\t" \
+ " aghi %[R_INLEN],-32\n\t" \
+ /* Store 16 bytes to buf_out. */ \
+ " vst %%v18,0(%[R_OUT])\n\t" \
+ " aghi %[R_OUTLEN],-16\n\t" \
+ " la %[R_OUT],16(%[R_OUT])\n\t" \
+ " clgijl %[R_INLEN],32,20f\n\t" \
+ " clgijl %[R_OUTLEN],16,20f\n\t" \
+ " j 1b\n\t" \
+ /* Setup to check for ch > 0x7f. (v30, v31) */ \
+ "9: .short 0x7f,0x7f,0x0,0x0,0x0,0x0,0x0,0x0\n\t" \
+ " .short 0x2000,0x2000,0x0,0x0,0x0,0x0,0x0,0x0\n\t" \
+ /* At least one byte is > 0x7f. \
+ Store the preceding 1-byte chars. */ \
+ "11: lghi %[R_TMP2],16\n\t" /* match was found in v17. */ \
+ "10: vlgvb %[R_TMP],%%v19,7\n\t" \
+ /* Shorten to UTF-8. */ \
+ " vpkh %%v18,%%v16,%%v17\n\t" \
+ " ar %[R_TMP],%[R_TMP2]\n\t" /* Number of in bytes. */ \
+ " srlg %[R_TMP3],%[R_TMP],1\n\t" /* Number of out bytes. */ \
+ " ahik %[R_TMP2],%[R_TMP3],-1\n\t" /* Highest index to store. */ \
+ " jl 20f\n\t" \
+ " vstl %%v18,%[R_TMP2],0(%[R_OUT])\n\t" \
+ /* Update pointers. */ \
+ " la %[R_IN],0(%[R_TMP],%[R_IN])\n\t" \
+ " slgr %[R_INLEN],%[R_TMP]\n\t" \
+ " la %[R_OUT],0(%[R_TMP3],%[R_OUT])\n\t" \
+ " slgr %[R_OUTLEN],%[R_TMP3]\n\t" \
+ /* Handles UTF16 surrogates with convert instruction. */ \
+ "20: cu21 %[R_OUT],%[R_IN],1\n\t" \
+ " jo 0b\n\t" /* Try vector implemenation again. */ \
+ " lochil %[R_RES],%[RES_OUT_FULL]\n\t" /* cc == 1. */ \
+ " lochih %[R_RES],%[RES_IN_ILL]\n\t" /* cc == 2. */ \
+ ".machine pop" \
+ : /* outputs */ [R_IN] "+a" (pInput) \
+ , [R_INLEN] "+d" (inlen), [R_OUT] "+a" (pOutput) \
+ , [R_OUTLEN] "+d" (outlen), [R_TMP] "=a" (tmp) \
+ , [R_TMP2] "=d" (tmp2), [R_TMP3] "=a" (tmp3) \
+ , [R_RES] "+d" (result) \
+ : /* inputs */ \
+ [RES_OUT_FULL] "i" (__GCONV_FULL_OUTPUT) \
+ , [RES_IN_ILL] "i" (__GCONV_ILLEGAL_INPUT) \
+ : /* clobber list */ "memory", "cc" \
+ ASM_CLOBBER_VR ("v16") ASM_CLOBBER_VR ("v17") \
+ ASM_CLOBBER_VR ("v18") ASM_CLOBBER_VR ("v19") \
+ ASM_CLOBBER_VR ("v30") ASM_CLOBBER_VR ("v31") \
+ ); \
+ inptr = pInput; \
+ outptr = pOutput; \
+ \
+ if (__glibc_likely (inlen == 0) \
+ || result == __GCONV_FULL_OUTPUT) \
+ break; \
+ if (inlen == 1) \
+ { \
+ /* Input does not contain a complete utf16 character. */ \
+ result = __GCONV_INCOMPLETE_INPUT; \
+ break; \
+ } \
+ else if (result != __GCONV_ILLEGAL_INPUT) \
+ { \
+ /* Input is >= 2 and < 4 bytes (as cu21 would have processed \
+ a possible next utf16 character) and not illegal. \
+ => we have a single high surrogate at end of input. */ \
+ result = __GCONV_INCOMPLETE_INPUT; \
+ break; \
+ } \
+ \
+ STANDARD_TO_LOOP_ERR_HANDLER (2); \
+ }
+
+/* Generate loop-function with vector and utf-convert instructions. */
+# define MIN_NEEDED_INPUT MIN_NEEDED_TO
+# define MAX_NEEDED_INPUT MAX_NEEDED_TO
+# define MIN_NEEDED_OUTPUT MIN_NEEDED_FROM
+# define MAX_NEEDED_OUTPUT MAX_NEEDED_FROM
+# define TO_LOOP_VX_CU __to_utf8_loop_vx_cu
+# define LOOPFCT TO_LOOP_VX_CU
+# define BODY BODY_TO_VX_CU
+# define LOOP_NEED_FLAGS
+# include <iconv/loop.c>
+#else
+# define TO_LOOP_VX_CU NULL
+#endif /* HAVE_TO_VX_CU != 1 */
+
/* This file also exists in sysdeps/s390/multiarch/ which
generates ifunc resolvers for FROM/TO_LOOP functions
and includes iconv/skeleton.c afterwards. */
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=f0137ff31da85bc7d9bd4e621af958d8b7249475
commit f0137ff31da85bc7d9bd4e621af958d8b7249475
Author: Stefan Liebler <stli@linux.vnet.ibm.com>
Date: Tue Jun 27 17:09:43 2017 +0200
S390: Use cu24 instruction for converting from utf16 to utf32.
This patch adds an ifunc variant to use the cu instruction on arch12 CPUs.
This new ifunc variant can be built if binutils support z13 vector
instructions. At runtime, HWCAP_S390_VXE decides if we can use the
cu24 instruction.
ChangeLog:
* sysdeps/s390/utf16-utf32-z9.c (__from_utf16_loop_vx_cu):
Use vector and cu24 instruction.
* sysdeps/s390/multiarch/utf16-utf32-z9.c:
Add __from_utf16_loop_vx_cu in ifunc resolver.
diff --git a/ChangeLog b/ChangeLog
index 2cfd824..62aacea 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+ * sysdeps/s390/utf16-utf32-z9.c (__from_utf16_loop_vx_cu):
+ Use vector and cu24 instruction.
+
+2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+
* sysdeps/s390/utf16-utf32-z9.c (__to_utf16_loop_vx_cu):
Use vector and cu42 instruction.
* sysdeps/s390/multiarch/utf16-utf32-z9.c:
diff --git a/sysdeps/s390/multiarch/utf16-utf32-z9.c b/sysdeps/s390/multiarch/utf16-utf32-z9.c
index ded3cc2..917de5f 100644
--- a/sysdeps/s390/multiarch/utf16-utf32-z9.c
+++ b/sysdeps/s390/multiarch/utf16-utf32-z9.c
@@ -32,9 +32,11 @@ strong_alias (SINGLE_NAME (TO_LOOP_DEFAULT), SINGLE_NAME (TO_LOOP))
/* Generate ifunc'ed loop functions for FROM/TO_LOOP. */
s390_libc_ifunc_expr (FROM_LOOP_DEFAULT, FROM_LOOP,
- (HAVE_FROM_VX && (hwcap & HWCAP_S390_VX))
- ? FROM_LOOP_VX
- : FROM_LOOP_DEFAULT);
+ (HAVE_FROM_VX_CU && (hwcap & HWCAP_S390_VXE))
+ ? FROM_LOOP_VX_CU
+ : (HAVE_FROM_VX && (hwcap & HWCAP_S390_VX))
+ ? FROM_LOOP_VX
+ : FROM_LOOP_DEFAULT);
s390_libc_ifunc_expr (TO_LOOP_DEFAULT, TO_LOOP,
(HAVE_TO_VX_CU && (hwcap & HWCAP_S390_VXE))
diff --git a/sysdeps/s390/utf16-utf32-z9.c b/sysdeps/s390/utf16-utf32-z9.c
index 45c9f2b..07cff21 100644
--- a/sysdeps/s390/utf16-utf32-z9.c
+++ b/sysdeps/s390/utf16-utf32-z9.c
@@ -39,10 +39,12 @@
#if defined HAVE_S390_VX_ASM_SUPPORT && defined USE_MULTIARCH
# define HAVE_FROM_VX 1
+# define HAVE_FROM_VX_CU 1
# define HAVE_TO_VX 1
# define HAVE_TO_VX_CU 1
#else
# define HAVE_FROM_VX 0
+# define HAVE_FROM_VX_CU 0
# define HAVE_TO_VX 0
# define HAVE_TO_VX_CU 0
#endif
@@ -383,7 +385,6 @@ gconv_end (struct __gconv_step *data)
STANDARD_FROM_LOOP_ERR_HANDLER (2); \
}
-
/* Generate loop-function with hardware vector instructions. */
# define MIN_NEEDED_INPUT MIN_NEEDED_FROM
# define MAX_NEEDED_INPUT MAX_NEEDED_FROM
@@ -397,6 +398,116 @@ gconv_end (struct __gconv_step *data)
# define FROM_LOOP_VX NULL
#endif /* HAVE_FROM_VX != 1 */
+#if HAVE_FROM_VX_CU == 1
+#define BODY_FROM_VX_CU \
+ { \
+ register const unsigned char* pInput asm ("8") = inptr; \
+ register size_t inlen asm ("9") = inend - inptr; \
+ register unsigned char* pOutput asm ("10") = outptr; \
+ register size_t outlen asm ("11") = outend - outptr; \
+ unsigned long tmp, tmp2, tmp3; \
+ asm volatile (".machine push\n\t" \
+ ".machine \"z13\"\n\t" \
+ ".machinemode \"zarch_nohighgprs\"\n\t" \
+ /* Setup to check for surrogates. */ \
+ " larl %[R_TMP],9f\n\t" \
+ " vlm %%v30,%%v31,0(%[R_TMP])\n\t" \
+ CONVERT_32BIT_SIZE_T ([R_INLEN]) \
+ CONVERT_32BIT_SIZE_T ([R_OUTLEN]) \
+ /* Loop which handles UTF-16 chars <0xd800, >0xdfff. */ \
+ "0: clgijl %[R_INLEN],16,20f\n\t" \
+ " clgijl %[R_OUTLEN],32,20f\n\t" \
+ "1: vl %%v16,0(%[R_IN])\n\t" \
+ /* Check for surrogate chars. */ \
+ " vstrchs %%v19,%%v16,%%v30,%%v31\n\t" \
+ " jno 10f\n\t" \
+ /* Enlarge to UTF-32. */ \
+ " vuplhh %%v17,%%v16\n\t" \
+ " la %[R_IN],16(%[R_IN])\n\t" \
+ " vupllh %%v18,%%v16\n\t" \
+ " aghi %[R_INLEN],-16\n\t" \
+ /* Store 32 bytes to buf_out. */ \
+ " vstm %%v17,%%v18,0(%[R_OUT])\n\t" \
+ " aghi %[R_OUTLEN],-32\n\t" \
+ " la %[R_OUT],32(%[R_OUT])\n\t" \
+ " clgijl %[R_INLEN],16,20f\n\t" \
+ " clgijl %[R_OUTLEN],32,20f\n\t" \
+ " j 1b\n\t" \
+ /* Setup to check for ch >= 0xd800 && ch <= 0xdfff. (v30, v31) */ \
+ "9: .short 0xd800,0xdfff,0x0,0x0,0x0,0x0,0x0,0x0\n\t" \
+ " .short 0xa000,0xc000,0x0,0x0,0x0,0x0,0x0,0x0\n\t" \
+ /* At least one uint16_t is in range of surrogates. \
+ Store the preceding chars. */ \
+ "10: vlgvb %[R_TMP],%%v19,7\n\t" \
+ " vuplhh %%v17,%%v16\n\t" \
+ " sllg %[R_TMP3],%[R_TMP],1\n\t" /* Number of out bytes. */ \
+ " ahik %[R_TMP2],%[R_TMP3],-1\n\t" /* Highest index to store. */ \
+ " jl 20f\n\t" \
+ " vstl %%v17,%[R_TMP2],0(%[R_OUT])\n\t" \
+ " vupllh %%v18,%%v16\n\t" \
+ " ahi %[R_TMP2],-16\n\t" \
+ " jl 11f\n\t" \
+ " vstl %%v18,%[R_TMP2],16(%[R_OUT])\n\t" \
+ "11: \n\t" /* Update pointers. */ \
+ " la %[R_IN],0(%[R_TMP],%[R_IN])\n\t" \
+ " slgr %[R_INLEN],%[R_TMP]\n\t" \
+ " la %[R_OUT],0(%[R_TMP3],%[R_OUT])\n\t" \
+ " slgr %[R_OUTLEN],%[R_TMP3]\n\t" \
+ /* Handles UTF16 surrogates with convert instruction. */ \
+ "20: cu24 %[R_OUT],%[R_IN],1\n\t" \
+ " jo 0b\n\t" /* Try vector implemenation again. */ \
+ " lochil %[R_RES],%[RES_OUT_FULL]\n\t" /* cc == 1. */ \
+ " lochih %[R_RES],%[RES_IN_ILL]\n\t" /* cc == 2. */ \
+ ".machine pop" \
+ : /* outputs */ [R_IN] "+a" (pInput) \
+ , [R_INLEN] "+d" (inlen), [R_OUT] "+a" (pOutput) \
+ , [R_OUTLEN] "+d" (outlen), [R_TMP] "=a" (tmp) \
+ , [R_TMP2] "=d" (tmp2), [R_TMP3] "=a" (tmp3) \
+ , [R_RES] "+d" (result) \
+ : /* inputs */ \
+ [RES_OUT_FULL] "i" (__GCONV_FULL_OUTPUT) \
+ , [RES_IN_ILL] "i" (__GCONV_ILLEGAL_INPUT) \
+ : /* clobber list */ "memory", "cc" \
+ ASM_CLOBBER_VR ("v16") ASM_CLOBBER_VR ("v17") \
+ ASM_CLOBBER_VR ("v18") ASM_CLOBBER_VR ("v19") \
+ ASM_CLOBBER_VR ("v30") ASM_CLOBBER_VR ("v31") \
+ ); \
+ inptr = pInput; \
+ outptr = pOutput; \
+ \
+ if (__glibc_likely (inlen == 0) \
+ || result == __GCONV_FULL_OUTPUT) \
+ break; \
+ if (inlen == 1) \
+ { \
+ /* Input does not contain a complete utf16 character. */ \
+ result = __GCONV_INCOMPLETE_INPUT; \
+ break; \
+ } \
+ else if (result != __GCONV_ILLEGAL_INPUT) \
+ { \
+ /* Input is >= 2 and < 4 bytes (as cu24 would have processed \
+ a possible next utf16 character) and not illegal. \
+ => we have a single high surrogate at end of input. */ \
+ result = __GCONV_INCOMPLETE_INPUT; \
+ break; \
+ } \
+ \
+ STANDARD_FROM_LOOP_ERR_HANDLER (2); \
+ }
+
+/* Generate loop-function with hardware vector and utf-convert instructions. */
+# define MIN_NEEDED_INPUT MIN_NEEDED_FROM
+# define MAX_NEEDED_INPUT MAX_NEEDED_FROM
+# define MIN_NEEDED_OUTPUT MIN_NEEDED_TO
+# define FROM_LOOP_VX_CU __from_utf16_loop_vx_cu
+# define LOOPFCT FROM_LOOP_VX_CU
+# define LOOP_NEED_FLAGS
+# define BODY BODY_FROM_VX_CU
+# include <iconv/loop.c>
+#else
+# define FROM_LOOP_VX_CU NULL
+#endif /* HAVE_FROM_VX_CU != 1 */
/* Conversion from UTF-32 internal/BE to UTF-16. */
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=593e4da186906525e2a0bdc4d87601bd0c2625eb
commit 593e4da186906525e2a0bdc4d87601bd0c2625eb
Author: Stefan Liebler <stli@linux.vnet.ibm.com>
Date: Tue Jun 27 17:09:43 2017 +0200
S390: Use cu42 instruction for converting from utf32 to utf16.
This patch adds an ifunc variant to use the cu instruction on arch12 CPUs.
This new ifunc variant can be built if binutils support z13 vector
instructions. At runtime, HWCAP_S390_VXE decides if we can use the
cu42 instruction.
ChangeLog:
* sysdeps/s390/utf16-utf32-z9.c (__to_utf16_loop_vx_cu):
Use vector and cu42 instruction.
* sysdeps/s390/multiarch/utf16-utf32-z9.c:
Add __to_utf16_loop_vx_cu in ifunc resolver.
diff --git a/ChangeLog b/ChangeLog
index dedaa3c..2cfd824 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,12 @@
2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+ * sysdeps/s390/utf16-utf32-z9.c (__to_utf16_loop_vx_cu):
+ Use vector and cu42 instruction.
+ * sysdeps/s390/multiarch/utf16-utf32-z9.c:
+ Add __to_utf16_loop_vx_cu in ifunc resolver.
+
+2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+
* sysdeps/s390/utf8-utf32-z9.c (__to_utf8_loop_vx_cu):
Use vector and cu41 instruction.
* sysdeps/s390/multiarch/utf8-utf32-z9.c: Add __to_utf8_loop_vx_cu
diff --git a/sysdeps/s390/multiarch/utf16-utf32-z9.c b/sysdeps/s390/multiarch/utf16-utf32-z9.c
index 6e64169..ded3cc2 100644
--- a/sysdeps/s390/multiarch/utf16-utf32-z9.c
+++ b/sysdeps/s390/multiarch/utf16-utf32-z9.c
@@ -37,8 +37,10 @@ s390_libc_ifunc_expr (FROM_LOOP_DEFAULT, FROM_LOOP,
: FROM_LOOP_DEFAULT);
s390_libc_ifunc_expr (TO_LOOP_DEFAULT, TO_LOOP,
- (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
- ? TO_LOOP_VX
- : TO_LOOP_DEFAULT);
+ (HAVE_TO_VX_CU && (hwcap & HWCAP_S390_VXE))
+ ? TO_LOOP_VX_CU
+ : (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
+ ? TO_LOOP_VX
+ : TO_LOOP_DEFAULT);
#include <iconv/skeleton.c>
diff --git a/sysdeps/s390/utf16-utf32-z9.c b/sysdeps/s390/utf16-utf32-z9.c
index 7a174ea..45c9f2b 100644
--- a/sysdeps/s390/utf16-utf32-z9.c
+++ b/sysdeps/s390/utf16-utf32-z9.c
@@ -40,9 +40,11 @@
#if defined HAVE_S390_VX_ASM_SUPPORT && defined USE_MULTIARCH
# define HAVE_FROM_VX 1
# define HAVE_TO_VX 1
+# define HAVE_TO_VX_CU 1
#else
# define HAVE_FROM_VX 0
# define HAVE_TO_VX 0
+# define HAVE_TO_VX_CU 0
#endif
#if defined HAVE_S390_VX_GCC_SUPPORT
@@ -471,7 +473,7 @@ gconv_end (struct __gconv_step *data)
" vlm %%v30,%%v31,0(%[R_TMP])\n\t" \
CONVERT_32BIT_SIZE_T ([R_INLEN]) \
CONVERT_32BIT_SIZE_T ([R_OUTLEN]) \
- /* Loop which handles UTF-16 chars \
+ /* Loop which handles UTF-32 chars \
ch < 0xd800 || (ch > 0xdfff && ch < 0x10000). */ \
"0: clgijl %[R_INLEN],32,2f\n\t" \
" clgijl %[R_OUTLEN],16,2f\n\t" \
@@ -595,6 +597,109 @@ gconv_end (struct __gconv_step *data)
# define TO_LOOP_VX NULL
#endif /* HAVE_TO_VX != 1 */
+#if HAVE_TO_VX_CU == 1
+#define BODY_TO_VX_CU \
+ { \
+ register const unsigned char* pInput asm ("8") = inptr; \
+ register size_t inlen asm ("9") = inend - inptr; \
+ register unsigned char* pOutput asm ("10") = outptr; \
+ register size_t outlen asm ("11") = outend - outptr; \
+ unsigned long tmp, tmp2, tmp3; \
+ asm volatile (".machine push\n\t" \
+ ".machine \"z13\"\n\t" \
+ ".machinemode \"zarch_nohighgprs\"\n\t" \
+ /* Setup to check for surrogates. */ \
+ " larl %[R_TMP],9f\n\t" \
+ " vlm %%v30,%%v31,0(%[R_TMP])\n\t" \
+ CONVERT_32BIT_SIZE_T ([R_INLEN]) \
+ CONVERT_32BIT_SIZE_T ([R_OUTLEN]) \
+ /* Loop which handles UTF-32 chars \
+ ch < 0xd800 || (ch > 0xdfff && ch < 0x10000). */ \
+ "0: clgijl %[R_INLEN],32,20f\n\t" \
+ " clgijl %[R_OUTLEN],16,20f\n\t" \
+ "1: vlm %%v16,%%v17,0(%[R_IN])\n\t" \
+ " lghi %[R_TMP2],0\n\t" \
+ /* Shorten to UTF-16. */ \
+ " vpkf %%v18,%%v16,%%v17\n\t" \
+ /* Check for surrogate chars. */ \
+ " vstrcfs %%v19,%%v16,%%v30,%%v31\n\t" \
+ " jno 10f\n\t" \
+ " vstrcfs %%v19,%%v17,%%v30,%%v31\n\t" \
+ " jno 11f\n\t" \
+ /* Store 16 bytes to buf_out. */ \
+ " vst %%v18,0(%[R_OUT])\n\t" \
+ " la %[R_IN],32(%[R_IN])\n\t" \
+ " aghi %[R_INLEN],-32\n\t" \
+ " aghi %[R_OUTLEN],-16\n\t" \
+ " la %[R_OUT],16(%[R_OUT])\n\t" \
+ " clgijl %[R_INLEN],32,20f\n\t" \
+ " clgijl %[R_OUTLEN],16,20f\n\t" \
+ " j 1b\n\t" \
+ /* Setup to check for ch >= 0xd800 && ch <= 0xdfff \
+ and check for ch >= 0x10000. (v30, v31) */ \
+ "9: .long 0xd800,0xdfff,0x10000,0x10000\n\t" \
+ " .long 0xa0000000,0xc0000000, 0xa0000000,0xa0000000\n\t" \
+ /* At least one UTF32 char is in range of surrogates. \
+ Store the preceding characters. */ \
+ "11: ahi %[R_TMP2],16\n\t" \
+ "10: vlgvb %[R_TMP],%%v19,7\n\t" \
+ " agr %[R_TMP],%[R_TMP2]\n\t" \
+ " srlg %[R_TMP3],%[R_TMP],1\n\t" /* Number of out bytes. */ \
+ " ahik %[R_TMP2],%[R_TMP3],-1\n\t" /* Highest index to store. */ \
+ " jl 20f\n\t" \
+ " vstl %%v18,%[R_TMP2],0(%[R_OUT])\n\t" \
+ /* Update pointers. */ \
+ " la %[R_IN],0(%[R_TMP],%[R_IN])\n\t" \
+ " slgr %[R_INLEN],%[R_TMP]\n\t" \
+ " la %[R_OUT],0(%[R_TMP3],%[R_OUT])\n\t" \
+ " slgr %[R_OUTLEN],%[R_TMP3]\n\t" \
+ /* Handles UTF16 surrogates with convert instruction. */ \
+ "20: cu42 %[R_OUT],%[R_IN]\n\t" \
+ " jo 0b\n\t" /* Try vector implemenation again. */ \
+ " lochil %[R_RES],%[RES_OUT_FULL]\n\t" /* cc == 1. */ \
+ " lochih %[R_RES],%[RES_IN_ILL]\n\t" /* cc == 2. */ \
+ ".machine pop" \
+ : /* outputs */ [R_IN] "+a" (pInput) \
+ , [R_INLEN] "+d" (inlen), [R_OUT] "+a" (pOutput) \
+ , [R_OUTLEN] "+d" (outlen), [R_TMP] "=a" (tmp) \
+ , [R_TMP2] "=d" (tmp2), [R_TMP3] "=a" (tmp3) \
+ , [R_RES] "+d" (result) \
+ : /* inputs */ \
+ [RES_OUT_FULL] "i" (__GCONV_FULL_OUTPUT) \
+ , [RES_IN_ILL] "i" (__GCONV_ILLEGAL_INPUT) \
+ : /* clobber list */ "memory", "cc" \
+ ASM_CLOBBER_VR ("v16") ASM_CLOBBER_VR ("v17") \
+ ASM_CLOBBER_VR ("v18") ASM_CLOBBER_VR ("v19") \
+ ASM_CLOBBER_VR ("v30") ASM_CLOBBER_VR ("v31") \
+ ); \
+ inptr = pInput; \
+ outptr = pOutput; \
+ \
+ if (__glibc_likely (inlen == 0) \
+ || result == __GCONV_FULL_OUTPUT) \
+ break; \
+ if (inlen < 4) \
+ { \
+ result = __GCONV_INCOMPLETE_INPUT; \
+ break; \
+ } \
+ \
+ STANDARD_TO_LOOP_ERR_HANDLER (4); \
+ }
+
+/* Generate loop-function with hardware vector and utf-convert instructions. */
+# define MIN_NEEDED_INPUT MIN_NEEDED_TO
+# define MIN_NEEDED_OUTPUT MIN_NEEDED_FROM
+# define MAX_NEEDED_OUTPUT MAX_NEEDED_FROM
+# define TO_LOOP_VX_CU __to_utf16_loop_vx_cu
+# define LOOPFCT TO_LOOP_VX_CU
+# define LOOP_NEED_FLAGS
+# define BODY BODY_TO_VX_CU
+# include <iconv/loop.c>
+#else
+# define TO_LOOP_VX_CU NULL
+#endif /* HAVE_TO_VX_CU != 1 */
+
/* This file also exists in sysdeps/s390/multiarch/ which
generates ifunc resolvers for FROM/TO_LOOP functions
and includes iconv/skeleton.c afterwards. */
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=23ea69a9d6e9ab28c66a232b767a800b04eaa938
commit 23ea69a9d6e9ab28c66a232b767a800b04eaa938
Author: Stefan Liebler <stli@linux.vnet.ibm.com>
Date: Tue Jun 27 17:09:42 2017 +0200
S390: Use cu41 instruction for converting from utf32 to utf8.
This patch adds an ifunc variant to use the cu instruction on arch12 CPUs.
This new ifunc variant can be built if binutils support z13 vector
instructions. At runtime, HWCAP_S390_VXE decides if we can use the
cu41 instruction.
ChangeLog:
* sysdeps/s390/utf8-utf32-z9.c (__to_utf8_loop_vx_cu):
Use vector and cu41 instruction.
* sysdeps/s390/multiarch/utf8-utf32-z9.c: Add __to_utf8_loop_vx_cu
in ifunc resolver.
diff --git a/ChangeLog b/ChangeLog
index 039366a..dedaa3c 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,12 @@
2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+ * sysdeps/s390/utf8-utf32-z9.c (__to_utf8_loop_vx_cu):
+ Use vector and cu41 instruction.
+ * sysdeps/s390/multiarch/utf8-utf32-z9.c: Add __to_utf8_loop_vx_cu
+ in ifunc resolver.
+
+2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+
* sysdeps/s390/dl-procinfo.c (_dl_s390_cap_flags):
Add vxd, vxe, gs flag.
* sysdeps/s390/dl-procinfo.h: Add HWCAP_S390_VXD, HWCAP_S390_VXE,
diff --git a/sysdeps/s390/multiarch/utf8-utf32-z9.c b/sysdeps/s390/multiarch/utf8-utf32-z9.c
index faf1f46..0c6d9e9 100644
--- a/sysdeps/s390/multiarch/utf8-utf32-z9.c
+++ b/sysdeps/s390/multiarch/utf8-utf32-z9.c
@@ -41,8 +41,10 @@ s390_libc_ifunc_expr (FROM_LOOP_DEFAULT, FROM_LOOP,
: FROM_LOOP_DEFAULT);
s390_libc_ifunc_expr (TO_LOOP_DEFAULT, TO_LOOP,
- (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
- ? TO_LOOP_VX
- : TO_LOOP_DEFAULT);
+ (HAVE_TO_VX_CU && (hwcap & HWCAP_S390_VXE))
+ ? TO_LOOP_VX_CU
+ : (HAVE_TO_VX && (hwcap & HWCAP_S390_VX))
+ ? TO_LOOP_VX
+ : TO_LOOP_DEFAULT);
#include <iconv/skeleton.c>
diff --git a/sysdeps/s390/utf8-utf32-z9.c b/sysdeps/s390/utf8-utf32-z9.c
index 57572fa..3810b65 100644
--- a/sysdeps/s390/utf8-utf32-z9.c
+++ b/sysdeps/s390/utf8-utf32-z9.c
@@ -52,9 +52,11 @@
#if defined HAVE_S390_VX_ASM_SUPPORT && defined USE_MULTIARCH
# define HAVE_FROM_VX 1
# define HAVE_TO_VX 1
+# define HAVE_TO_VX_CU 1
#else
# define HAVE_FROM_VX 0
# define HAVE_TO_VX 0
+# define HAVE_TO_VX_CU 0
#endif
#if defined HAVE_S390_VX_GCC_SUPPORT
@@ -863,6 +865,116 @@ gconv_end (struct __gconv_step *data)
# define TO_LOOP_VX NULL
#endif /* HAVE_TO_VX != 1 */
+#if HAVE_TO_VX_CU == 1
+#define BODY_TO_VX_CU \
+ { \
+ register const unsigned char* pInput asm ("8") = inptr; \
+ register size_t inlen asm ("9") = inend - inptr; \
+ register unsigned char* pOutput asm ("10") = outptr; \
+ register size_t outlen asm ("11") = outend - outptr; \
+ unsigned long tmp, tmp2; \
+ asm volatile (".machine push\n\t" \
+ ".machine \"z13\"\n\t" \
+ ".machinemode \"zarch_nohighgprs\"\n\t" \
+ " vleif %%v20,127,0\n\t" /* element 0: 127 */ \
+ " vzero %%v21\n\t" \
+ " vleih %%v21,8192,0\n\t" /* element 0: > */ \
+ " vleih %%v21,-8192,2\n\t" /* element 1: =<> */ \
+ CONVERT_32BIT_SIZE_T ([R_INLEN]) \
+ CONVERT_32BIT_SIZE_T ([R_OUTLEN]) \
+ /* Loop which handles UTF-32 chars <= 0x7f. */ \
+ "0: clgijl %[R_INLEN],64,20f\n\t" \
+ " clgijl %[R_OUTLEN],16,20f\n\t" \
+ "1: vlm %%v16,%%v19,0(%[R_IN])\n\t" \
+ " lghi %[R_TMP],0\n\t" \
+ /* Shorten to byte values. */ \
+ " vpkf %%v23,%%v16,%%v17\n\t" \
+ " vpkf %%v24,%%v18,%%v19\n\t" \
+ " vpkh %%v23,%%v23,%%v24\n\t" \
+ /* Checking for values > 0x7f. */ \
+ " vstrcfs %%v22,%%v16,%%v20,%%v21\n\t" \
+ " jno 10f\n\t" \
+ " vstrcfs %%v22,%%v17,%%v20,%%v21\n\t" \
+ " jno 11f\n\t" \
+ " vstrcfs %%v22,%%v18,%%v20,%%v21\n\t" \
+ " jno 12f\n\t" \
+ " vstrcfs %%v22,%%v19,%%v20,%%v21\n\t" \
+ " jno 13f\n\t" \
+ /* Store 16bytes to outptr. */ \
+ " vst %%v23,0(%[R_OUT])\n\t" \
+ " aghi %[R_INLEN],-64\n\t" \
+ " aghi %[R_OUTLEN],-16\n\t" \
+ " la %[R_IN],64(%[R_IN])\n\t" \
+ " la %[R_OUT],16(%[R_OUT])\n\t" \
+ " clgijl %[R_INLEN],64,20f\n\t" \
+ " clgijl %[R_OUTLEN],16,20f\n\t" \
+ " j 1b\n\t" \
+ /* Found a value > 0x7f. */ \
+ "13: ahi %[R_TMP],4\n\t" \
+ "12: ahi %[R_TMP],4\n\t" \
+ "11: ahi %[R_TMP],4\n\t" \
+ "10: vlgvb %[R_I],%%v22,7\n\t" \
+ " srlg %[R_I],%[R_I],2\n\t" \
+ " agr %[R_I],%[R_TMP]\n\t" \
+ " je 20f\n\t" \
+ /* Store characters before invalid one... */ \
+ " slgr %[R_OUTLEN],%[R_I]\n\t" \
+ "15: aghi %[R_I],-1\n\t" \
+ " vstl %%v23,%[R_I],0(%[R_OUT])\n\t" \
+ /* ... and update pointers. */ \
+ " aghi %[R_I],1\n\t" \
+ " la %[R_OUT],0(%[R_I],%[R_OUT])\n\t" \
+ " sllg %[R_I],%[R_I],2\n\t" \
+ " la %[R_IN],0(%[R_I],%[R_IN])\n\t" \
+ " slgr %[R_INLEN],%[R_I]\n\t" \
+ /* Handle multibyte utf8-char with convert instruction. */ \
+ "20: cu41 %[R_OUT],%[R_IN]\n\t" \
+ " jo 0b\n\t" /* Try vector implemenation again. */ \
+ " lochil %[R_RES],%[RES_OUT_FULL]\n\t" /* cc == 1. */ \
+ " lochih %[R_RES],%[RES_IN_ILL]\n\t" /* cc == 2. */ \
+ ".machine pop" \
+ : /* outputs */ [R_IN] "+a" (pInput) \
+ , [R_INLEN] "+d" (inlen), [R_OUT] "+a" (pOutput) \
+ , [R_OUTLEN] "+d" (outlen), [R_TMP] "=d" (tmp) \
+ , [R_I] "=a" (tmp2) \
+ , [R_RES] "+d" (result) \
+ : /* inputs */ \
+ [RES_OUT_FULL] "i" (__GCONV_FULL_OUTPUT) \
+ , [RES_IN_ILL] "i" (__GCONV_ILLEGAL_INPUT) \
+ : /* clobber list */ "memory", "cc" \
+ ASM_CLOBBER_VR ("v16") ASM_CLOBBER_VR ("v17") \
+ ASM_CLOBBER_VR ("v18") ASM_CLOBBER_VR ("v19") \
+ ASM_CLOBBER_VR ("v20") ASM_CLOBBER_VR ("v21") \
+ ASM_CLOBBER_VR ("v22") ASM_CLOBBER_VR ("v23") \
+ ASM_CLOBBER_VR ("v24") \
+ ); \
+ inptr = pInput; \
+ outptr = pOutput; \
+ \
+ if (__glibc_likely (inptr == inend) \
+ || result == __GCONV_FULL_OUTPUT) \
+ break; \
+ if (inptr + 4 > inend) \
+ { \
+ result = __GCONV_INCOMPLETE_INPUT; \
+ break; \
+ } \
+ STANDARD_TO_LOOP_ERR_HANDLER (4); \
+ }
+
+/* Generate loop-function with hardware vector and utf-convert instructions. */
+# define MIN_NEEDED_INPUT MIN_NEEDED_TO
+# define MIN_NEEDED_OUTPUT MIN_NEEDED_FROM
+# define MAX_NEEDED_OUTPUT MAX_NEEDED_FROM
+# define TO_LOOP_VX_CU __to_utf8_loop_vx_cu
+# define LOOPFCT TO_LOOP_VX_CU
+# define BODY BODY_TO_VX_CU
+# define LOOP_NEED_FLAGS
+# include <iconv/loop.c>
+#else
+# define TO_LOOP_VX_CU NULL
+#endif /* HAVE_TO_VX_CU != 1 */
+
/* This file also exists in sysdeps/s390/multiarch/ which
generates ifunc resolvers for FROM/TO_LOOP functions
and includes iconv/skeleton.c afterwards. */
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=f21f59124d8a4d22b20e7a926462937d89e8988e
commit f21f59124d8a4d22b20e7a926462937d89e8988e
Author: Stefan Liebler <stli@linux.vnet.ibm.com>
Date: Tue Jun 27 17:09:42 2017 +0200
S390: Add new hwcap values for new cpu architecture - arch12.
The new hwcap values indicate support for:
- Vector packed decimal facility
- Vector enhancements facility 1
- Guarded storage facility
Note: arch12 is NOT the official name of the new CPU.
It refers to the edition number of the Principle of Operations manual.
ChangeLog:
* sysdeps/s390/dl-procinfo.c (_dl_s390_cap_flags):
Add vxd, vxe, gs flag.
* sysdeps/s390/dl-procinfo.h: Add HWCAP_S390_VXD, HWCAP_S390_VXE,
HWCAP_S390_GS capability.
* sysdeps/unix/sysv/linux/s390/bits/hwcap.h
(HWCAP_S390_VXD, HWCAP_S390_VXE, HWCAP_S390_GS): Define.
diff --git a/ChangeLog b/ChangeLog
index 88dde2b..039366a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2017-06-27 Stefan Liebler <stli@linux.vnet.ibm.com>
+
+ * sysdeps/s390/dl-procinfo.c (_dl_s390_cap_flags):
+ Add vxd, vxe, gs flag.
+ * sysdeps/s390/dl-procinfo.h: Add HWCAP_S390_VXD, HWCAP_S390_VXE,
+ HWCAP_S390_GS capability.
+ * sysdeps/unix/sysv/linux/s390/bits/hwcap.h
+ (HWCAP_S390_VXD, HWCAP_S390_VXE, HWCAP_S390_GS): Define.
+
2017-06-27 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S (MEMCMP): Check
diff --git a/sysdeps/s390/dl-procinfo.c b/sysdeps/s390/dl-procinfo.c
index 4fcde8e..436e205 100644
--- a/sysdeps/s390/dl-procinfo.c
+++ b/sysdeps/s390/dl-procinfo.c
@@ -46,11 +46,12 @@
#if !defined PROCINFO_DECL && defined SHARED
._dl_s390_cap_flags
#else
-PROCINFO_CLASS const char _dl_s390_cap_flags[12][9]
+PROCINFO_CLASS const char _dl_s390_cap_flags[15][9]
#endif
#ifndef PROCINFO_DECL
= {
- "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp", "edat", "etf3eh", "highgprs", "te", "vx"
+ "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp", "edat", "etf3eh",
+ "highgprs", "te", "vx", "vxd", "vxe", "gs"
}
#endif
#if !defined SHARED || defined PROCINFO_DECL
diff --git a/sysdeps/s390/dl-procinfo.h b/sysdeps/s390/dl-procinfo.h
index c997896..1645cf3 100644
--- a/sysdeps/s390/dl-procinfo.h
+++ b/sysdeps/s390/dl-procinfo.h
@@ -21,7 +21,7 @@
#define _DL_PROCINFO_H 1
#include <ldsodefs.h>
-#define _DL_HWCAP_COUNT 12
+#define _DL_HWCAP_COUNT 15
#define _DL_PLATFORMS_COUNT 8
@@ -51,6 +51,9 @@ enum
HWCAP_S390_HIGH_GPRS = 1 << 9,
HWCAP_S390_TE = 1 << 10,
HWCAP_S390_VX = 1 << 11,
+ HWCAP_S390_VXD = 1 << 12,
+ HWCAP_S390_VXE = 1 << 13,
+ HWCAP_S390_GS = 1 << 14,
};
#define HWCAP_IMPORTANT (HWCAP_S390_ZARCH | HWCAP_S390_LDISP \
diff --git a/sysdeps/unix/sysv/linux/s390/bits/hwcap.h b/sysdeps/unix/sysv/linux/s390/bits/hwcap.h
index 6a7e432..ecaa8d3 100644
--- a/sysdeps/unix/sysv/linux/s390/bits/hwcap.h
+++ b/sysdeps/unix/sysv/linux/s390/bits/hwcap.h
@@ -36,3 +36,6 @@
#define HWCAP_S390_HIGH_GPRS 512
#define HWCAP_S390_TE 1024
#define HWCAP_S390_VX 2048
+#define HWCAP_S390_VXD 4096
+#define HWCAP_S390_VXE 8192
+#define HWCAP_S390_GS 16384
-----------------------------------------------------------------------
Summary of changes:
ChangeLog | 35 +++++
sysdeps/s390/dl-procinfo.c | 5 +-
sysdeps/s390/dl-procinfo.h | 5 +-
sysdeps/s390/multiarch/utf16-utf32-z9.c | 16 ++-
sysdeps/s390/multiarch/utf8-utf16-z9.c | 8 +-
sysdeps/s390/multiarch/utf8-utf32-z9.c | 8 +-
sysdeps/s390/utf16-utf32-z9.c | 220 ++++++++++++++++++++++++++++-
sysdeps/s390/utf8-utf16-z9.c | 117 +++++++++++++++
sysdeps/s390/utf8-utf32-z9.c | 112 +++++++++++++++
sysdeps/unix/sysv/linux/s390/bits/hwcap.h | 3 +
10 files changed, 512 insertions(+), 17 deletions(-)
hooks/post-receive
--
GNU C Library master sources