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GNU C Library master sources branch master updated. glibc-2.23-346-gb7598b1
- From: hjl at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 20 May 2016 21:53:27 -0000
- Subject: GNU C Library master sources branch master updated. glibc-2.23-346-gb7598b1
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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=b7598b1b855b39628104feb9a1f6151a86351a64
commit b7598b1b855b39628104feb9a1f6151a86351a64
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri May 20 14:41:14 2016 -0700
Remove special L2 cache case for Knights Landing
L2 cache is shared by 2 cores on Knights Landing, which has 4 threads
per core:
https://en.wikipedia.org/wiki/Xeon_Phi#Knights_Landing
So L2 cache is shared by 8 threads on Knights Landing as reported by
CPUID. We should remove special L2 cache case for Knights Landing.
[BZ #18185]
* sysdeps/x86/cacheinfo.c (init_cacheinfo): Don't limit threads
sharing L2 cache to 2 for Knights Landing.
diff --git a/ChangeLog b/ChangeLog
index 0d9a25c..c5ed4cd 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ [BZ #18185]
+ * sysdeps/x86/cacheinfo.c (init_cacheinfo): Don't limit threads
+ sharing L2 cache to 2 for Knights Landing.
+
2016-05-20 Joseph Myers <joseph@codesourcery.com>
* conform/data/ftw.h-data (struct FTW): Do not expect for [XPG3].
diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c
index 020d3fd..182426b 100644
--- a/sysdeps/x86/cacheinfo.c
+++ b/sysdeps/x86/cacheinfo.c
@@ -573,8 +573,6 @@ init_cacheinfo (void)
{
switch (model)
{
- case 0x57:
- /* Knights Landing has L2 cache shared by 2 cores. */
case 0x37:
case 0x4a:
case 0x4d:
-----------------------------------------------------------------------
Summary of changes:
ChangeLog | 6 ++++++
sysdeps/x86/cacheinfo.c | 2 --
2 files changed, 6 insertions(+), 2 deletions(-)
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