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GNU C Library master sources branch hjl/cacheline/master created. glibc-2.23-236-gd735cff


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the project "GNU C Library master sources".

The branch, hjl/cacheline/master has been created
        at  d735cfff69d94383a8991ebb9e8c2b10c5b527bc (commit)

- Log -----------------------------------------------------------------
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=d735cfff69d94383a8991ebb9e8c2b10c5b527bc

commit d735cfff69d94383a8991ebb9e8c2b10c5b527bc
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Thu Apr 7 08:27:12 2016 -0700

    Skip simple and builtin memory implementations

diff --git a/benchtests/bench-memcpy.c b/benchtests/bench-memcpy.c
index c5a7192..001fcf1 100644
--- a/benchtests/bench-memcpy.c
+++ b/benchtests/bench-memcpy.c
@@ -26,8 +26,10 @@
 char *simple_memcpy (char *, const char *, size_t);
 char *builtin_memcpy (char *, const char *, size_t);
 
+#if 0
 IMPL (simple_memcpy, 0)
 IMPL (builtin_memcpy, 0)
+#endif
 IMPL (memcpy, 1)
 
 char *
diff --git a/benchtests/bench-memmove.c b/benchtests/bench-memmove.c
index c38596b..64ca7d0 100644
--- a/benchtests/bench-memmove.c
+++ b/benchtests/bench-memmove.c
@@ -41,7 +41,9 @@ simple_bcopy (const char *src, char *dst, size_t n)
 #else
 typedef char *(*proto_t) (char *, const char *, size_t);
 
+#if 0
 IMPL (simple_memmove, 0)
+#endif
 IMPL (memmove, 1)
 #endif
 
diff --git a/benchtests/bench-memset.c b/benchtests/bench-memset.c
index 98ec257..bd90659 100644
--- a/benchtests/bench-memset.c
+++ b/benchtests/bench-memset.c
@@ -67,11 +67,13 @@ builtin_bzero (char *s, size_t n)
 #else
 typedef CHAR *(*proto_t) (CHAR *, int, size_t);
 
+#if 0
 IMPL (SIMPLE_MEMSET, 0)
 # ifndef WIDE
 char *builtin_memset (char *, int, size_t);
 IMPL (builtin_memset, 0)
 # endif /* !WIDE */
+#endif
 IMPL (MEMSET, 1)
 
 # ifndef WIDE

http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=0d9d7bc875a16911be7a93acdf7999c0023761ea

commit 0d9d7bc875a16911be7a93acdf7999c0023761ea
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Sun Apr 24 10:53:25 2016 -0700

    Align to cacheline

diff --git a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
index 0a2bf41..aaee527 100644
--- a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
+++ b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
@@ -466,6 +466,26 @@ L(large_forward):
 	leaq    (%rdi, %rdx), %r10
 	cmpq    %r10, %rsi
 	jb	L(loop_4x_vec_forward)
+# if CACHELINE_SIZE != VEC_SIZE
+	movl	%edi, %r8d
+	andl	$(CACHELINE_SIZE - 1), %r8d
+	je	L(loop_large_forward)
+#  if CACHELINE_SIZE == (VEC_SIZE * 4)
+	/* Cacheline misaligned by VEC_SIZE, 2 * VEC_SIZE, or
+	   3 * VEC_SIZE.  */
+	cmpl	$(VEC_SIZE * 2), %r8d
+	je	L(misaligned_by_2x_vec_forward)
+	jb	L(misaligned_by_3x_vec_forward)
+#  elif CACHELINE_SIZE != (VEC_SIZE * 2)
+#   error Unsupported CACHELINE_SIZE!
+#  endif
+	/* Cacheline misaligned by VEC_SIZE.  */
+	VMOVU	(%rsi), %VEC(0)
+	addq	$VEC_SIZE, %rsi
+	subq	$VEC_SIZE, %rdx
+	VMOVA	%VEC(0), (%rdi)
+	addq	$VEC_SIZE, %rdi
+# endif
 L(loop_large_forward):
 	/* Copy 4 * VEC a time forward with non-temporal stores.  */
 	PREFETCH_ONE_SET (1, (%rsi), PREFETCHED_LOAD_SIZE * 2)
@@ -494,6 +514,32 @@ L(loop_large_forward):
 	VZEROUPPER
 	ret
 
+# if CACHELINE_SIZE == (VEC_SIZE * 4)
+L(misaligned_by_2x_vec_forward):
+	/* Cacheline misaligned by 2 * VEC_SIZE.  */
+	VMOVU	(%rsi), %VEC(0)
+	VMOVU	VEC_SIZE(%rsi), %VEC(1)
+	addq	$(VEC_SIZE * 2), %rsi
+	subq	$(VEC_SIZE * 2), %rdx
+	VMOVA	%VEC(0), (%rdi)
+	VMOVA	%VEC(1), VEC_SIZE(%rdi)
+	addq	$(VEC_SIZE * 2), %rdi
+	jmp	L(loop_large_forward)
+
+L(misaligned_by_3x_vec_forward):
+	/* Cacheline misaligned by 3 * VEC_SIZE.  */
+	VMOVU	(%rsi), %VEC(0)
+	VMOVU	VEC_SIZE(%rsi), %VEC(1)
+	VMOVU	(VEC_SIZE * 2)(%rsi), %VEC(2)
+	addq	$(VEC_SIZE * 3), %rsi
+	subq	$(VEC_SIZE * 3), %rdx
+	VMOVA	%VEC(0), (%rdi)
+	VMOVA	%VEC(1), VEC_SIZE(%rdi)
+	VMOVA	%VEC(2), (VEC_SIZE * 2)(%rdi)
+	addq	$(VEC_SIZE * 3), %rdi
+	jmp	L(loop_large_forward)
+# endif
+
 L(large_backward):
 	/* Don't use non-temporal store if there is overlap between
 	   destination and source since destination may be in cache
@@ -501,6 +547,26 @@ L(large_backward):
 	leaq    (%rcx, %rdx), %r10
 	cmpq    %r10, %r9
 	jb	L(loop_4x_vec_backward)
+# if CACHELINE_SIZE != VEC_SIZE
+	movl	%r9d, %r8d
+	andl	$(CACHELINE_SIZE - 1), %r8d
+	je	L(loop_large_backward)
+#  if CACHELINE_SIZE == (VEC_SIZE * 4)
+	/* Cacheline misaligned by VEC_SIZE, 2 * VEC_SIZE, or
+	   3 * VEC_SIZE.  */
+	cmpl	$(VEC_SIZE * 2), %r8d
+	je	L(misaligned_by_2x_vec_backward)
+	jb	L(misaligned_by_3x_vec_backward)
+#  elif CACHELINE_SIZE != (VEC_SIZE * 2)
+#   error Unsupported CACHELINE_SIZE!
+#  endif
+	/* Cacheline misaligned by VEC_SIZE.  */
+	VMOVU	(%rcx), %VEC(0)
+	subq	$VEC_SIZE, %rcx
+	subq	$VEC_SIZE, %rdx
+	VMOVA	%VEC(0), (%r9)
+	subq	$VEC_SIZE, %r9
+# endif
 L(loop_large_backward):
 	/* Copy 4 * VEC a time backward with non-temporal stores.  */
 	PREFETCH_ONE_SET (-1, (%rcx), -PREFETCHED_LOAD_SIZE * 2)
@@ -528,6 +594,33 @@ L(loop_large_backward):
 	VMOVU	%VEC(8), (%r11)
 	VZEROUPPER
 	ret
+
+# if CACHELINE_SIZE == (VEC_SIZE * 4)
+L(misaligned_by_2x_vec_backward):
+	/* Cacheline misaligned by 2 * VEC_SIZE.  */
+	VMOVU	(%rcx), %VEC(0)
+	VMOVU	-VEC_SIZE(%rcx), %VEC(1)
+	subq	$(VEC_SIZE * 2), %rcx
+	subq	$(VEC_SIZE * 2), %rdx
+	VMOVA	%VEC(0), (%r9)
+	VMOVA	%VEC(1), -VEC_SIZE(%r9)
+	subq	$(VEC_SIZE * 2), %r9
+	jmp	L(loop_large_backward)
+
+L(misaligned_by_3x_vec_backward):
+	/* Cacheline misaligned by 3 * VEC_SIZE.  */
+	VMOVU	(%rcx), %VEC(0)
+	VMOVU	-VEC_SIZE(%rcx), %VEC(1)
+	VMOVU	-(VEC_SIZE * 2)(%rcx), %VEC(2)
+	subq	$(VEC_SIZE * 3), %rcx
+	subq	$(VEC_SIZE * 3), %rdx
+	VMOVA	%VEC(0), (%r9)
+	VMOVA	%VEC(1), -VEC_SIZE(%r9)
+	VMOVA	%VEC(2), -(VEC_SIZE * 2)(%r9)
+	subq	$(VEC_SIZE * 3), %r9
+	jmp	L(loop_large_backward)
+# endif
+
 #endif
 END (MEMMOVE_SYMBOL (__memmove, unaligned_erms))
 

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