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GNU C Library master sources branch master updated. glibc-2.17-388-g4f510e3
- From: roland at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 13 Mar 2013 00:05:33 -0000
- Subject: GNU C Library master sources branch master updated. glibc-2.17-388-g4f510e3
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- Log -----------------------------------------------------------------
http://sources.redhat.com/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=4f510e3aeeeb3fd974a12a71789fa9c63ab8c6dd
commit 4f510e3aeeeb3fd974a12a71789fa9c63ab8c6dd
Author: Roland McGrath <roland@hack.frob.com>
Date: Tue Mar 12 10:03:56 2013 -0700
ARM: Make armv6t2 memchr implementation usable without Thumb.
diff --git a/ports/ChangeLog.arm b/ports/ChangeLog.arm
index d24a109..2e250f7 100644
--- a/ports/ChangeLog.arm
+++ b/ports/ChangeLog.arm
@@ -1,5 +1,8 @@
2013-03-12 Roland McGrath <roland@hack.frob.com>
+ * sysdeps/arm/armv6t2/memchr.S [NO_THUMB]:
+ Use .arm rather than .thumb, .thumb_func. Avoid cbz/cnbz instructions.
+
* sysdeps/arm/armv6t2/memchr.S: Change register allocation so ldrd use
is r4,r5 rather than r5,r6; this way ARM mode will allow that ldrd.
diff --git a/ports/sysdeps/arm/armv6t2/memchr.S b/ports/sysdeps/arm/armv6t2/memchr.S
index e253a66..7f644c3 100644
--- a/ports/sysdeps/arm/armv6t2/memchr.S
+++ b/ports/sysdeps/arm/armv6t2/memchr.S
@@ -42,10 +42,12 @@
.syntax unified
.text
+#ifdef NO_THUMB
+ .arm
+#else
.thumb
-
-@ ---------------------------------------------------------------------------
.thumb_func
+#endif
.global memchr
.type memchr,%function
ENTRY(memchr)
@@ -89,14 +91,22 @@ ENTRY(memchr)
15:
ldrd r4,r5, [r0],#8
+#ifndef NO_THUMB
subs r6, r6, #8
+#endif
eor r4,r4, r1 @ Get it so that r4,r5 have 00's where the bytes match the target
eor r5,r5, r1
uadd8 r4, r4, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
sel r4, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
uadd8 r5, r5, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
sel r5, r4, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
+#ifndef NO_THUMB
cbnz r5, 60f
+#else
+ cmp r5, #0
+ bne 60f
+ subs r6, r6, #8
+#endif
bne 15b @ (Flags from the subs above) If not run out of bytes then go around again
pop {r4,r5,r6,r7}
@@ -110,13 +120,24 @@ ENTRY(memchr)
and r2,r2,#7 @ Leave the count remaining as the number after the double words have been done
20:
+#ifndef NO_THUMB
cbz r2, 40f @ 0 length or hit the end already then not found
+#else
+ cmp r2, #0
+ beq 40f
+#endif
21: @ Post aligned section, or just a short call
ldrb r3,[r0],#1
+#ifndef NO_THUMB
subs r2,r2,#1
eor r3,r3,r1 @ r3 = 0 if match - doesn't break flags from sub
cbz r3, 50f
+#else
+ eors r3, r3, r1
+ beq 50f
+ subs r2, r2, #1
+#endif
bne 21b @ on r2 flags
40:
http://sources.redhat.com/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=47c71d9323df1356ac803bdddb7a8f512faf9962
commit 47c71d9323df1356ac803bdddb7a8f512faf9962
Author: Roland McGrath <roland@hack.frob.com>
Date: Tue Mar 12 10:00:53 2013 -0700
ARM: Change register allocation in armv6t2 memchr implementation.
diff --git a/ports/ChangeLog.arm b/ports/ChangeLog.arm
index 8536181..d24a109 100644
--- a/ports/ChangeLog.arm
+++ b/ports/ChangeLog.arm
@@ -1,3 +1,8 @@
+2013-03-12 Roland McGrath <roland@hack.frob.com>
+
+ * sysdeps/arm/armv6t2/memchr.S: Change register allocation so ldrd use
+ is r4,r5 rather than r5,r6; this way ARM mode will allow that ldrd.
+
2013-03-11 Joseph Myers <joseph@codesourcery.com>
* sysdeps/arm/preconfigure.in: Add comment about
diff --git a/ports/sysdeps/arm/armv6t2/memchr.S b/ports/sysdeps/arm/armv6t2/memchr.S
index 6d35f47..e253a66 100644
--- a/ports/sysdeps/arm/armv6t2/memchr.S
+++ b/ports/sysdeps/arm/armv6t2/memchr.S
@@ -83,20 +83,20 @@ ENTRY(memchr)
orr r1, r1, r1, lsl #8 @ expand the match word across to all bytes
orr r1, r1, r1, lsl #16
- bic r4, r2, #7 @ Number of double words to work with * 8
+ bic r6, r2, #7 @ Number of double words to work with * 8
mvns r7, #0 @ all F's
movs r3, #0
15:
- ldrd r5,r6, [r0],#8
- subs r4, r4, #8
- eor r5,r5, r1 @ Get it so that r5,r6 have 00's where the bytes match the target
- eor r6,r6, r1
+ ldrd r4,r5, [r0],#8
+ subs r6, r6, #8
+ eor r4,r4, r1 @ Get it so that r4,r5 have 00's where the bytes match the target
+ eor r5,r5, r1
+ uadd8 r4, r4, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
+ sel r4, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
uadd8 r5, r5, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
- sel r5, r3, r7 @ bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
- uadd8 r6, r6, r7 @ Parallel add 0xff - sets the GE bits for anything that wasn't 0
- sel r6, r5, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
- cbnz r6, 60f
+ sel r5, r4, r7 @ chained....bytes are 00 for none-00 bytes, or ff for 00 bytes - NOTE INVERSION
+ cbnz r5, 60f
bne 15b @ (Flags from the subs above) If not run out of bytes then go around again
pop {r4,r5,r6,r7}
@@ -129,22 +129,22 @@ ENTRY(memchr)
60: @ We're here because the fast path found a hit - now we have to track down exactly which word it was
@ r0 points to the start of the double word after the one that was tested
- @ r5 has the 00/ff pattern for the first word, r6 has the chained value
+ @ r4 has the 00/ff pattern for the first word, r5 has the chained value
cfi_restore_state
- cmp r5, #0
+ cmp r4, #0
itte eq
- moveq r5, r6 @ the end is in the 2nd word
+ moveq r4, r5 @ the end is in the 2nd word
subeq r0,r0,#3 @ Points to 2nd byte of 2nd word
subne r0,r0,#7 @ or 2nd byte of 1st word
@ r0 currently points to the 2nd byte of the word containing the hit
- tst r5, # CHARTSTMASK(0) @ 1st character
+ tst r4, # CHARTSTMASK(0) @ 1st character
bne 61f
adds r0,r0,#1
- tst r5, # CHARTSTMASK(1) @ 2nd character
+ tst r4, # CHARTSTMASK(1) @ 2nd character
ittt eq
addeq r0,r0,#1
- tsteq r5, # (3<<15) @ 2nd & 3rd character
+ tsteq r4, # (3<<15) @ 2nd & 3rd character
@ If not the 3rd must be the last one
addeq r0,r0,#1
-----------------------------------------------------------------------
Summary of changes:
ports/ChangeLog.arm | 8 +++++
ports/sysdeps/arm/armv6t2/memchr.S | 55 ++++++++++++++++++++++++-----------
2 files changed, 46 insertions(+), 17 deletions(-)
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