[Bug libc/18185] Wrong processor count for L2 cache sharing on Silvermont and Knights Landing

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https://sourceware.org/bugzilla/show_bug.cgi?id=18185

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https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=b7598b1b855b39628104feb9a1f6151a86351a64

commit b7598b1b855b39628104feb9a1f6151a86351a64
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri May 20 14:41:14 2016 -0700

    Remove special L2 cache case for Knights Landing

    L2 cache is shared by 2 cores on Knights Landing, which has 4 threads
    per core:

    https://en.wikipedia.org/wiki/Xeon_Phi#Knights_Landing

    So L2 cache is shared by 8 threads on Knights Landing as reported by
    CPUID.  We should remove special L2 cache case for Knights Landing.

        [BZ #18185]
        * sysdeps/x86/cacheinfo.c (init_cacheinfo): Don't limit threads
        sharing L2 cache to 2 for Knights Landing.

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog               |    6 ++++++
 sysdeps/x86/cacheinfo.c |    2 --
 2 files changed, 6 insertions(+), 2 deletions(-)

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