This is the mail archive of the glibc-bugs@sourceware.org mailing list for the glibc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug ports/15492] ARM fesetenv doesn't preserve RunFast (reserved bits out of date)


http://sourceware.org/bugzilla/show_bug.cgi?id=15492

--- Comment #1 from joseph at codesourcery dot com <joseph at codesourcery dot com> 2013-05-20 12:12:32 UTC ---
On Mon, 20 May 2013, adam at spicenitz dot org wrote:

> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438h/CDEFCBDC.html
> 
> Given this new documentation, perhaps _FPU_RESERVED should now read as 0x8FF60.

You're looking at documentation for one particular processor, which lists 
as reserved bits that on other processors aren't reserved (e.g. trap 
enable bits).  DDI0406C suggests the correct reserved bits are 0x86060.

-- 
Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email
------- You are receiving this mail because: -------
You are on the CC list for the bug.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]