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Multi-arching tm_print_insn?



What's the story with putting tm_print_insn under gdbarch control?  It
looks like the existing targets just assign to tm_print_insn and
forget about it; switching architectures won't change your
disassembler.

Is this not done yet (perhaps waiting on further configury in
opcodes), or is there some subtlety I haven't noticed?

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