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[binutils-gdb] [AArch64] Add ARMv8.3 javascript floating-point conversion instruction


*** TEST RESULTS FOR COMMIT ccfc90a39b78b7bc4173cd9ead49d2aa59695378 ***

Author: Szabolcs Nagy <szabolcs.nagy@arm.com>
Branch: master
Commit: ccfc90a39b78b7bc4173cd9ead49d2aa59695378

[AArch64] Add ARMv8.3 javascript floating-point conversion instruction

Add support for ARMv8.3 FJCVTZS floating-point conversion
instruction.

For details about javascript floating-point conversion see
https://community.arm.com/groups/processors/blog/2016/10/27/armv8-a-architecture-2016-additions

opcodes/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-tbl.h (arch64_opcode_table): Add fjcvtzs.
	(QL_FP2INT_W_D, aarch64_feature_fp_v8_3, FP_V8_3): Define.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas/
2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* testsuite/gas/aarch64/fp-armv8_3.s: Add fjcvtzs test.
	* testsuite/gas/aarch64/fp-armv8_3.d: Likewise.
	* testsuite/gas/aarch64/illegal-fjcvtzs.s: Likewise.
	* testsuite/gas/aarch64/illegal-fjcvtzs.d: Likewise.
	* testsuite/gas/aarch64/illegal-fjcvtzs.l: Likewise.
	* testsuite/gas/aarch64/illegal-nofp-armv8_3.s: Likewise.
	* testsuite/gas/aarch64/illegal-nofp-armv8_3.d: Likewise.
	* testsuite/gas/aarch64/illegal-nofp-armv8_3.l: Likewise.


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