[binutils-gdb] [ARC] Update instruction type and delay slot info.

[sergiodj+buildbot at sergiodj dot net]

*** TEST RESULTS FOR COMMIT d9eca1df01c0e6f7f22566c154e63b1df9315790 ***

Author: Claudiu Zissulescu <claziss@synopsys.com>
Branch: master
Commit: d9eca1df01c0e6f7f22566c154e63b1df9315790

[ARC] Update instruction type and delay slot info.

This patch corrects the instructioninformation passed into the
disassebler_info structure.

include/
2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (insn_subclass_t): Add COND.
	(flag_class_t): Add F_CLASS_EXTEND.

opcodes/
2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	information.
	(print_insn_arc): Set insn_type information.
	* arc-opc.c (C_CC): Add F_CLASS_COND.
	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	(brne, brne_s, jeq_s, jne_s): Likewise.