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[binutils-gdb] [ARM] Clear reserved bits in CPSR


*** TEST RESULTS FOR COMMIT 3539aa13fbcadd930b0b6d8a97f9f125f02a73dc ***

Author: Yao Qi <yao.qi@linaro.org>
Branch: master
Commit: 3539aa13fbcadd930b0b6d8a97f9f125f02a73dc

[ARM] Clear reserved bits in CPSR

Bits 20 ~ 23 of CPSR are reserved (RAZ, read as zero), but they are not
zero if the arm program runs on aarch64-linux.  AArch64 tracer gets PSTATE
from arm 32-bit tracee as CPSR, but bits 20 ~ 23 are used in PSTATE.  I
think kernel should clear these bits when it is read through ptrace, but
the fix in user space is still needed.

This patch fixes these two fails,

-FAIL: gdb.reverse/insn-reverse.exp: ext_reg_push_pop: compare registers on insn 0:vldr	d7, [r11, #-12]
-FAIL: gdb.reverse/insn-reverse.exp: ext_reg_push_pop: compare registers on insn 0:vldr	d7, [r7]

gdb:

2016-04-22  Yao Qi  <yao.qi@linaro.org>

	* aarch32-linux-nat.c (aarch32_gp_regcache_supply): Clear CPSR
	bits 20 to 23.

gdb/gdbserver:

2016-04-22  Yao Qi  <yao.qi@linaro.org>

	* linux-aarch32-low.c (arm_store_gregset): Clear CPSR bits 20
	to 23.


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