[Bug gdb/22938] New: multibit register bitfields are not properly displayed

["matthias at welwarsky dot de" <sourceware-bugzilla at sourceware dot org>]

https://sourceware.org/bugzilla/show_bug.cgi?id=22938

            Bug ID: 22938
           Summary: multibit register bitfields are not properly displayed
           Product: gdb
           Version: HEAD
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: gdb
          Assignee: unassigned at sourceware dot org
          Reporter: matthias at welwarsky dot de
  Target Milestone: ---

Created attachment 10878
  --> https://sourceware.org/bugzilla/attachment.cgi?id=10878&action=edit
target description generated by openocd

OpenOCD sends a target description xml to make gdb understand the registers it
supports. I've added a type for the ARMv8 CPSR register, using the
aarch64-core.xml from gdb as a guideline. This is the relevant snippet:

<flags id="cpsr_flags" size="4">
<field name="SP" start="0" end="0" type="uint8" />
<field name="EL" start="2" end="3" type="uint8" />
<field name="T32" start="4" end="4" type="uint8" />
<field name="F" start="6" end="6" type="bool" />
<field name="I" start="7" end="7" type="bool" />
<field name="A" start="8" end="8" type="bool" />
<field name="D" start="9" end="9" type="bool" />
<field name="IL" start="20" end="20" type="bool" />
<field name="SS" start="21" end="21" type="bool" />
<field name="V" start="28" end="28" type="bool" />
<field name="C" start="29" end="29" type="bool" />
<field name="Z" start="30" end="30" type="bool" />
<field name="N" start="31" end="31" type="bool" />
</flags>
<reg name="cpsr" bitsize="32" regnum="33" save-restore="yes" type="cpsr_flags"
group="general"/>

However, "info reg" shows this:

cpsr           0x800003c9          [ SP=1 EL=0 T32=0 F I A D N ]

The value for EL is not correct. It should be EL=2

Why is it so?

Full target description attached

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