This is the mail archive of the gdb-prs@sourceware.org mailing list for the GDB project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug tdep/20682] aarch64 regression: gdb.cp/nextoverthrow.exp


https://sourceware.org/bugzilla/show_bug.cgi?id=20682

--- Comment #1 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Yao Qi <qiyao@sourceware.org>:

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=187f5d00acf0ffe5390f282fd4d6285bcd6fccb9

commit 187f5d00acf0ffe5390f282fd4d6285bcd6fccb9
Author: Yao Qi <yao.qi@linaro.org>
Date:   Tue Oct 11 12:12:46 2016 +0100

    [AArch64] Track FP registers in prologue analyzer

    We don't track FP registers in aarch64 prologue analyzer, so this causes
    an internal error when FP registers are saved by "stp" instruction in
    prologue (stp       d8, d9, [sp,#128]),

     tbreak _Unwind_RaiseException^M
     aarch64-tdep.c:335: internal-error: CORE_ADDR
aarch64_analyze_prologue(gdbarch*, CORE_ADDR, CORE_ADDR,
aarch64_prologue_cache*): Assertion `inst.operands[0].type == AARCH64_OPND_Rt'
failed.^M
     A problem internal to GDB has been detected,

    This patch teaches GDB to track FP registers (D registers) in prologue
    analyzer.

    gdb:

    2016-10-12  Yao Qi  <yao.qi@linaro.org>

        PR tdep/20682
        * aarch64-tdep.c: Replace 32 with AARCH64_D_REGISTER_COUNT.
        (aarch64_analyze_prologue): Extend array 'regs' for D registers.
        Assert that operand 0 and 1 can be X or D registers.  Update
        register number for D registers.  Update registers in frame
        cache.
        * aarch64-tdep.h (AARCH64_D_REGISTER_COUNT): New macro.

-- 
You are receiving this mail because:
You are on the CC list for the bug.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]