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Re: [PATCH 7/11] Add BFIN_MAX_REGISTER_SIZE
- From: Pedro Alves <palves at redhat dot com>
- To: Alan Hayward <Alan dot Hayward at arm dot com>, "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>
- Cc: nd <nd at arm dot com>
- Date: Wed, 5 Apr 2017 16:03:49 +0100
- Subject: Re: [PATCH 7/11] Add BFIN_MAX_REGISTER_SIZE
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On 04/04/2017 11:14 AM, Alan Hayward wrote:
> Max size set to 32bits, which I determined using regformats/reg-bfin.dat
Makes me wonder sth (and in general, not for this patch in particular):
Is it possible that any of these code paths that hardcode an arch specific
max register size end up seeing a larger register size because the reported
xml target description includes such a larger register?
E.g., say arch A normally only has 32-bit registers, for as much GDB knows.
And then some stub for some variant of A includes a register
in the description like:
<reg name="foo" bitsize="64" type="uint64"/>
It kinds of sounds like the max register size is capped by what target
descriptions can describe for that architecture, not exactly by the size
of the registers that GDB considers "core" registers. That may
already have been taken into account and it may well be that the paths
that use the FOO_MAX_REGISTER_SIZE macros only ever work with registers
that GDB does know about (haven't checked carefully), rendering the concern
moot, but I wanted to put the thought out there anyway.
Thanks,
Pedro Alves