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Re: [PATCH v5 1/4] gdb: Add OpenRISC or1k and or1knd target support


> Date: Fri, 17 Mar 2017 18:32:47 +0900
> From: Stafford Horne <shorne@gmail.com>
> Cc: gdb-patches@sourceware.org, franck.jullien@gmail.com,
> 	openrisc@lists.librecores.org
> 
> > > +The OpenRISC 1000 architecture has evolved since the first port for
> > > +@value{GDBN}.  In particular the structure of the Unit Present register has
> > > +changed and the CPU Configuration register has been added.  The port of
> > > +@value{GDBN} version @value{GDBVN} uses the @emph{current}
> > > +specification of the OpenRISC 1000.
> > 
> > I'm not sure what this text conveys.  Can you tell why it is important
> > to have this information in the manual?  I might then suggest a change
> > in wording.
> 
> Its saying that if you are using an old version of the CPU it might not
> run as expected with this version of GDB.  Ill change to explain that
> without talking about previous ports of GDB.
> 
> Something like:
> 
>   Earlier version of the OpenRISC architecture did not include the UPR
>   (unit present) or CPUCFGR (CPU configuration) registers.  This version
>   of @value{GDBN} expects these to be present.

That's okay, but we should also tell the reader what to do if the
expected registers are not present.  Is there anything they could do
except upgrade to a newer version of OpenRISC?


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