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RE: [PATCH 2/5] arc: Set section to ".text" when disassembling
- From: Anton Kolesov <Anton dot Kolesov at synopsys dot com>
- To: Pedro Alves <palves at redhat dot com>, Yao Qi <qiyaoltc at gmail dot com>
- Cc: "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>, Francois Bedard <Francois dot Bedard at synopsys dot com>
- Date: Wed, 15 Mar 2017 15:16:31 +0000
- Subject: RE: [PATCH 2/5] arc: Set section to ".text" when disassembling
- Authentication-results: sourceware.org; auth=none
- References: <20170214100130.29194-1-Anton.Kolesov@synopsys.com> <20170214100130.29194-2-Anton.Kolesov@synopsys.com> <CAH=s-POacRUV_BBWMxt4hT0ohAO7w182tpt6AWRgaFNgU0Ru2g@mail.gmail.com> <39A54937CC95F24AA2F794E2D2B66B1358249A97@DE02WEMBXB.internal.synopsys.com> <d38ec97b-91fe-e852-70a5-df5b6ed9d434@redhat.com>
>
> On 02/16/2017 04:35 PM, Anton Kolesov wrote:
> > Hi Yao,
> >
> >> info->section should be valid, but why must it be ".text"? Can I
> >> info->disassembly
> >> instructions in .plt section? How about using find_pc_section (addr)
> >> to get the right section? like mep_gdb_print_insn.
> >
> > Actual section doesn't matter here because opcodes really need elf
> > header, which is just obtained through a section. I've used .text
> > simply because it is the section that is very likely to exist. Using
> > find_pc_section seems to be a much better solution, I wasn't aware of it.
> Will change this in second version of the patch.
>
> And even better approach would be to include the right arch in the xml
> target description, in the (existing) <architecture> element, and then
> somehow pass that info down to opcodes here...
In our BFD ARC EM and ARC HS are treated as same processor (ARC v2) and
differ via flags in private ELF header, so changing BFD arch will not work.
I'd need to change opcodes, so that it will accept processor as an argument,
instead of always reading ELF header. That would take a while, so I will
remove this patch from the series and will resubmit it later, separately
from prologue analysis. The only downside is that several architecture
specific test cases will not pass for ARC HS processor for the time being.
Anton
>
> Thanks,
> Pedro Alves