This is the mail archive of the gdb-patches@sourceware.org mailing list for the GDB project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH] Fix exception unwinding for ARM Cortex-M


Cortex-M has two stack pointers: MSP (Main Stack Pointer) and PSP (Process Stack Pointer).
This is not handled when GDB tries to backtrace in the exception stack unwinder.
Meaning for eg. Cortex-M4F its not possible to get any call-stack backtrace if setting a breakpoint in ISR, and floating-point variable was used.

This patch was inspired by the great work done by James-Adam Renquinha Henri, submitted April this year.

See
https://sourceware.org/ml/gdb-patches/2016-04/msg00170.html
https://bugs.launchpad.net/gcc-arm-embedded/+bug/1566054

Though it seems like the patch got some comments that were never finally addressed,
so I now tried to rewrite the patch from scratch, and try to address some of the issues raised by the maintainers.

But
* Still "psp" could (in theory) be mixed with a target that could pass 'another' PSP reg definition that is something else
(but seems very unlikely, and not really appropriate to use "psp" for something else).

* Still FPU regs could be lazy stacked and not correct, though a warning is now given to user in either case.
At least it makes the situation better than today, when no call-stack can be retrieved at all, for any registers.

The best solution would be as mailing threads proposed to have PSP and MSP defined in GDB.
Now eg. OpenOCD defines them which makes access to PSP possible.

I'm working in parallel with another patch that adds XML feature descriptions for 'arm-m-system-v6.xml' and 'arm-m-system-v7.xml'
that will define PSP and MSP in GDB which can then be used by exception unwinder code. Its not ready yet though.

The next thing would then be to also add FPU context control reg FPCCR, which is needed for retrieving info on the FPU lazy stacking.
Though its complicated I think and I will try to investigate an 'arm-m-fpu.xml' profile further, if this is solution perhaps.

Its needed by GDB to be aware of both MSP and PSP, and also FPCCR to be fully able to unwind exception stack properly.
Even if eg. OpenOCD could define these in run-time, these are still needed when eg. debugging a corefile off-line in GDB.

Please review patch and comment.

Best Regards,
Fredrik Hederstierna

Senior Software Developer
Verisure Innovation Centre
Malmoe Sweden

Attachment: gdb-cortex-m-exception-unwind.patch
Description: Binary data


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]