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[SH] Fix simulator on 64 bit hosts
- From: Oleg Endo <oleg dot endo at t-online dot de>
- To: gdb-patches at sourceware dot org
- Date: Sun, 10 Apr 2016 04:24:57 +0900
- Subject: [SH] Fix simulator on 64 bit hosts
- Authentication-results: sourceware.org; auth=none
Hi,
The attached patch fixes the SH simulator when ran on 64 bit hosts. It
seems there are quite a few adventurous or at least confusing integer
type casts, but the main problem was the widening 32 x 32 -> 64 bit
multiplication.
Tested by running the GCC testsuite and checking that 32 bit sim and 64
bit sim produce the same test results.
Cheers,
Oleg
sim/sh/ChangeLog:
* interp.c (dmul): Split into dmul_s and dmul_u. Use explicit
integer width types and simplify implementation.
* gencode.c (dmuls.l, dmulu.l): Use new functions dmul_s and
dmul_u.
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index aa26e6c..f8f7074 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -405,11 +405,11 @@ static op tab[] =
},
{ "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
- "dmul (1/*signed*/, R[n], R[m]);",
+ "dmul_s (R[n], R[m]);",
},
{ "", "nm", "dmulu.l <REG_M>,<REG_N>", "0011nnnnmmmm0101",
- "dmul (0/*unsigned*/, R[n], R[m]);",
+ "dmul_u (R[n], R[m]);",
},
{ "n", "n", "dt <REG_N>", "0100nnnn00010000",
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 072f71d..b4914d1 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -577,7 +577,7 @@ rwat_fast (unsigned char *memory, int x, int maskw, int endianw)
static INLINE int
riat_fast (unsigned char *insn_ptr, int endianw)
{
- unsigned short *p = (unsigned short *) ((size_t) insn_ptr ^ endianw);
+ unsigned short *p = (unsigned short *) ((uintptr_t) insn_ptr ^ endianw);
return *p;
}
@@ -1201,41 +1201,19 @@ div1 (int *R, int iRn2, int iRn1/*, int T*/)
}
static void
-dmul (int sign, unsigned int rm, unsigned int rn)
-{
- unsigned long RnL, RnH;
- unsigned long RmL, RmH;
- unsigned long temp0, temp1, temp2, temp3;
- unsigned long Res2, Res1, Res0;
-
- RnL = rn & 0xffff;
- RnH = (rn >> 16) & 0xffff;
- RmL = rm & 0xffff;
- RmH = (rm >> 16) & 0xffff;
- temp0 = RmL * RnL;
- temp1 = RmH * RnL;
- temp2 = RmL * RnH;
- temp3 = RmH * RnH;
- Res2 = 0;
- Res1 = temp1 + temp2;
- if (Res1 < temp1)
- Res2 += 0x00010000;
- temp1 = (Res1 << 16) & 0xffff0000;
- Res0 = temp0 + temp1;
- if (Res0 < temp0)
- Res2 += 1;
- Res2 += ((Res1 >> 16) & 0xffff) + temp3;
-
- if (sign)
- {
- if (rn & 0x80000000)
- Res2 -= rm;
- if (rm & 0x80000000)
- Res2 -= rn;
- }
+dmul_s (uint32_t rm, uint32_t rn)
+{
+ int64_t res = (int64_t)(int32_t)rm * (int64_t)(int32_t)rn;
+ MACH = (uint32_t)((uint64_t)res >> 32);
+ MACL = (uint32_t)res;
+}
- MACH = Res2;
- MACL = Res0;
+static void
+dmul_u (uint32_t rm, uint32_t rn)
+{
+ uint64_t res = (uint64_t)(uint32_t)rm * (uint64_t)(uint32_t)rn;
+ MACH = (uint32_t)(res >> 32);
+ MACL = (uint32_t)res;
}
static void