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Re: [RFC][PATCH 09/15] gdb: Add relocate instruction helpers
- From: Yao Qi <qiyaoltc at gmail dot com>
- To: Simon Marchi <simon dot marchi at ericsson dot com>
- Cc: Yao Qi <qiyaoltc at gmail dot com>, <henrik dot wallin at windriver dot com>, <gdb-patches at sourceware dot org>, Antoine Tremblay <antoine dot tremblay at ericsson dot com>
- Date: Mon, 23 Nov 2015 11:00:16 +0000
- Subject: Re: [RFC][PATCH 09/15] gdb: Add relocate instruction helpers
- Authentication-results: sourceware.org; auth=none
- References: <cover dot 1444820235 dot git dot henrik dot wallin at windriver dot com> <cover dot 1444820235 dot git dot henrik dot wallin at windriver dot com> <b3dfc6c9e6fdba064a0925c137723e63d3103362 dot 1444820235 dot git dot henrik dot wallin at windriver dot com> <86mvv4zhfj dot fsf at gmail dot com> <564F6131 dot 8030805 at ericsson dot com>
Simon Marchi <firstname.lastname@example.org> writes:
> It seems like the code that Henrik adds in this patch (for relocating an
> instruction) is very similar to the code currently in arm-tdep.c for
> displaced stepping. I think we can extract it and place it in arch/,
> then use it both for displaced stepping and fast tracepoints. That's
> what aarch64 does currently, is that right? Do you think it's the
> right way to go for arm as well?
Yes, I think the instruction decoding part in arm for instruction
relocation (for both fast tracepoint and displaced stepping) can be
shared. The possibility of code sharing was considered at the beginning
of aarch64 work. However, this possibility wasn't considered, AFICS,
when the arm displaced stepping was added, so I am afraid we need to
refactor, if not rewrite, the existing arm displaced stepping code a lot
for the purpose of sharing code. It must take much effort.
On the other hand, GDBserver can't move threads out of jump pad without
hardware single step, which is a showstopper to ARM linux fast
In short, it is right to share code, but we need to figure out how to
move threads out of jump pad on ARM linux first. Secondly, rewrite arm
displaced stepping code, and share decoding part with fast tracepoint
instruction relocation. Unfortunately, the first one is still an open
question to me.