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Re: Fix ARM stepping over Thumb-mode "bx pc" or "blx pc"
- From: Yao Qi <yao at codesourcery dot com>
- To: "Joseph S. Myers" <joseph at codesourcery dot com>
- Cc: <gdb-patches at sourceware dot org>
- Date: Sat, 11 Aug 2012 15:45:21 +0800
- Subject: Re: Fix ARM stepping over Thumb-mode "bx pc" or "blx pc"
- References: <Pine.LNX.4.64.1208101705020.7722@digraph.polyomino.org.uk>
On 08/11/2012 01:06 AM, Joseph S. Myers wrote:
> arm-tdep.c has code to determine the next instruction for use in
> single stepping. This code fails to handle a Thumb-mode "bx pc" or
> "blx pc" correctly; it acts as if the branch target (four bytes after
> the current instruction) should be in Thumb mode, when actually these
Yes, as we can see, at the beginning of thumb_get_next_pc_raw, the
'pc_val' is converted to THUMB_ADDR,
static CORE_ADDR
thumb_get_next_pc_raw (struct frame_info *frame, CORE_ADDR pc)
{
[...]
pc_val = MAKE_THUMB_ADDR (pc_val)
> Index: gdb/arm-tdep.c
> ===================================================================
> RCS file: /cvs/src/src/gdb/arm-tdep.c,v
> retrieving revision 1.365
> diff -u -r1.365 arm-tdep.c
> --- gdb/arm-tdep.c 25 Jun 2012 12:32:45 -0000 1.365
> +++ gdb/arm-tdep.c 10 Aug 2012 15:18:37 -0000
> @@ -4541,7 +4541,7 @@
> else if ((inst1 & 0xff00) == 0x4700) /* bx REG, blx REG */
> {
> if (bits (inst1, 3, 6) == 0x0f)
> - nextpc = pc_val;
> + nextpc = pc_val & 0xfffffffc;
> else
> nextpc = get_frame_register_unsigned (frame, bits (inst1, 3, 6));
> }
I don't have any preference on clearing either the last one bit in
address or the last two bits. Looks like two ways coexist in arm-tdep.c
nowadays. As 'pc_val' is set by MAKE_THUMB_ADDR at the beginning, it is
better to revert its change by using UNMAKE_THUMB_ADDR (which only
clears the last one bit of address).
--
Yao (éå)