RFC: Complete x32 GDB patch

["H.J. Lu" <hongjiu dot lu at intel dot com>]

Hi,

This is the complete x32 GDB patch. The main changes are

1. Set gdbarch_ptr_bit to 32 for x32
2. Check bits_per_word instead of gdbarch_ptr_bit for ia32 process.
3. Check bits_per_word instead of gdbarch_ptr_bit for x86-64
fxsave/xsave.

Thanks.
 

H.J.
----
diff --git a/gdb/amd64-linux-nat.c b/gdb/amd64-linux-nat.c
index 5ebba3a..97c9a49 100644
--- a/gdb/amd64-linux-nat.c
+++ b/gdb/amd64-linux-nat.c
@@ -442,7 +442,7 @@ ps_err_e
 ps_get_thread_area (const struct ps_prochandle *ph,
                     lwpid_t lwpid, int idx, void **base)
 {
-  if (gdbarch_ptr_bit (target_gdbarch) == 32)
+  if (gdbarch_bfd_arch_info (target_gdbarch)->bits_per_word == 32)
     {
       /* The full structure is found in <asm-i386/ldt.h>.  The second
 	 integer is the LDT's base_address and that is used to locate
@@ -591,6 +591,67 @@ typedef struct compat_siginfo
   } _sifields;
 } compat_siginfo_t;
 
+/* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes.  */
+typedef long __attribute__ ((__aligned__ (4))) compat_x32_clock_t;
+
+typedef struct compat_x32_siginfo
+{
+  int si_signo;
+  int si_errno;
+  int si_code;
+
+  union
+  {
+    int _pad[((128 / sizeof (int)) - 3)];
+
+    /* kill() */
+    struct
+    {
+      unsigned int _pid;
+      unsigned int _uid;
+    } _kill;
+
+    /* POSIX.1b timers */
+    struct
+    {
+      compat_timer_t _tid;
+      int _overrun;
+      compat_sigval_t _sigval;
+    } _timer;
+
+    /* POSIX.1b signals */
+    struct
+    {
+      unsigned int _pid;
+      unsigned int _uid;
+      compat_sigval_t _sigval;
+    } _rt;
+
+    /* SIGCHLD */
+    struct
+    {
+      unsigned int _pid;
+      unsigned int _uid;
+      int _status;
+      compat_x32_clock_t _utime;
+      compat_x32_clock_t _stime;
+    } _sigchld;
+
+    /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+    struct
+    {
+      unsigned int _addr;
+    } _sigfault;
+
+    /* SIGPOLL */
+    struct
+    {
+      int _band;
+      int _fd;
+    } _sigpoll;
+  } _sifields;
+} compat_x32_siginfo_t __attribute__ ((__aligned__ (8)));
+
 #define cpt_si_pid _sifields._kill._pid
 #define cpt_si_uid _sifields._kill._uid
 #define cpt_si_timerid _sifields._timer._tid
@@ -724,6 +785,120 @@ siginfo_from_compat_siginfo (siginfo_t *to, compat_siginfo_t *from)
     }
 }
 
+static void
+compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t *to,
+				 siginfo_t *from)
+{
+  memset (to, 0, sizeof (*to));
+
+  to->si_signo = from->si_signo;
+  to->si_errno = from->si_errno;
+  to->si_code = from->si_code;
+
+  if (to->si_code == SI_TIMER)
+    {
+      to->cpt_si_timerid = from->si_timerid;
+      to->cpt_si_overrun = from->si_overrun;
+      to->cpt_si_ptr = (intptr_t) from->si_ptr;
+    }
+  else if (to->si_code == SI_USER)
+    {
+      to->cpt_si_pid = from->si_pid;
+      to->cpt_si_uid = from->si_uid;
+    }
+  else if (to->si_code < 0)
+    {
+      to->cpt_si_pid = from->si_pid;
+      to->cpt_si_uid = from->si_uid;
+      to->cpt_si_ptr = (intptr_t) from->si_ptr;
+    }
+  else
+    {
+      switch (to->si_signo)
+	{
+	case SIGCHLD:
+	  to->cpt_si_pid = from->si_pid;
+	  to->cpt_si_uid = from->si_uid;
+	  to->cpt_si_status = from->si_status;
+	  to->cpt_si_utime = from->si_utime;
+	  to->cpt_si_stime = from->si_stime;
+	  break;
+	case SIGILL:
+	case SIGFPE:
+	case SIGSEGV:
+	case SIGBUS:
+	  to->cpt_si_addr = (intptr_t) from->si_addr;
+	  break;
+	case SIGPOLL:
+	  to->cpt_si_band = from->si_band;
+	  to->cpt_si_fd = from->si_fd;
+	  break;
+	default:
+	  to->cpt_si_pid = from->si_pid;
+	  to->cpt_si_uid = from->si_uid;
+	  to->cpt_si_ptr = (intptr_t) from->si_ptr;
+	  break;
+	}
+    }
+}
+
+static void
+siginfo_from_compat_x32_siginfo (siginfo_t *to,
+				 compat_x32_siginfo_t *from)
+{
+  memset (to, 0, sizeof (*to));
+
+  to->si_signo = from->si_signo;
+  to->si_errno = from->si_errno;
+  to->si_code = from->si_code;
+
+  if (to->si_code == SI_TIMER)
+    {
+      to->si_timerid = from->cpt_si_timerid;
+      to->si_overrun = from->cpt_si_overrun;
+      to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
+    }
+  else if (to->si_code == SI_USER)
+    {
+      to->si_pid = from->cpt_si_pid;
+      to->si_uid = from->cpt_si_uid;
+    }
+  if (to->si_code < 0)
+    {
+      to->si_pid = from->cpt_si_pid;
+      to->si_uid = from->cpt_si_uid;
+      to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
+    }
+  else
+    {
+      switch (to->si_signo)
+	{
+	case SIGCHLD:
+	  to->si_pid = from->cpt_si_pid;
+	  to->si_uid = from->cpt_si_uid;
+	  to->si_status = from->cpt_si_status;
+	  to->si_utime = from->cpt_si_utime;
+	  to->si_stime = from->cpt_si_stime;
+	  break;
+	case SIGILL:
+	case SIGFPE:
+	case SIGSEGV:
+	case SIGBUS:
+	  to->si_addr = (void *) (intptr_t) from->cpt_si_addr;
+	  break;
+	case SIGPOLL:
+	  to->si_band = from->cpt_si_band;
+	  to->si_fd = from->cpt_si_fd;
+	  break;
+	default:
+	  to->si_pid = from->cpt_si_pid;
+	  to->si_uid = from->cpt_si_uid;
+	  to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr;
+	  break;
+	}
+    }
+}
+
 /* Convert a native/host siginfo object, into/from the siginfo in the
    layout of the inferiors' architecture.  Returns true if any
    conversion was done; false otherwise.  If DIRECTION is 1, then copy
@@ -733,9 +908,10 @@ siginfo_from_compat_siginfo (siginfo_t *to, compat_siginfo_t *from)
 static int
 amd64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction)
 {
+  struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
      object.  */
-  if (gdbarch_addr_bit (get_frame_arch (get_current_frame ())) == 32)
+  if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
     {
       gdb_assert (sizeof (siginfo_t) == sizeof (compat_siginfo_t));
 
@@ -746,6 +922,20 @@ amd64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction)
 
       return 1;
     }
+  /* No fixup for native x32 GDB.  */
+  else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
+    {
+      gdb_assert (sizeof (siginfo_t) == sizeof (compat_x32_siginfo_t));
+
+      if (direction == 0)
+	compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo *) inf,
+					 native);
+      else
+	siginfo_from_compat_x32_siginfo (native,
+					 (struct compat_x32_siginfo *) inf);
+
+      return 1;
+    }
   else
     return 0;
 }
@@ -755,16 +945,23 @@ amd64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction)
    Value of CS segment register:
      1. 64bit process: 0x33.
      2. 32bit process: 0x23.
+
+   Value of DS segment register:
+     1. LP64 process: 0x0.
+     2. X32 process: 0x2b.
  */
 
 #define AMD64_LINUX_USER64_CS	0x33
+#define AMD64_LINUX_X32_DS	0x2b
 
 static const struct target_desc *
 amd64_linux_read_description (struct target_ops *ops)
 {
   unsigned long cs;
+  unsigned long ds;
   int tid;
   int is_64bit;
+  int is_x32;
   static uint64_t xcr0;
 
   /* GNU/Linux LWP ID's are process ID's.  */
@@ -781,6 +978,18 @@ amd64_linux_read_description (struct target_ops *ops)
 
   is_64bit = cs == AMD64_LINUX_USER64_CS;
 
+  /* Get DS register.  */
+  errno = 0;
+  ds = ptrace (PTRACE_PEEKUSER, tid,
+	       offsetof (struct user_regs_struct, ds), 0);
+  if (errno != 0)
+    perror_with_name (_("Couldn't get DS register"));
+
+  is_x32 = ds == AMD64_LINUX_X32_DS;
+
+  if (sizeof (void *) == 4 && is_64bit && !is_x32)
+    error (_("Can't debug 64-bit process with 32-bit GDB"));
+
   if (have_ptrace_getregset == -1)
     {
       uint64_t xstateregs[(I386_XSTATE_SSE_SIZE / sizeof (uint64_t))];
@@ -808,14 +1017,24 @@ amd64_linux_read_description (struct target_ops *ops)
       && (xcr0 & I386_XSTATE_AVX_MASK) == I386_XSTATE_AVX_MASK)
     {
       if (is_64bit)
-	return tdesc_amd64_avx_linux;
+	{
+	  if (is_x32)
+	    return tdesc_x32_avx_linux;
+	  else
+	    return tdesc_amd64_avx_linux;
+	}
       else
 	return tdesc_i386_avx_linux;
     }
   else
     {
       if (is_64bit)
-	return tdesc_amd64_linux;
+	{
+	  if (is_x32)
+	    return tdesc_x32_linux;
+	  else
+	    return tdesc_amd64_linux;
+	}
       else
 	return tdesc_i386_linux;
     }
diff --git a/gdb/amd64-linux-tdep.c b/gdb/amd64-linux-tdep.c
index da22c1c..00e9436 100644
--- a/gdb/amd64-linux-tdep.c
+++ b/gdb/amd64-linux-tdep.c
@@ -41,6 +41,8 @@
 
 #include "features/i386/amd64-linux.c"
 #include "features/i386/amd64-avx-linux.c"
+#include "features/i386/x32-linux.c"
+#include "features/i386/x32-avx-linux.c"
 
 /* The syscall's XML filename for i386.  */
 #define XML_SYSCALL_FILENAME_AMD64 "syscalls/amd64-linux.xml"
@@ -104,7 +106,7 @@ int amd64_linux_gregset_reg_offset[] =
 #define LINUX_SIGTRAMP_INSN1	0x0f	/* syscall */
 #define LINUX_SIGTRAMP_OFFSET1	7
 
-static const gdb_byte linux_sigtramp_code[] =
+static const gdb_byte amd64_linux_sigtramp_code[] =
 {
   /* mov $__NR_rt_sigreturn, %rax */
   LINUX_SIGTRAMP_INSN0, 0xc7, 0xc0, 0x0f, 0x00, 0x00, 0x00,
@@ -112,7 +114,15 @@ static const gdb_byte linux_sigtramp_code[] =
   LINUX_SIGTRAMP_INSN1, 0x05
 };
 
-#define LINUX_SIGTRAMP_LEN (sizeof linux_sigtramp_code)
+static const gdb_byte x32_linux_sigtramp_code[] =
+{
+  /* mov $__NR_rt_sigreturn, %rax.  */
+  LINUX_SIGTRAMP_INSN0, 0xc7, 0xc0, 0x01, 0x02, 0x00, 0x40,
+  /* syscall */
+  LINUX_SIGTRAMP_INSN1, 0x05
+};
+
+#define LINUX_SIGTRAMP_LEN (sizeof amd64_linux_sigtramp_code)
 
 /* If PC is in a sigtramp routine, return the address of the start of
    the routine.  Otherwise, return 0.  */
@@ -120,6 +130,8 @@ static const gdb_byte linux_sigtramp_code[] =
 static CORE_ADDR
 amd64_linux_sigtramp_start (struct frame_info *this_frame)
 {
+  struct gdbarch *gdbarch;
+  const gdb_byte *sigtramp_code;
   CORE_ADDR pc = get_frame_pc (this_frame);
   gdb_byte buf[LINUX_SIGTRAMP_LEN];
 
@@ -143,7 +155,12 @@ amd64_linux_sigtramp_start (struct frame_info *this_frame)
 	return 0;
     }
 
-  if (memcmp (buf, linux_sigtramp_code, LINUX_SIGTRAMP_LEN) != 0)
+  gdbarch = get_frame_arch (this_frame);
+  if (gdbarch_ptr_bit (gdbarch) == 32)
+    sigtramp_code = x32_linux_sigtramp_code;
+  else
+    sigtramp_code = amd64_linux_sigtramp_code;
+  if (memcmp (buf, sigtramp_code, LINUX_SIGTRAMP_LEN) != 0)
     return 0;
 
   return pc;
@@ -1272,9 +1289,15 @@ amd64_linux_core_read_description (struct gdbarch *gdbarch,
   switch ((xcr0 & I386_XSTATE_AVX_MASK))
     {
     case I386_XSTATE_AVX_MASK:
-      return tdesc_amd64_avx_linux;
+      if (gdbarch_ptr_bit (gdbarch) == 32)
+	return tdesc_x32_avx_linux;
+      else
+	return tdesc_amd64_avx_linux;
     default:
-      return tdesc_amd64_linux;
+      if (gdbarch_ptr_bit (gdbarch) == 32)
+	return tdesc_x32_linux;
+      else
+	return tdesc_amd64_linux;
     }
 }
 
@@ -1301,7 +1324,13 @@ amd64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   set_gdbarch_num_regs (gdbarch, AMD64_LINUX_NUM_REGS);
 
   if (! tdesc_has_registers (tdesc))
-    tdesc = tdesc_amd64_linux;
+    {
+      if (info.abfd != NULL
+	  && (info.bfd_arch_info->mach & bfd_mach_x64_32))
+	tdesc = tdesc_x32_linux;
+      else
+	tdesc = tdesc_amd64_linux;
+    }
   tdep->tdesc = tdesc;
 
   feature = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.linux");
@@ -1322,8 +1351,12 @@ amd64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   tdep->xsave_xcr0_offset = I386_LINUX_XSAVE_XCR0_OFFSET;
 
   /* GNU/Linux uses SVR4-style shared libraries.  */
-  set_solib_svr4_fetch_link_map_offsets
-    (gdbarch, svr4_lp64_fetch_link_map_offsets);
+  if (tdesc_architecture (tdesc)->mach & bfd_mach_x64_32)
+    set_solib_svr4_fetch_link_map_offsets
+      (gdbarch, svr4_ilp32_fetch_link_map_offsets);
+  else
+    set_solib_svr4_fetch_link_map_offsets
+      (gdbarch, svr4_lp64_fetch_link_map_offsets);
 
   /* Add the %orig_rax register used for syscall restarting.  */
   set_gdbarch_write_pc (gdbarch, amd64_linux_write_pc);
@@ -1541,8 +1574,12 @@ _initialize_amd64_linux_tdep (void)
 {
   gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x86_64,
 			  GDB_OSABI_LINUX, amd64_linux_init_abi);
+  gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x64_32,
+			  GDB_OSABI_LINUX, amd64_linux_init_abi);
 
   /* Initialize the Linux target description.  */
   initialize_tdesc_amd64_linux ();
   initialize_tdesc_amd64_avx_linux ();
+  initialize_tdesc_x32_linux ();
+  initialize_tdesc_x32_avx_linux ();
 }
diff --git a/gdb/amd64-linux-tdep.h b/gdb/amd64-linux-tdep.h
index 0338b6e..49bb95e 100644
--- a/gdb/amd64-linux-tdep.h
+++ b/gdb/amd64-linux-tdep.h
@@ -34,6 +34,8 @@
 /* Linux target description.  */
 extern struct target_desc *tdesc_amd64_linux;
 extern struct target_desc *tdesc_amd64_avx_linux;
+extern struct target_desc *tdesc_x32_linux;
+extern struct target_desc *tdesc_x32_avx_linux;
 
 /* Enum that defines the syscall identifiers for amd64 linux.
    Used for process record/replay, these will be translated into
diff --git a/gdb/amd64-nat.c b/gdb/amd64-nat.c
index 6865456..d79b71b 100644
--- a/gdb/amd64-nat.c
+++ b/gdb/amd64-nat.c
@@ -59,7 +59,7 @@ amd64_native_gregset_reg_offset (struct gdbarch *gdbarch, int regnum)
 
   gdb_assert (regnum >= 0);
 
-  if (gdbarch_ptr_bit (gdbarch) == 32)
+  if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
     {
       reg_offset = amd64_native_gregset32_reg_offset;
       num_regs = amd64_native_gregset32_num_regs;
@@ -96,7 +96,7 @@ amd64_supply_native_gregset (struct regcache *regcache,
   int num_regs = amd64_native_gregset64_num_regs;
   int i;
 
-  if (gdbarch_ptr_bit (gdbarch) == 32)
+  if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
     num_regs = amd64_native_gregset32_num_regs;
 
   if (num_regs > gdbarch_num_regs (gdbarch))
@@ -127,7 +127,7 @@ amd64_collect_native_gregset (const struct regcache *regcache,
   int num_regs = amd64_native_gregset64_num_regs;
   int i;
 
-  if (gdbarch_ptr_bit (gdbarch) == 32)
+  if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
     {
       num_regs = amd64_native_gregset32_num_regs;
 
diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index d15acea..e64de21 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -43,6 +43,8 @@
 
 #include "features/i386/amd64.c"
 #include "features/i386/amd64-avx.c"
+#include "features/i386/x32.c"
+#include "features/i386/x32-avx.c"
 
 #include "ax.h"
 #include "ax-gdb.h"
@@ -256,9 +258,34 @@ static const char *amd64_word_names[] =
 static const char *amd64_dword_names[] =
 {
   "eax", "ebx", "ecx", "edx", "esi", "edi", "ebp", "esp", 
-  "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
+  "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d", "eip"
 };
 
+/* Return the GDB type object for the "standard" data type of data in
+   register REGNUM.  */
+
+static struct type *
+amd64_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
+{
+  /* Use pointer types for ebp, esp and eip registers in x32.  */
+  if (gdbarch_ptr_bit (gdbarch) == 32)
+    {
+      struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+      switch (regnum - tdep->eax_regnum)
+	{
+	default:
+	  break;
+	case AMD64_RBP_REGNUM:	/* ebp  */
+	case AMD64_RSP_REGNUM:	/* esp	*/
+	  return builtin_type (gdbarch)->builtin_data_ptr;
+	case AMD64_RIP_REGNUM:	/* eip */
+	  return builtin_type (gdbarch)->builtin_func_ptr;
+	}
+    }
+
+  return i386_pseudo_register_type (gdbarch, regnum);
+}
+
 /* Return the name of register REGNUM.  */
 
 static const char *
@@ -1900,10 +1927,14 @@ amd64_analyze_prologue (struct gdbarch *gdbarch,
       if (current_pc <= pc + 1)
         return current_pc;
 
-      /* Check for `movq %rsp, %rbp'.  */
+      /* Check for `movq %rsp, %rbp'.  Also check for `movl %esp, %ebp'
+	 if it is an x32 target.  */
       read_memory (pc + 1, buf, 3);
       if (memcmp (buf, mov_rsp_rbp_1, 3) != 0
-	  && memcmp (buf, mov_rsp_rbp_2, 3) != 0)
+	  && memcmp (buf, mov_rsp_rbp_2, 3) != 0
+	  && (gdbarch_ptr_bit (gdbarch) == 64
+	      || (memcmp (buf, mov_rsp_rbp_1 + 1, 2) != 0
+		  && memcmp (buf, mov_rsp_rbp_2 + 1, 2) != 0)))
 	return pc + 1;
 
       /* OK, we actually have a frame.  */
@@ -2590,7 +2621,13 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   tdep->sizeof_fpregset = I387_SIZEOF_FXSAVE;
 
   if (! tdesc_has_registers (tdesc))
-    tdesc = tdesc_amd64;
+    {
+      if (info.abfd != NULL
+	  && (info.bfd_arch_info->mach & bfd_mach_x64_32))
+	tdesc = tdesc_x32;
+      else
+	tdesc = tdesc_amd64;
+    }
   tdep->tdesc = tdesc;
 
   tdep->num_core_regs = AMD64_NUM_GREGS + I387_NUM_REGS;
@@ -2605,7 +2642,7 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 
   tdep->num_byte_regs = 20;
   tdep->num_word_regs = 16;
-  tdep->num_dword_regs = 16;
+  tdep->num_dword_regs = 17;
   /* Avoid wiring in the MMX registers for now.  */
   tdep->num_mmx_regs = 0;
 
@@ -2614,6 +2651,7 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   set_gdbarch_pseudo_register_write (gdbarch,
 				     amd64_pseudo_register_write);
 
+  set_tdesc_pseudo_register_type (gdbarch, amd64_pseudo_register_type);
   set_tdesc_pseudo_register_name (gdbarch, amd64_pseudo_register_name);
 
   /* AMD64 has an FPU and 16 SSE registers.  */
@@ -2621,9 +2659,20 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   tdep->num_xmm_regs = 16;
 
   /* This is what all the fuss is about.  */
-  set_gdbarch_long_bit (gdbarch, 64);
+  if (tdesc_architecture (tdesc)->mach & bfd_mach_x64_32)
+    {
+      set_gdbarch_long_bit (gdbarch, 32);
+      set_gdbarch_ptr_bit (gdbarch, 32);
+      tdep->sp_regnum_from_eax = AMD64_RSP_REGNUM;
+      tdep->pc_regnum_from_eax = AMD64_RIP_REGNUM;
+    }
+  else
+    {
+      set_gdbarch_long_bit (gdbarch, 64);
+      set_gdbarch_ptr_bit (gdbarch, 64);
+    }
+
   set_gdbarch_long_long_bit (gdbarch, 64);
-  set_gdbarch_ptr_bit (gdbarch, 64);
 
   /* In contrast to the i386, on AMD64 a `long double' actually takes
      up 128 bits, even though it's still based on the i387 extended
@@ -2701,6 +2750,8 @@ _initialize_amd64_tdep (void)
 {
   initialize_tdesc_amd64 ();
   initialize_tdesc_amd64_avx ();
+  initialize_tdesc_x32 ();
+  initialize_tdesc_x32_avx ();
 }
 
 
@@ -2725,7 +2776,8 @@ amd64_supply_fxsave (struct regcache *regcache, int regnum,
 
   i387_supply_fxsave (regcache, regnum, fxsave);
 
-  if (fxsave && gdbarch_ptr_bit (gdbarch) == 64)
+  if (fxsave
+      && gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 64)
     {
       const gdb_byte *regs = fxsave;
 
@@ -2747,7 +2799,8 @@ amd64_supply_xsave (struct regcache *regcache, int regnum,
 
   i387_supply_xsave (regcache, regnum, xsave);
 
-  if (xsave && gdbarch_ptr_bit (gdbarch) == 64)
+  if (xsave
+      && gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 64)
     {
       const gdb_byte *regs = xsave;
 
@@ -2775,7 +2828,7 @@ amd64_collect_fxsave (const struct regcache *regcache, int regnum,
 
   i387_collect_fxsave (regcache, regnum, fxsave);
 
-  if (gdbarch_ptr_bit (gdbarch) == 64)
+  if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 64)
     {
       if (regnum == -1 || regnum == I387_FISEG_REGNUM (tdep))
 	regcache_raw_collect (regcache, I387_FISEG_REGNUM (tdep), regs + 12);
@@ -2796,7 +2849,7 @@ amd64_collect_xsave (const struct regcache *regcache, int regnum,
 
   i387_collect_xsave (regcache, regnum, xsave, gcore);
 
-  if (gdbarch_ptr_bit (gdbarch) == 64)
+  if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 64)
     {
       if (regnum == -1 || regnum == I387_FISEG_REGNUM (tdep))
 	regcache_raw_collect (regcache, I387_FISEG_REGNUM (tdep),
diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index d18aa99..bfab991 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -2774,7 +2774,7 @@ i386_mmx_type (struct gdbarch *gdbarch)
 /* Return the GDB type object for the "standard" data type of data in
    register REGNUM.  */
 
-static struct type *
+struct type *
 i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
 {
   if (i386_mmx_regnum_p (gdbarch, regnum))
@@ -7454,6 +7454,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->num_mmx_regs = 8;
   tdep->num_ymm_regs = 0;
 
+  tdep->sp_regnum_from_eax = -1;
+  tdep->pc_regnum_from_eax = -1;
+
   tdesc_data = tdesc_data_alloc ();
 
   set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
@@ -7498,6 +7501,14 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       /* Support dword pseudo-register if it hasn't been disabled.  */
       tdep->eax_regnum = ymm0_regnum;
       ymm0_regnum += tdep->num_dword_regs;
+      if (tdep->sp_regnum_from_eax != -1)
+	set_gdbarch_sp_regnum (gdbarch,
+			       (tdep->eax_regnum
+				+ tdep->sp_regnum_from_eax));
+      if (tdep->pc_regnum_from_eax != -1)
+	set_gdbarch_pc_regnum (gdbarch,
+			       (tdep->eax_regnum
+				+ tdep->pc_regnum_from_eax));
     }
   else
     tdep->eax_regnum = -1;
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 870054f..7f17f3d 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -149,6 +149,14 @@ struct gdbarch_tdep
      of pseudo dword register support.  */
   int eax_regnum;
 
+  /* Register number for SP, relative to %eax.  Set this to -1 to
+     indicate the absence of pseudo SP register support.  */
+  int sp_regnum_from_eax;
+
+  /* Register number for PC, relative to %eax.  Set this to -1 to
+     indicate the absence of pseudo PC register support.  */
+  int pc_regnum_from_eax;
+
   /* Number of core registers.  */
   int num_core_regs;
 
@@ -307,6 +315,7 @@ extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
 
+extern struct type *i386_pseudo_register_type (struct gdbarch *, int);
 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
 					      int regnum);