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[PATCH] sim: bfin: set ASTAT AV/AVS when shifting accumulators overflow


From: Robin Getz <robin.getz@analog.com>

The LSHIFT/ASHIFT insns that work with accumulators lacked AV/AVS
handling in the ASTAT register, so add it to match the hardware.

Committed.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

2011-06-18  Robin Getz  <robin.getz@analog.com>

	* bfin-sim.c (decode_dsp32shift_0): Clear ASTAT[AV] if val is 0,
	else set it.  Set ASTAT[AVS] if val is 0.  Do this for LSHIFT and
	ASHIFT accumulator insns.
---
 sim/bfin/bfin-sim.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index dbfce6c..fe4dc26 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -5223,6 +5223,9 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
 
       STORE (AXREG (HLs), (val >> 32) & 0xff);
       STORE (AWREG (HLs), (val & 0xffffffff));
+      STORE (ASTATREG (av[HLs]), val == 0);
+      if (val == 0)
+	STORE (ASTATREG (avs[HLs]), 1);
     }
   else if (sop == 1 && sopcde == 3 && (HLs == 0 || HLs == 1))
     {
@@ -5240,6 +5243,9 @@ decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
 
       STORE (AXREG (HLs), (val >> 32) & 0xff);
       STORE (AWREG (HLs), (val & 0xffffffff));
+      STORE (ASTATREG (av[HLs]), val == 0);
+      if (val == 0)
+	STORE (ASTATREG (avs[HLs]), 1);
     }
   else if ((sop == 0 || sop == 1) && sopcde == 1)
     {
-- 
1.7.5.3


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