This is the mail archive of the
gdb-patches@sourceware.org
mailing list for the GDB project.
[patch] Use src/cpu files for m32r,iq2000 simulators
- From: Doug Evans <dje at sebabeach dot org>
- To: gdb-patches at sourceware dot org
- Date: Sun, 12 Jul 2009 10:06:56 -0700 (PDT)
- Subject: [patch] Use src/cpu files for m32r,iq2000 simulators
Hi.
I checked this into the sim tree.
Tested by rebuilding both sims.
2009-07-12 Doug Evans <dje@sebabeach.org>
* common/Make-common.in (CPU_DIR): Define.
* iq2000/Makefile.in (stamp-arch): Use $(CPU_DIR) instead of $(CGEN_CPU_DIR).
(stamp-cpu): Ditto.
* m32r/Makefile.in (stamp-arch): Use $(CPU_DIR) instead of $(CGEN_CPU_DIR).
(stamp-cpu, stamp-xcpu, stamp-2cpu): Ditto.
Index: common/Make-common.in
===================================================================
RCS file: /cvs/src/src/sim/common/Make-common.in,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -p -r1.32 -r1.33
--- common/Make-common.in 7 Jul 2009 08:09:19 -0000 1.32
+++ common/Make-common.in 12 Jul 2009 16:59:34 -0000 1.33
@@ -694,6 +694,9 @@ CGEN = "`if [ -f ../../guile/libguile/gu
CGENFLAGS = -v
CGEN_CPU_DIR = $(CGENDIR)/cpu
+# Most ports use the files here instead of cgen/cpu.
+CPU_DIR = $(srcroot)/cpu
+
CGEN_READ_SCM = $(CGENDIR)/sim.scm
CGEN_ARCH_SCM = $(CGENDIR)/sim-arch.scm
CGEN_CPU_SCM = $(CGENDIR)/sim-cpu.scm $(CGENDIR)/sim-model.scm
Index: iq2000/Makefile.in
===================================================================
RCS file: /cvs/src/src/sim/iq2000/Makefile.in,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -p -r1.7 -r1.8
--- iq2000/Makefile.in 8 Jul 2009 05:38:01 -0000 1.7
+++ iq2000/Makefile.in 12 Jul 2009 16:59:34 -0000 1.8
@@ -92,18 +92,18 @@ CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/iq2000.cpu Makefile
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/iq2000.cpu Makefile
$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=iq2000 \
- archfile=$(CGEN_CPU_DIR)/iq2000.cpu \
+ archfile=$(CPU_DIR)/iq2000.cpu \
FLAGS="with-scache with-profile=fn"
touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
@true
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/iq2000.cpu Makefile
+stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/iq2000.cpu Makefile
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=iq2000bf mach=iq2000 \
- archfile=$(CGEN_CPU_DIR)/iq2000.cpu \
+ archfile=$(CPU_DIR)/iq2000.cpu \
FLAGS="with-scache with-profile=fn" \
EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
touch stamp-cpu
Index: m32r/Makefile.in
===================================================================
RCS file: /cvs/src/src/sim/m32r/Makefile.in,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -p -r1.16 -r1.17
--- m32r/Makefile.in 14 Jan 2009 10:53:08 -0000 1.16
+++ m32r/Makefile.in 12 Jul 2009 16:59:34 -0000 1.17
@@ -156,35 +156,35 @@ CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu
$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
- archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+ archfile=$(CPU_DIR)/m32r.cpu \
FLAGS="with-scache with-profile=fn"
touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=m32rbf mach=m32r SUFFIX= \
- archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+ archfile=$(CPU_DIR)/m32r.cpu \
FLAGS="with-scache with-profile=fn" \
EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
touch stamp-cpu
cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
-stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=m32rxf mach=m32rx SUFFIX=x \
- archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+ archfile=$(CPU_DIR)/m32r.cpu \
FLAGS="with-scache with-profile=fn" \
EXTRAFILES="$(CGEN_CPU_SEMSW)"
touch stamp-xcpu
cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
-stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=m32r2f mach=m32r2 SUFFIX=2 \
- archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+ archfile=$(CPU_DIR)/m32r.cpu \
FLAGS="with-scache with-profile=fn" \
EXTRAFILES="$(CGEN_CPU_SEMSW)"
touch stamp-2cpu