Improve end check on rs6000 prologue analyzer

[Daniel Jacobowitz <drow at false dot org>]

This patch corrects a check in the optimized code motion support of the
PPC prologue analyzer.  The lr_reg check doesn't match the comment, which
says we should keep going if the return address hasn't been saved yet;
it would stop if a scheduled instruction was encountered before mflr.

This fixes the new test; incidentally fixes e500-prologue.exp on non-e500
targets, where the evstdd is disassembled as a garbage altivec instruction
and otherwise stops the prologue analyzer early; and breaks one test in
ovldbreak.exp which now sets a breakpoint a few instructions past the end of
the prologue.  But it will never skip a branch, and I concluded that the
new failure ought to be stopped by the line-table-checking code, so it's
a bug there rather than here.

Any comments on this patch?  Otherwise, I'll plan to commit it in a few
days.

-- 
Daniel Jacobowitz
CodeSourcery

2006-09-29  Daniel Jacobowitz  <dan@codesourcery.com>

	* rs6000-tdep.c (skip_prologue): Correct test for saved PC.

2006-09-29  Daniel Jacobowitz  <dan@codesourcery.com>

	* gdb.arch/powerpc-prologue.c (optimized_1_marker, gdb2029_marker)
	(optimized_1): New.
	(main): Call optimized_1.
	(gdb2029): Correct typos.  Call gdb2029_marker.
	* gdb.arch/powerpc-prologue.exp: Run new test.  Use a breakpoint
	for gdb2029.

Index: rs6000-tdep.c
===================================================================
RCS file: /home/gcc/repos/src/src/gdb/rs6000-tdep.c,v
retrieving revision 1.258
diff -u -p -r1.258 rs6000-tdep.c
--- rs6000-tdep.c	23 Apr 2006 14:15:01 -0000	1.258
+++ rs6000-tdep.c	29 Sep 2006 20:46:03 -0000
@@ -1414,8 +1414,7 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR l
 	     Handle optimizer code motions into the prologue by continuing
 	     the search if we have no valid frame yet or if the return
 	     address is not yet saved in the frame.  */
-	  if (fdata->frameless == 0
-	      && (lr_reg == -1 || fdata->nosavedpc == 0))
+	  if (fdata->frameless == 0 && fdata->nosavedpc == 0)
 	    break;
 
 	  if (op == 0x4e800020		/* blr */
Index: testsuite/gdb.arch/powerpc-prologue.c
===================================================================
RCS file: /home/gcc/repos/src/src/gdb/testsuite/gdb.arch/powerpc-prologue.c,v
retrieving revision 1.1
diff -u -p -r1.1 powerpc-prologue.c
--- testsuite/gdb.arch/powerpc-prologue.c	23 Jan 2006 01:47:32 -0000	1.1
+++ testsuite/gdb.arch/powerpc-prologue.c	29 Sep 2006 20:43:33 -0000
@@ -31,23 +31,54 @@ int
 main (void)
 {
   gdb2029 ();
+  optimized_1 ();
   return 0;
 }
 
+void
+optimized_1_marker (void)
+{
+}
+
+void
+gdb2029_marker (void)
+{
+}
+
 /* A typical PIC prologue from GCC.  */
 
 asm(".text\n"
-    "    .align 8\n"
+    "    .p2align 3\n"
     SYMBOL (gdb2029) ":\n"
-    "	stw	%r1, -32(%r1)\n"
+    "	stwu	%r1, -32(%r1)\n"
     "	mflr	%r0\n"
     "	bcl-	20,31,.+4\n"
     "	stw	%r30, 24(%r1)\n"
     "	mflr	%r30\n"
     "	stw	%r0, 36(%r1)\n"
-    "	twge	%r2, %r2\n"
+    "	bl	gdb2029_marker\n"
     "	lwz	%r0, 36(%r1)\n"
     "	lwz	%r30, 24(%r1)\n"
     "	mtlr	%r0\n"
-    "	addi	%r0, %r0, 32\n"
+    "	addi	%r1, %r1, 32\n"
+    "	blr");
+
+/* A heavily scheduled prologue.  */
+asm(".text\n"
+    "	.p2align 3\n"
+    SYMBOL (optimized_1) ":\n"
+    "	stwu	%r1,-32(%r1)\n"
+    "	lis	%r9,-16342\n"
+    "	lis	%r11,-16342\n"
+    "	mflr	%r0\n"
+    "	addi	%r11,%r11,3776\n"
+    "	stmw	%r27,12(%r1)\n"
+    "	addi	%r31,%r9,3152\n"
+    "	cmplw	%cr7,%r31,%r11\n"
+    "	stw	%r0,36(%r1)\n"
+    "	mr	%r30,%r3\n"
+    "	bl	optimized_1_marker\n"
+    "	lwz	%r0,36(%r1)\n"
+    "	lmw	%r27,12(%r1)\n"
+    "	addi	%r1,%r1,32\n"
     "	blr");
Index: testsuite/gdb.arch/powerpc-prologue.exp
===================================================================
RCS file: /home/gcc/repos/src/src/gdb/testsuite/gdb.arch/powerpc-prologue.exp,v
retrieving revision 1.1
diff -u -p -r1.1 powerpc-prologue.exp
--- testsuite/gdb.arch/powerpc-prologue.exp	23 Jan 2006 01:47:32 -0000	1.1
+++ testsuite/gdb.arch/powerpc-prologue.exp	29 Sep 2006 20:48:14 -0000
@@ -50,12 +50,40 @@ if ![runto_main] then {
 
 # Testcase for PIC prologue.
 
-gdb_test "continue" "Program received signal SIGTRAP.*" "continue to PIC"
+gdb_breakpoint "gdb2029_marker"
+gdb_test "continue" "Breakpoint $decimal, $hex in gdb2029_marker \\(\\)" \
+	"continue to PIC"
 
 gdb_test "backtrace 10" \
-	"#0\[ \t\]*$hex in gdb2029.*\r\n#1\[ \t\]*$hex in main.*" \
+	"#0\[ \t\]*$hex in gdb2029_marker.*\r\n#1\[ \t\]*$hex in gdb2029.*\r\n#2\[ \t\]*$hex in main.*" \
+	"backtrace in PIC marker"
+
+gdb_test "finish" ".*$hex in gdb2029 .*" "finish from PIC"
+
+gdb_test "backtrace 10" \
+	"#0\[ \t\]*$hex in gdb2029 .*\r\n#1\[ \t\]*$hex in main.*" \
 	"backtrace in PIC"
 
 gdb_test "info frame" \
 	".*Saved registers:.*r30 at.*r31 at.*pc at.*lr at.*" \
 	"saved registers in PIC"
+
+# Testcase for scheduled prologue.
+
+gdb_breakpoint "optimized_1_marker"
+gdb_test "continue" "Breakpoint $decimal, $hex in optimized_1_marker \\(\\)" \
+	"continue to optimized"
+
+gdb_test "backtrace 10" \
+	"#0\[ \t\]*$hex in optimized_1_marker.*\r\n#1\[ \t\]*$hex in optimized_1.*\r\n#2\[ \t\]*$hex in main.*" \
+	"backtrace in optimized marker"
+
+gdb_test "finish" ".*$hex in optimized_1 .*" "finish from optimized"
+
+gdb_test "backtrace 10" \
+	"#0\[ \t\]*$hex in optimized_1 .*\r\n#1\[ \t\]*$hex in main.*" \
+	"backtrace in optimized"
+
+gdb_test "info frame" \
+	".*Saved registers:.*r30 at.*r31 at.*pc at.*lr at.*" \
+	"saved registers in optimized"