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[rfa] Store the CPSR on ARM Linux


I noticed when testing Thumb support that calling functions from the
opposite execution mode didn't work very well.  Nothing ever caused GDB
to flush the changed CPSR to the inferior, so we would begin executing ARM
functions in Thumb mode or vice versa.

Committed to csl-arm-20050325-branch.  OK for HEAD?

-- 
Daniel Jacobowitz
CodeSourcery, LLC

2005-03-25  Daniel Jacobowitz  <dan@codesourcery.com>

	* arm-linux-nat.c (store_register, store_regs): Handle
	ARM_PS_REGNUM.

Index: gdb/arm-linux-nat.c
===================================================================
RCS file: /cvs/src/src/gdb/arm-linux-nat.c,v
retrieving revision 1.22
diff -u -p -r1.22 arm-linux-nat.c
--- gdb/arm-linux-nat.c	5 Jan 2005 15:43:43 -0000	1.22
+++ gdb/arm-linux-nat.c	25 Mar 2005 21:45:05 -0000
@@ -492,6 +492,12 @@ store_register (int regno)
 
   if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
     regcache_raw_collect (current_regcache, regno, (char *) &regs[regno]);
+  else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
+    regcache_raw_collect (current_regcache, regno,
+			 (char *) &regs[ARM_CPSR_REGNUM]);
+  else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
+    regcache_raw_collect (current_regcache, ARM_PC_REGNUM,
+			 (char *) &regs[ARM_PC_REGNUM]);
 
   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
   if (ret < 0)
@@ -524,6 +530,10 @@ store_regs (void)
 	regcache_raw_collect (current_regcache, regno, (char *) &regs[regno]);
     }
 
+  if (arm_apcs_32 && register_cached (ARM_PS_REGNUM))
+    regcache_raw_collect (current_regcache, ARM_PS_REGNUM,
+			 (char *) &regs[ARM_CPSR_REGNUM]);
+
   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 
   if (ret < 0)


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