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Re: RFC: Add 'double' member to 64-bit vector register type
- From: Daniel Jacobowitz <drow at false dot org>
- To: Jim Blandy <jimb at redhat dot com>
- Cc: gdb-patches at sources dot redhat dot com
- Date: Sat, 19 Mar 2005 10:37:10 -0500
- Subject: Re: RFC: Add 'double' member to 64-bit vector register type
- References: <vt2is3omadg.fsf@zenia.home>
On Sat, Mar 19, 2005 at 01:13:15AM -0500, Jim Blandy wrote:
>
> gdb/ChangeLog:
> 2005-03-17 Jim Blandy <jimb@redhat.com>
>
> * gdbtypes.c (build_builtin_type_vec64): Include a 'double' member
> in the union, too, since these registers can hold 64-bit floating
> point types.
Rationale belongs in the patch mail or in comments, not in the
changelog.
I suppose you might as well, since no one but the e500 uses them. But
only some SPE processors support the double precision mode; do you
really want to display the register as double on e500 v1?
--
Daniel Jacobowitz
CodeSourcery, LLC