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Multiplexed registers and invalidating the register cache


Hi all,

I'm working on support for a CPU where some of the registers are in a bank selected by another register, meaning that changing the bank select register changes the contents (and meaning) for a whole set of other registers.

The target is a remote stub, and the way I've pictured this in my head a change to the bank select register (via a 'P' packet) invalidates the register cache, causing the whole register contents to be fetched again (with a 'g' packet). (The remote stub needs to re-read the affected registers upon the write of the bank select register, of course.)

Is there some sort of "write register" hook I could use to indicate that the registers should be fetched again if the bank select register is written to? I followed what happens when doing a "set $register", but I couldn't find any such hook in that path.

--
Orjan Friberg
Axis Communications


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