+/* MIPS register numbers. */
+struct mips_regnums
+ {
+ int zero_regnum; /* The zero register; read-only, always 0. */
+ int v0_regnum; /* Function return value. */
+ int a0_regnum; /* First GPR used for passing arguments. */
+ int t9_regnum; /* Contains address of callee in PIC code. */
+ int sp_regnum; /* Stack pointer. */
+ int ra_regnum; /* Return address. */
+ int ps_regnum; /* Processor status. */
+ int hi_regnum; /* High portion of internal multiply/divide
+ register. */
+ int lo_regnum; /* Low portion of internal multiply/divide
+ register. */
+ int badvaddr_regnum; /* Address associated with
+ addressing exception. */
+ int cause_regnum; /* Describes last exception. */
+ int pc_regnum; /* Program counter. */
+ int fcrcs_regnum; /* FP control/status. */
+ int fcrir_regnum; /* FP implementation/revision. */
+ int fp0_regnum; /* First floating point register. */
+ int fplast_regnum; /* Last floating point register. */
+ int fpa0_regnum; /* First floating point register used for
+ passing floating point arguments. */
+ int first_embed_regnum; /* First CP0 register for embedded use. */
+ int last_embed_regnum; /* Last CP0 register for embedded use. */
+ int prid_regnum; /* Processor ID. */
+
+ int last_arg_regnum; /* Last general purpose register used for
+ passing arguments. (a0_regnum is the
+ first.) */
+ int last_fp_arg_regnum; /* Last floating point register used for
+ passing floating point arguments. */
+ };