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[PATCH] more mips gdbarch conversions
- From: Michael Snyder <msnyder at redhat dot com>
- To: gdb-patches at sources dot redhat dot com, cagney at redhat dot com
- Date: Thu, 15 Aug 2002 20:56:25 -0700
- Subject: [PATCH] more mips gdbarch conversions
- Organization: Red Hat, Inc.
Convert IN_SIGTRAMP, FUNCTION_START_OFFSET, REGISTER_VIRTUAL_SIZE to
gdbarch.
Convert REGISTER_CONVERT_TO_TYPE, REGISTER_CONVERT_FROM_TYPE to
functions
(bringing them a little closer to perfection).
2002-08-15 Michael Snyder <msnyder@redhat.com>
* config/mips/tm-mips.h (FUNCTION_START_OFFSET, IN_SIGTRAMP,
REGISTER_VIRTUAL_SIZE): Delete.
(REGISTER_CONVERT_FROM_TYPE, REGISTER_CONVERT_TO_TYPE): Convert
from macros to functions.
* mips-tdep.c (mips_register_convert_from_type,
mips_register_convert_to_type): New functions.
(mips_gdbarch_init): Set up function_start_offset,
register_virtual_size, pc_in_sigtramp.
Index: mips-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/mips-tdep.c,v
retrieving revision 1.104
diff -p -r1.104 mips-tdep.c
*** mips-tdep.c 16 Aug 2002 03:07:33 -0000 1.104
--- mips-tdep.c 16 Aug 2002 04:01:16 -0000
*************** mips_register_convert_to_raw (struct typ
*** 477,482 ****
--- 477,514 ----
TYPE_LENGTH (virtual_type));
}
+ void
+ mips_register_convert_to_type (int regnum, struct type *type, char *buffer)
+ {
+ if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ && REGISTER_RAW_SIZE (regnum) == 4
+ && (regnum) >= FP0_REGNUM && (regnum) < FP0_REGNUM + 32
+ && TYPE_CODE(type) == TYPE_CODE_FLT
+ && TYPE_LENGTH(type) == 8)
+ {
+ char temp[4];
+ memcpy (temp, ((char *)(buffer))+4, 4);
+ memcpy (((char *)(buffer))+4, (buffer), 4);
+ memcpy (((char *)(buffer)), temp, 4);
+ }
+ }
+
+ void
+ mips_register_convert_from_type (int regnum, struct type *type, char *buffer)
+ {
+ if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ && REGISTER_RAW_SIZE (regnum) == 4
+ && (regnum) >= FP0_REGNUM && (regnum) < FP0_REGNUM + 32
+ && TYPE_CODE(type) == TYPE_CODE_FLT
+ && TYPE_LENGTH(type) == 8)
+ {
+ char temp[4];
+ memcpy (temp, ((char *)(buffer))+4, 4);
+ memcpy (((char *)(buffer))+4, (buffer), 4);
+ memcpy (((char *)(buffer)), temp, 4);
+ }
+ }
+
/* Return the GDB type object for the "standard" data type
of data in register REG.
*************** mips_store_return_value (struct type *va
*** 4186,4193 ****
/* Exported procedure: Is PC in the signal trampoline code */
! int
! in_sigtramp (CORE_ADDR pc, char *ignore)
{
if (sigtramp_address == 0)
fixup_sigtramp ();
--- 4218,4225 ----
/* Exported procedure: Is PC in the signal trampoline code */
! static int
! mips_pc_in_sigtramp (CORE_ADDR pc, char *ignore)
{
if (sigtramp_address == 0)
fixup_sigtramp ();
*************** mips_gdbarch_init (struct gdbarch_info i
*** 4873,4879 ****
osabi = gdbarch_lookup_osabi (info.abfd);
}
! /* Check ELF_FLAGS to see if it specifies the ABI being used. */
switch ((elf_flags & EF_MIPS_ABI))
{
case E_MIPS_ABI_O32:
--- 4905,4911 ----
osabi = gdbarch_lookup_osabi (info.abfd);
}
! /* Check ELF_FLAGS to see if it specifies the ABI being used. */
switch ((elf_flags & EF_MIPS_ABI))
{
case E_MIPS_ABI_O32:
*************** mips_gdbarch_init (struct gdbarch_info i
*** 4967,4973 ****
arches = gdbarch_list_lookup_by_info (arches->next, &info))
{
/* MIPS needs to be pedantic about which ABI the object is
! using. */
if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
continue;
if (gdbarch_tdep (arches->gdbarch)->mips_abi != mips_abi)
--- 4999,5005 ----
arches = gdbarch_list_lookup_by_info (arches->next, &info))
{
/* MIPS needs to be pedantic about which ABI the object is
! using. */
if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
continue;
if (gdbarch_tdep (arches->gdbarch)->mips_abi != mips_abi)
*************** mips_gdbarch_init (struct gdbarch_info i
*** 4976,4988 ****
return arches->gdbarch;
}
! /* Need a new architecture. Fill in a target specific vector. */
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
gdbarch = gdbarch_alloc (&info, tdep);
tdep->elf_flags = elf_flags;
tdep->osabi = osabi;
! /* Initially set everything according to the default ABI/ISA. */
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_int_bit (gdbarch, 32);
set_gdbarch_float_bit (gdbarch, 32);
--- 5008,5020 ----
return arches->gdbarch;
}
! /* Need a new architecture. Fill in a target specific vector. */
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
gdbarch = gdbarch_alloc (&info, tdep);
tdep->elf_flags = elf_flags;
tdep->osabi = osabi;
! /* Initially set everything according to the default ABI/ISA. */
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_int_bit (gdbarch, 32);
set_gdbarch_float_bit (gdbarch, 32);
*************** mips_gdbarch_init (struct gdbarch_info i
*** 5133,5139 ****
``We deliberately don't allow "-gp32" to set the MIPS_32BITMODE
flag in object files because to do so would make it impossible to
! link with libraries compiled without "-gp32". This is
unnecessarily restrictive.
We could solve this problem by adding "-gp32" multilibs to gcc,
--- 5165,5171 ----
``We deliberately don't allow "-gp32" to set the MIPS_32BITMODE
flag in object files because to do so would make it impossible to
! link with libraries compiled without "-gp32". This is
unnecessarily restrictive.
We could solve this problem by adding "-gp32" multilibs to gcc,
*************** mips_gdbarch_init (struct gdbarch_info i
*** 5143,5152 ****
But even more unhelpfully, the default linker output target for
mips64-elf is elf32-bigmips, and has EF_MIPS_32BIT_MODE set, even
for 64-bit programs - you need to change the ABI to change this,
! and not all gcc targets support that currently. Therefore using
this flag to detect 32-bit mode would do the wrong thing given
the current gcc - it would make GDB treat these 64-bit programs
! as 32-bit programs by default. */
/* enable/disable the MIPS FPU */
if (!mips_fpu_type_auto)
--- 5175,5184 ----
But even more unhelpfully, the default linker output target for
mips64-elf is elf32-bigmips, and has EF_MIPS_32BIT_MODE set, even
for 64-bit programs - you need to change the ABI to change this,
! and not all gcc targets support that currently. Therefore using
this flag to detect 32-bit mode would do the wrong thing given
the current gcc - it would make GDB treat these 64-bit programs
! as 32-bit programs by default. */
/* enable/disable the MIPS FPU */
if (!mips_fpu_type_auto)
*************** mips_gdbarch_init (struct gdbarch_info i
*** 5173,5179 ****
/* MIPS version of register names. NOTE: At present the MIPS
register name management is part way between the old -
#undef/#define REGISTER_NAMES and the new REGISTER_NAME(nr).
! Further work on it is required. */
set_gdbarch_register_name (gdbarch, mips_register_name);
set_gdbarch_read_pc (gdbarch, mips_read_pc);
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
--- 5205,5211 ----
/* MIPS version of register names. NOTE: At present the MIPS
register name management is part way between the old -
#undef/#define REGISTER_NAMES and the new REGISTER_NAME(nr).
! Further work on it is required. */
set_gdbarch_register_name (gdbarch, mips_register_name);
set_gdbarch_read_pc (gdbarch, mips_read_pc);
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
*************** mips_gdbarch_init (struct gdbarch_info i
*** 5181,5188 ****
set_gdbarch_read_sp (gdbarch, mips_read_sp);
set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
! /* Add/remove bits from an address. The MIPS needs be careful to
! ensure that all 32 bit addresses are sign extended to 64 bits. */
set_gdbarch_addr_bits_remove (gdbarch, mips_addr_bits_remove);
/* There's a mess in stack frame creation. See comments in
--- 5213,5220 ----
set_gdbarch_read_sp (gdbarch, mips_read_sp);
set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
! /* Add/remove bits from an address. The MIPS needs be careful to
! ensure that all 32 bit addresses are sign extended to 64 bits. */
set_gdbarch_addr_bits_remove (gdbarch, mips_addr_bits_remove);
/* There's a mess in stack frame creation. See comments in
*************** mips_gdbarch_init (struct gdbarch_info i
*** 5190,5196 ****
set_gdbarch_init_frame_pc_first (gdbarch, mips_init_frame_pc_first);
set_gdbarch_init_frame_pc (gdbarch, init_frame_pc_noop);
! /* Map debug register numbers onto internal register numbers. */
set_gdbarch_stab_reg_to_regnum (gdbarch, mips_stab_reg_to_regnum);
set_gdbarch_ecoff_reg_to_regnum (gdbarch, mips_ecoff_reg_to_regnum);
--- 5222,5228 ----
set_gdbarch_init_frame_pc_first (gdbarch, mips_init_frame_pc_first);
set_gdbarch_init_frame_pc (gdbarch, init_frame_pc_noop);
! /* Map debug register numbers onto internal register numbers. */
set_gdbarch_stab_reg_to_regnum (gdbarch, mips_stab_reg_to_regnum);
set_gdbarch_ecoff_reg_to_regnum (gdbarch, mips_ecoff_reg_to_regnum);
*************** mips_gdbarch_init (struct gdbarch_info i
*** 5235,5245 ****
--- 5267,5281 ----
set_gdbarch_address_to_pointer (gdbarch, address_to_signed_pointer);
set_gdbarch_integer_to_address (gdbarch, mips_integer_to_address);
+ set_gdbarch_function_start_offset (gdbarch, 0);
+
/* There are MIPS targets which do not yet use this since they still
define REGISTER_VIRTUAL_TYPE. */
set_gdbarch_register_virtual_type (gdbarch, mips_register_virtual_type);
+ set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
set_gdbarch_do_registers_info (gdbarch, mips_do_registers_info);
+ set_gdbarch_pc_in_sigtramp (gdbarch, mips_pc_in_sigtramp);
/* Hook in OS ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch, osabi);
Index: config/mips/tm-mips.h
===================================================================
RCS file: /cvs/src/src/gdb/config/mips/tm-mips.h,v
retrieving revision 1.34
diff -p -r1.34 tm-mips.h
*** config/mips/tm-mips.h 16 Aug 2002 03:07:34 -0000 1.34
--- config/mips/tm-mips.h 16 Aug 2002 04:01:16 -0000
*************** struct value;
*** 51,72 ****
#define DEFAULT_MIPS_TYPE "generic"
- /* Offset from address of function to start of its code.
- Zero on most machines. */
-
- #define FUNCTION_START_OFFSET 0
-
/* Return non-zero if PC points to an instruction which will cause a step
to execute both the instruction at PC and an instruction at PC+4. */
extern int mips_step_skips_delay (CORE_ADDR);
#define STEP_SKIPS_DELAY_P (1)
#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
- /* Are we currently handling a signal */
-
- extern int in_sigtramp (CORE_ADDR, char *);
- #define IN_SIGTRAMP(pc, name) in_sigtramp(pc, name)
-
/* Say how long (ordinary) registers are. This is a piece of bogosity
used in push_word and a few other places; REGISTER_RAW_SIZE is the
real way to know how big a register is. */
--- 51,62 ----
*************** extern const char *mips_register_name (i
*** 151,161 ****
#define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
- /* Number of bytes of storage in the program's representation
- for register N. */
-
- #define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
-
/* Return the GDB type object for the "standard" data type of data in
register N. */
--- 141,146 ----
*************** extern const char *mips_register_name (i
*** 172,198 ****
If the target is big endian, double register values need conversion
between memory and register formats. */
! #define REGISTER_CONVERT_TO_TYPE(n, type, buffer) \
! do {if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG \
! && REGISTER_RAW_SIZE (n) == 4 \
! && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 \
! && TYPE_CODE(type) == TYPE_CODE_FLT \
! && TYPE_LENGTH(type) == 8) { \
! char __temp[4]; \
! memcpy (__temp, ((char *)(buffer))+4, 4); \
! memcpy (((char *)(buffer))+4, (buffer), 4); \
! memcpy (((char *)(buffer)), __temp, 4); }} while (0)
!
! #define REGISTER_CONVERT_FROM_TYPE(n, type, buffer) \
! do {if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG \
! && REGISTER_RAW_SIZE (n) == 4 \
! && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 \
! && TYPE_CODE(type) == TYPE_CODE_FLT \
! && TYPE_LENGTH(type) == 8) { \
! char __temp[4]; \
! memcpy (__temp, ((char *)(buffer))+4, 4); \
! memcpy (((char *)(buffer))+4, (buffer), 4); \
! memcpy (((char *)(buffer)), __temp, 4); }} while (0)
/* Store the address of the place in which to copy the structure the
subroutine will return. Handled by mips_push_arguments. */
--- 157,174 ----
If the target is big endian, double register values need conversion
between memory and register formats. */
! extern void mips_register_convert_to_type (int regnum,
! struct type *type,
! char *buffer);
! extern void mips_register_convert_from_type (int regnum,
! struct type *type,
! char *buffer);
!
! #define REGISTER_CONVERT_TO_TYPE(n, type, buffer) \
! mips_register_convert_to_type ((n), (type), (buffer))
!
! #define REGISTER_CONVERT_FROM_TYPE(n, type, buffer) \
! mips_register_convert_from_type ((n), (type), (buffer))
/* Store the address of the place in which to copy the structure the
subroutine will return. Handled by mips_push_arguments. */