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[applied mips sim patch] fix do_divu spacing, move do_dsllv.
- From: cgd at broadcom dot com
- To: gdb-patches at sources dot redhat dot com
- Date: 01 Mar 2002 15:52:35 -0800
- Subject: [applied mips sim patch] fix do_divu spacing, move do_dsllv.
another left over from long ago. obvious and trivial, bu verified
that things still build anyway. 8-)
2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_divu): Fix spacing.
* mips.igen (do_dsllv): Move to be right before DSLLV,
to match the rest of the do_<shift> functions.
Index: mips.igen
===================================================================
RCS file: /cvs/src/src/sim/mips/mips.igen,v
retrieving revision 1.23
diff -u -r1.23 mips.igen
--- mips.igen 2002/03/01 23:40:51 1.23
+++ mips.igen 2002/03/01 23:49:58
@@ -1041,11 +1041,11 @@
LO = EXTEND32 (0x80000000);
HI = EXTEND32 (0);
}
- else
- {
- LO = EXTEND32 (n / d);
- HI = EXTEND32 (n % d);
- }
+ else
+ {
+ LO = EXTEND32 (n / d);
+ HI = EXTEND32 (n % d);
+ }
}
TRACE_ALU_RESULT2 (HI, LO);
}
@@ -1185,15 +1185,6 @@
TRACE_ALU_RESULT (GPR[rd]);
}
-:function:::void:do_dsllv:int rs, int rt, int rd
-{
- int s = MASKED64 (GPR[rs], 5, 0);
- TRACE_ALU_INPUT2 (GPR[rt], s);
- GPR[rd] = GPR[rt] << s;
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-
000000,00000,5.RT,5.RD,5.SHIFT,111000:SPECIAL:64::DSLL
"dsll r<RD>, r<RT>, <SHIFT>"
*mipsIII:
@@ -1220,6 +1211,14 @@
TRACE_ALU_INPUT2 (GPR[RT], s);
GPR[RD] = GPR[RT] << s;
TRACE_ALU_RESULT (GPR[RD]);
+}
+
+:function:::void:do_dsllv:int rs, int rt, int rd
+{
+ int s = MASKED64 (GPR[rs], 5, 0);
+ TRACE_ALU_INPUT2 (GPR[rt], s);
+ GPR[rd] = GPR[rt] << s;
+ TRACE_ALU_RESULT (GPR[rd]);
}
000000,5.RS,5.RT,5.RD,00000,010100:SPECIAL:64::DSLLV
--
Chris Demetriou Broadcom Corporation
Senior Staff Design Engineer Broadband Processor Business Unit
Any opinions expressed in this message are mine, not necessarily Broadcom's.