This is the mail archive of the gdb-patches@sources.redhat.com mailing list for the GDB project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

[RFA]: New function to supply only one x87 register


There's a strange asymmetry in i387-nat.c: i387_fill_fsave accepts a
REGNO argument and can fill only one register's value, but
i387_supply_fsave cannot.  I needed this to be symmetrical, but I
didn't want to break existing APIs.  So I added a new function that
handles one register only.  See below.

Okay to commit?


2001-02-07  Eli Zaretskii  <eliz@is.elta.co.il>

	* i387-nat.h: Add prototype for i387_supply_fpreg.

	* i387-nat.c (i387_supply_fpreg): New function.
	(i387_supply_fsave): Move the loop body to i387_supply_fpreg.

--- gdb/i387-nat.c~1	Wed Feb  7 22:27:42 2001
+++ gdb/i387-nat.c	Wed Feb  7 22:31:52 2001
@@ -55,6 +55,38 @@ static int fsave_offset[] =
 #define FSAVE_ADDR(fsave, regnum) (fsave + fsave_offset[regnum - FP0_REGNUM])
 
 
+/* Fill one FP register's slot in GDB's register array with the
+   floating-point value of register REGNO from *FSAVE.  This function
+   masks off any of the reserved bits in *FSAVE.  */
+
+void
+i387_supply_fpreg (char *fsave, int regno)
+{
+  /* Most of the FPU control registers occupy only 16 bits in
+	 the fsave area.  Give those a special treatment.  */
+  if (regno >= FIRST_FPU_CTRL_REGNUM
+      && regno != FCOFF_REGNUM && regno != FDOFF_REGNUM)
+    {
+      unsigned int val = *(unsigned short *) (FSAVE_ADDR (fsave, regno));
+
+      if (regno == FOP_REGNUM)
+	{
+	  val &= ((1 << 11) - 1);
+	  /* Feature: restore the 5 bits of the opcode that are
+	     missing in the data supplied by FSAVE/FNSAVE.  This shows
+	     the opcode in its full glory, in case someone wants to
+	     produce a mnemonic from it.  */
+	  if (val)
+	    val |= 0xd800;
+	  supply_register (regno, (char *) &val);
+	}
+      else
+	supply_register (regno, (char *) &val);
+    }
+  else
+    supply_register (regno, FSAVE_ADDR (fsave, regno));
+}
+
 /* Fill GDB's register array with the floating-point register values
    in *FSAVE.  This function masks off any of the reserved
    bits in *FSAVE.  */
@@ -66,29 +98,7 @@ i387_supply_fsave (char *fsave)
 
   for (i = FP0_REGNUM; i <= LAST_FPU_CTRL_REGNUM; i++)
     {
-      /* Most of the FPU control registers occupy only 16 bits in
-	 the fsave area.  Give those a special treatment.  */
-      if (i >= FIRST_FPU_CTRL_REGNUM
-	  && i != FCOFF_REGNUM && i != FDOFF_REGNUM)
-	{
-	  unsigned int val = *(unsigned short *) (FSAVE_ADDR (fsave, i));
-
-	  if (i == FOP_REGNUM)
-	    {
-	      val &= ((1 << 11) - 1);
-	      /* Feature: restore the 5 bits of the opcode that are
-		 missing in the data supplied by FSAVE/FNSAVE.  This
-		 shows the opcode in its full glory, in case someone
-		 wants to produce a mnemonic from it.  */
-	      if (val)
-		val |= 0xd800;
-	      supply_register (i, (char *) &val);
-	    }
-	  else
-	    supply_register (i, (char *) &val);
-	}
-      else
-	supply_register (i, FSAVE_ADDR (fsave, i));
+      i387_supply_fpreg (fsave, i);
     }
 }
 

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]