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gdb.disasm testsuite patch
- To: gdb-patches@sourceware.cygnus.com
- Subject: gdb.disasm testsuite patch
- From: Jimmy Guo <guo@cup.hp.com>
- Date: Thu, 22 Jul 1999 18:19:20 -0700 (PDT)
This patch contains merged gdb.disasm testsuite.
It includes merge changes and some new tests added by HP for pa1.1 / 2.0
/ 2.0w testing. A FSF copyright assignment is on its way.
File renames / moves (a tar file of gdb.disasm has been ftp'd over as
ftp.cygnus.com:/incoming/hp_gdb.disasm.tar, *** since there're binaries
included please apply the actual change from the tar file ***):
Old New
--- ---
pa11
pa11-sed.cmd
pa11.com
pa11.exp
pa11.out
pa11-instr.s
pa20
pa20-instr.s
pa20-long.c
pa20-long.exp
pa20-t2
pa20-t2.com
pa20-t2.exp
pa20-t2.out
pa20-t2.s
pa20.com
pa20.exp
pa20.out
pa20w-instr.s
pa20w-t3
pa20w-t3.com
pa20w-t3.exp
pa20w-t3.out
- Jimmy Guo, guo@cup.hp.com
/opt/gnu/bin/diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm gdb/testsuite/gdb.disasm
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/Makefile.in gdb/testsuite/gdb.disasm/Makefile.in
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/Makefile.in Mon Mar 24 13:48:36 1997
--- gdb/testsuite/gdb.disasm/Makefile.in Thu Jul 22 17:49:43 1999
***************
*** 1,20 ****
- #### host, target, and site specific Makefile frags come in here.
-
VPATH = @srcdir@
srcdir = @srcdir@
! .PHONY: all clean mostlyclean distclean realclean
! all:
! @echo "Nothing to be done for all..."
clean mostlyclean:
! -rm -f *.o *.diff *~ *.bad core sh3 hppa mn10200 mn10300
distclean maintainer-clean realclean: clean
-rm -f Makefile config.status config.log
! Makefile: $(srcdir)/Makefile.in $(srcdir)/configure.in
$(SHELL) ./config.status --recheck
-
-
--- 1,30 ----
VPATH = @srcdir@
srcdir = @srcdir@
! EXECUTABLES = hppa mn10200 mn10300 pa20-long sh3
!
! MISCELLANEOUS = *.dif *.out *.tmp *.tmp2
!
! all:
! @echo "Nothing to be done for all..."
! info:
! install-info:
! dvi:
! install:
! uninstall: force
! installcheck:
! check:
clean mostlyclean:
! -rm -f *~ *.o *.ci
! -rm -f core $(EXECUTABLES)
! -rm -f $(MISCELLANEOUS)
distclean maintainer-clean realclean: clean
-rm -f Makefile config.status config.log
+ -rm -f *-init.exp
+ -rm -fr *.log summary detail *.plog *.sum *.psum site.*
! Makefile : $(srcdir)/Makefile.in $(srcdir)/configure.in
$(SHELL) ./config.status --recheck
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/configure gdb/testsuite/gdb.disasm/configure
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/configure Tue Mar 24 08:44:07 1998
--- gdb/testsuite/gdb.disasm/configure Thu Jul 22 17:49:44 1999
***************
*** 451,457 ****
# A filename unique to this package, relative to the directory that
# configure is in, which we can look for to find out if srcdir is correct.
! ac_unique_file=sh3.s
# Find the source files, if location was not specified.
if test -z "$srcdir"; then
--- 451,457 ----
# A filename unique to this package, relative to the directory that
# configure is in, which we can look for to find out if srcdir is correct.
! ac_unique_file=hppa.exp
# Find the source files, if location was not specified.
if test -z "$srcdir"; then
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/configure.in gdb/testsuite/gdb.disasm/configure.in
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/configure.in Thu Feb 13 15:16:24 1997
--- gdb/testsuite/gdb.disasm/configure.in Thu Jul 22 17:49:44 1999
***************
*** 5,11 ****
dnl any existing configure script.
AC_PREREQ(2.5)
! AC_INIT(sh3.s)
CC=${CC-cc}
AC_SUBST(CC)
--- 5,11 ----
dnl any existing configure script.
AC_PREREQ(2.5)
! AC_INIT(hppa.exp)
CC=${CC-cc}
AC_SUBST(CC)
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/hppa.exp gdb/testsuite/gdb.disasm/hppa.exp
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/hppa.exp Mon Jul 19 15:46:50 1999
--- gdb/testsuite/gdb.disasm/hppa.exp Thu Jul 22 17:49:44 1999
***************
*** 28,34 ****
verbose "Tests ignored for all but hppa based targets."
return
}
!
set prms_id 0
set bug_id 0
--- 28,37 ----
verbose "Tests ignored for all but hppa based targets."
return
}
! if [istarget "hppa2.0w-*-*"] {
! verbose "Tests ignored for hppa2.0w*."
! return
! }
set prms_id 0
set bug_id 0
***************
*** 55,68 ****
send_gdb "x/8i integer_memory_tests\n"
gdb_expect {
-re "
! .*ldw 0\\(sr0,r4\\),r26.*
! .*ldh 0\\(sr0,r4\\),r26.*
! .*ldb 0\\(sr0,r4\\),r26.*
! .*stw r26,0\\(sr0,r4\\).*
! .*sth r26,0\\(sr0,r4\\).*
! .*stb r26,0\\(sr0,r4\\).*
! .*ldwm 0\\(sr0,r4\\),r26.*
! .*stwm r26,0\\(sr0,r4\\).*
.*$gdb_prompt $" { pass "integer_memory_tests" }
-re "$gdb_prompt $" { fail "integer_memory_tests" }
timeout { fail "(timeout) integer memory_tests" }
--- 58,71 ----
send_gdb "x/8i integer_memory_tests\n"
gdb_expect {
-re "
! .*ldw 0\\(%sr0,%r4\\),%r26.*
! .*ldh 0\\(%sr0,%r4\\),%r26.*
! .*ldb 0\\(%sr0,%r4\\),%r26.*
! .*stw %r26,0\\(%sr0,%r4\\).*
! .*sth %r26,0\\(%sr0,%r4\\).*
! .*stb %r26,0\\(%sr0,%r4\\).*
! .*ldw,ma 0\\(%sr0,%r4\\),%r26.*
! .*stw,ma %r26,0\\(%sr0,%r4\\).*
.*$gdb_prompt $" { pass "integer_memory_tests" }
-re "$gdb_prompt $" { fail "integer_memory_tests" }
timeout { fail "(timeout) integer memory_tests" }
***************
*** 71,96 ****
send_gdb "x/20i integer_indexing_load\n"
gdb_expect {
-re "
! .*ldwx r5\\(sr0,r4\\),r26.*
! .*ldwx,s r5\\(sr0,r4\\),r26.*
! .*ldwx,m r5\\(sr0,r4\\),r26.*
! .*ldwx,sm r5\\(sr0,r4\\),r26.*
! .*ldhx r5\\(sr0,r4\\),r26.*
! .*ldhx,s r5\\(sr0,r4\\),r26.*
! .*ldhx,m r5\\(sr0,r4\\),r26.*
! .*ldhx,sm r5\\(sr0,r4\\),r26.*
! .*ldbx r5\\(sr0,r4\\),r26.*
! .*ldbx,s r5\\(sr0,r4\\),r26.*
! .*ldbx,m r5\\(sr0,r4\\),r26.*
! .*ldbx,sm r5\\(sr0,r4\\),r26.*
! .*ldwax r5\\(r4\\),r26.*
! .*ldwax,s r5\\(r4\\),r26.*
! .*ldwax,m r5\\(r4\\),r26.*
! .*ldwax,sm r5\\(r4\\),r26.*
! .*ldcwx r5\\(sr0,r4\\),r26.*
! .*ldcwx,s r5\\(sr0,r4\\),r26.*
! .*ldcwx,m r5\\(sr0,r4\\),r26.*
! .*ldcwx,sm r5\\(sr0,r4\\),r26.*
.*$gdb_prompt $" { pass "integer_indexing_load" }
-re "$gdb_prompt $" { fail "integer_indexing_load" }
timeout { fail "(timeout) integer_indexing" }
--- 74,99 ----
send_gdb "x/20i integer_indexing_load\n"
gdb_expect {
-re "
! .*ldw %r5\\(%sr0,%r4\\),%r26.*
! .*ldw,s %r5\\(%sr0,%r4\\),%r26.*
! .*ldw,m %r5\\(%sr0,%r4\\),%r26.*
! .*ldw,sm %r5\\(%sr0,%r4\\),%r26.*
! .*ldh %r5\\(%sr0,%r4\\),%r26.*
! .*ldh,s %r5\\(%sr0,%r4\\),%r26.*
! .*ldh,m %r5\\(%sr0,%r4\\),%r26.*
! .*ldh,sm %r5\\(%sr0,%r4\\),%r26.*
! .*ldb %r5\\(%sr0,%r4\\),%r26.*
! .*ldb,s %r5\\(%sr0,%r4\\),%r26.*
! .*ldb,m %r5\\(%sr0,%r4\\),%r26.*
! .*ldb,sm %r5\\(%sr0,%r4\\),%r26.*
! .*ldwa %r5\\(%r4\\),%r26.*
! .*ldwa,s %r5\\(%r4\\),%r26.*
! .*ldwa,m %r5\\(%r4\\),%r26.*
! .*ldwa,sm %r5\\(%r4\\),%r26.*
! .*ldcw %r5\\(%sr0,%r4\\),%r26.*
! .*ldcw,s %r5\\(%sr0,%r4\\),%r26.*
! .*ldcw,m %r5\\(%sr0,%r4\\),%r26.*
! .*ldcw,sm %r5\\(%sr0,%r4\\),%r26.*
.*$gdb_prompt $" { pass "integer_indexing_load" }
-re "$gdb_prompt $" { fail "integer_indexing_load" }
timeout { fail "(timeout) integer_indexing" }
***************
*** 99,119 ****
send_gdb "x/15i integer_load_short_memory\n"
gdb_expect {
-re "
! .*ldws 0\\(sr0,r4\\),r26.*
! .*ldws,mb 0\\(sr0,r4\\),r26.*
! .*ldws,ma 0\\(sr0,r4\\),r26.*
! .*ldhs 0\\(sr0,r4\\),r26.*
! .*ldhs,mb 0\\(sr0,r4\\),r26.*
! .*ldhs,ma 0\\(sr0,r4\\),r26.*
! .*ldbs 0\\(sr0,r4\\),r26.*
! .*ldbs,mb 0\\(sr0,r4\\),r26.*
! .*ldbs,ma 0\\(sr0,r4\\),r26.*
! .*ldwas 0\\(r4\\),r26.*
! .*ldwas,mb 0\\(r4\\),r26.*
! .*ldwas,ma 0\\(r4\\),r26.*
! .*ldcws 0\\(sr0,r4\\),r26.*
! .*ldcws,mb 0\\(sr0,r4\\),r26.*
! .*ldcws,ma 0\\(sr0,r4\\),r26.*
.*$gdb_prompt $" { pass "integer_load_short_memory" }
-re "$gdb_prompt $" { fail "integer_load_short_memory" }
timeout { fail "(timeout) integer_load_short_memory " }
--- 102,122 ----
send_gdb "x/15i integer_load_short_memory\n"
gdb_expect {
-re "
! .*ldw 0\\(%sr0,%r4\\),%r26.*
! .*ldw,mb 0\\(%sr0,%r4\\),%r26.*
! .*ldw 0\\(%sr0,%r4\\),%r26.*
! .*ldh 0\\(%sr0,%r4\\),%r26.*
! .*ldh,mb 0\\(%sr0,%r4\\),%r26.*
! .*ldh 0\\(%sr0,%r4\\),%r26.*
! .*ldb 0\\(%sr0,%r4\\),%r26.*
! .*ldb,mb 0\\(%sr0,%r4\\),%r26.*
! .*ldb 0\\(%sr0,%r4\\),%r26.*
! .*ldwa 0\\(%r4\\),%r26.*
! .*ldwa,mb 0\\(%r4\\),%r26.*
! .*ldwa 0\\(%r4\\),%r26.*
! .*ldcw 0\\(%sr0,%r4\\),%r26.*
! .*ldcw,mb 0\\(%sr0,%r4\\),%r26.*
! .*ldcw 0\\(%sr0,%r4\\),%r26.*
.*$gdb_prompt $" { pass "integer_load_short_memory" }
-re "$gdb_prompt $" { fail "integer_load_short_memory" }
timeout { fail "(timeout) integer_load_short_memory " }
***************
*** 123,145 ****
send_gdb "x/17i integer_store_short_memory\n"
gdb_expect {
-re "
! .*stws r26,0\\(sr0,r4\\).*
! .*stws,mb r26,0\\(sr0,r4\\).*
! .*stws,ma r26,0\\(sr0,r4\\).*
! .*sths r26,0\\(sr0,r4\\).*
! .*sths,mb r26,0\\(sr0,r4\\).*
! .*sths,ma r26,0\\(sr0,r4\\).*
! .*stbs r26,0\\(sr0,r4\\).*
! .*stbs,mb r26,0\\(sr0,r4\\).*
! .*stbs,ma r26,0\\(sr0,r4\\).*
! .*stwas r26,0\\(r4\\).*
! .*stwas,mb r26,0\\(r4\\).*
! .*stwas,ma r26,0\\(r4\\).*
! .*stbys r26,0\\(sr0,r4\\).*
! .*stbys r26,0\\(sr0,r4\\).*
! .*stbys,e r26,0\\(sr0,r4\\).*
! .*stbys,b,m r26,0\\(sr0,r4\\).*
! .*stbys,e,m r26,0\\(sr0,r4\\).*
.*$gdb_prompt $" { pass "integer_store_short_memory" }
-re "$gdb_prompt $" { fail "integer_store_short_memory" }
timeout { fail "(timeout) integer_short_memory " }
--- 126,148 ----
send_gdb "x/17i integer_store_short_memory\n"
gdb_expect {
-re "
! .*stw %r26,0\\(%sr0,%r4\\).*
! .*stw,mb %r26,0\\(%sr0,%r4\\).*
! .*stw %r26,0\\(%sr0,%r4\\).*
! .*sth %r26,0\\(%sr0,%r4\\).*
! .*sth,mb %r26,0\\(%sr0,%r4\\).*
! .*sth %r26,0\\(%sr0,%r4\\).*
! .*stb %r26,0\\(%sr0,%r4\\).*
! .*stb,mb %r26,0\\(%sr0,%r4\\).*
! .*stb %r26,0\\(%sr0,%r4\\).*
! .*stwa %r26,0\\(%r4\\).*
! .*stwa,mb %r26,0\\(%r4\\).*
! .*stwa %r26,0\\(%r4\\).*
! .*stby,b %r26,0\\(%sr0,%r4\\).*
! .*stby,b %r26,0\\(%sr0,%r4\\).*
! .*stby,e %r26,0\\(%sr0,%r4\\).*
! .*stby,b,m %r26,0\\(%sr0,%r4\\).*
! .*stby,e,m %r26,0\\(%sr0,%r4\\).*
.*$gdb_prompt $" { pass "integer_store_short_memory" }
-re "$gdb_prompt $" { fail "integer_store_short_memory" }
timeout { fail "(timeout) integer_short_memory " }
***************
*** 154,162 ****
send_gdb "x/3i immediate_tests\n"
gdb_expect {
-re "
! .*ldo 5\\(r26\\),r26.*
! .*ldil -21524800,r26.*
! .*addil -21524800,r5.*
.*$gdb_prompt $" { pass "immedate_tests" }
-re "$gdb_prompt $" { fail "immedate_tests" }
timeout { fail "(timeout) immedate_tests " }
--- 157,165 ----
send_gdb "x/3i immediate_tests\n"
gdb_expect {
-re "
! .*ldo 5\\(%r26\\),%r26.*
! .*ldil L'-0x21524800,%r26.*
! .*addil L'-0x21524800,%r5.*
.*$gdb_prompt $" { pass "immedate_tests" }
-re "$gdb_prompt $" { fail "immedate_tests" }
timeout { fail "(timeout) immedate_tests " }
***************
*** 171,186 ****
send_gdb "x/10i branch_tests_1\n"
gdb_expect {
-re "
! .*bl.*,rp.*
! .*bl,n.*,rp.*
.*b.*
.*b,n.*
! .*gate.*,rp.*
! .*gate,n.*,rp.*
! .*blr r4,rp.*
! .*blr,n r4,rp.*
! .*blr r4,r0.*
! .*blr,n r4,r0.*
.*$gdb_prompt $" { pass "branch_tests_1" }
-re "$gdb_prompt $" { fail "branch_tests_1" }
timeout { fail "(timeout) branch_tests_1" }
--- 174,189 ----
send_gdb "x/10i branch_tests_1\n"
gdb_expect {
-re "
! .*b,l.*,%rp.*
! .*b,l,n.*,%rp.*
.*b.*
.*b,n.*
! .*b,gate.*,%rp.*
! .*b,gate,n.*,%rp.*
! .*blr %r4,%rp.*
! .*blr,n %r4,%rp.*
! .*blr %r4,%r0.*
! .*blr,n %r4,%r0.*
.*$gdb_prompt $" { pass "branch_tests_1" }
-re "$gdb_prompt $" { fail "branch_tests_1" }
timeout { fail "(timeout) branch_tests_1" }
***************
*** 189,200 ****
send_gdb "x/6i branch_tests_2\n"
gdb_expect {
-re "
! .*bv r0\\(rp\\).*
! .*bv,n r0\\(rp\\).*
! .*be 1234\\(sr1,rp\\).*
! .*be,n 1234\\(sr1,rp\\).*
! .*ble 1234\\(sr1,rp\\).*
! .*ble,n 1234\\(sr1,rp\\).*
.*$gdb_prompt $" { pass "branch_tests_2" }
-re "$gdb_prompt $" { fail "branch_tests_2" }
timeout { fail "(timeout) branch_tests_2" }
--- 192,203 ----
send_gdb "x/6i branch_tests_2\n"
gdb_expect {
-re "
! .*bv %r0\\(%rp\\).*
! .*bv,n %r0\\(%rp\\).*
! .*be 0x1234\\(%sr1,%rp\\).*
! .*be,n 0x1234\\(%sr1,%rp\\).*
! .*be,l 0x1234\\(%sr1,%rp\\).*
! .*be,l,n 0x1234\\(%sr1,%rp\\).*
.*$gdb_prompt $" { pass "branch_tests_2" }
-re "$gdb_prompt $" { fail "branch_tests_2" }
timeout { fail "(timeout) branch_tests_2" }
***************
*** 204,217 ****
send_gdb "x/8i movb_tests\n"
gdb_expect {
-re "
! .*movb r4,r26,.* <movb_tests>.*
! .*movb,= r4,r26,.* <movb_tests>.*
! .*movb,< r4,r26,.* <movb_tests>.*
! .*movb,od r4,r26,.* <movb_tests>.*
! .*movb,tr r4,r26,.* <movb_tests>.*
! .*movb,<> r4,r26,.* <movb_tests>.*
! .*movb,>= r4,r26,.* <movb_tests>.*
! .*movb,ev r4,r26,.* <movb_tests>.*
.*$gdb_prompt $" { pass "movb_tests" }
-re "$gdb_prompt $" { fail "movb_tests" }
timeout { fail "(timeout) movb_tests " }
--- 207,220 ----
send_gdb "x/8i movb_tests\n"
gdb_expect {
-re "
! .*movb %r4,%r26,.* <movb_tests>.*
! .*movb,= %r4,%r26,.* <movb_tests>.*
! .*movb,< %r4,%r26,.* <movb_tests>.*
! .*movb,od %r4,%r26,.* <movb_tests>.*
! .*movb,tr %r4,%r26,.* <movb_tests>.*
! .*movb,<> %r4,%r26,.* <movb_tests>.*
! .*movb,>= %r4,%r26,.* <movb_tests>.*
! .*movb,ev %r4,%r26,.* <movb_tests>.*
.*$gdb_prompt $" { pass "movb_tests" }
-re "$gdb_prompt $" { fail "movb_tests" }
timeout { fail "(timeout) movb_tests " }
***************
*** 220,233 ****
send_gdb "x/8i movb_nullified_tests\n"
gdb_expect {
-re "
! .*movb,n.*r4,r26,.* <movb_tests>.*
! .*movb,=,n.*r4,r26,.* <movb_tests>.*
! .*movb,<,n.*r4,r26,.* <movb_tests>.*
! .*movb,od,n.*r4,r26,.* <movb_tests>.*
! .*movb,tr,n.*r4,r26,.* <movb_tests>.*
! .*movb,<>,n.*r4,r26,.* <movb_tests>.*
! .*movb,>=,n.*r4,r26,.* <movb_tests>.*
! .*movb,ev,n.*r4,r26,.* <movb_tests>.*
.*$gdb_prompt $" { pass "movb_nullified_tests" }
-re "$gdb_prompt $" { fail "movb_nullified_tests" }
timeout { fail "(timeout) movb_nullified_tests " }
--- 223,236 ----
send_gdb "x/8i movb_nullified_tests\n"
gdb_expect {
-re "
! .*movb,n.*%r4,%r26,.* <movb_tests>.*
! .*movb,=,n.*%r4,%r26,.* <movb_tests>.*
! .*movb,<,n.*%r4,%r26,.* <movb_tests>.*
! .*movb,od,n.*%r4,%r26,.* <movb_tests>.*
! .*movb,tr,n.*%r4,%r26,.* <movb_tests>.*
! .*movb,<>,n.*%r4,%r26,.* <movb_tests>.*
! .*movb,>=,n.*%r4,%r26,.* <movb_tests>.*
! .*movb,ev,n.*%r4,%r26,.* <movb_tests>.*
.*$gdb_prompt $" { pass "movb_nullified_tests" }
-re "$gdb_prompt $" { fail "movb_nullified_tests" }
timeout { fail "(timeout) movb_nullified_tests " }
***************
*** 236,249 ****
send_gdb "x/8i movib_tests\n"
gdb_expect {
-re "
! .*movib 5,r26,.* <movib_tests>.*
! .*movib,= 5,r26,.* <movib_tests>.*
! .*movib,< 5,r26,.* <movib_tests>.*
! .*movib,od 5,r26,.* <movib_tests>.*
! .*movib,tr 5,r26,.* <movib_tests>.*
! .*movib,<> 5,r26,.* <movib_tests>.*
! .*movib,>= 5,r26,.* <movib_tests>.*
! .*movib,ev 5,r26,.* <movib_tests>.*
.*$gdb_prompt $" { pass "movib_tests" }
-re "$gdb_prompt $" { fail "movib_tests" }
timeout { fail "(timeout) movib_tests " }
--- 239,252 ----
send_gdb "x/8i movib_tests\n"
gdb_expect {
-re "
! .*movib 5,%r26,.* <movib_tests>.*
! .*movib,= 5,%r26,.* <movib_tests>.*
! .*movib,< 5,%r26,.* <movib_tests>.*
! .*movib,od 5,%r26,.* <movib_tests>.*
! .*movib,tr 5,%r26,.* <movib_tests>.*
! .*movib,<> 5,%r26,.* <movib_tests>.*
! .*movib,>= 5,%r26,.* <movib_tests>.*
! .*movib,ev 5,%r26,.* <movib_tests>.*
.*$gdb_prompt $" { pass "movib_tests" }
-re "$gdb_prompt $" { fail "movib_tests" }
timeout { fail "(timeout) movib_tests " }
***************
*** 252,265 ****
send_gdb "x/8i movib_nullified_tests\n"
gdb_expect {
-re "
! .*movib,n.*5,r26,.* <movib_tests>.*
! .*movib,=,n.*5,r26,.* <movib_tests>.*
! .*movib,<,n.*5,r26,.* <movib_tests>.*
! .*movib,od,n.*5,r26,.* <movib_tests>.*
! .*movib,tr,n.*5,r26,.* <movib_tests>.*
! .*movib,<>,n.*5,r26,.* <movib_tests>.*
! .*movib,>=,n.*5,r26,.* <movib_tests>.*
! .*movib,ev,n.*5,r26,.* <movib_tests>.*
.*$gdb_prompt $" { pass "movib_nullified_tests" }
-re "$gdb_prompt $" { fail "movib_nullified_tests" }
timeout { fail "(timeout) movib_nullified_tests " }
--- 255,268 ----
send_gdb "x/8i movib_nullified_tests\n"
gdb_expect {
-re "
! .*movib,n.*5,%r26,.* <movib_tests>.*
! .*movib,=,n.*5,%r26,.* <movib_tests>.*
! .*movib,<,n.*5,%r26,.* <movib_tests>.*
! .*movib,od,n.*5,%r26,.* <movib_tests>.*
! .*movib,tr,n.*5,%r26,.* <movib_tests>.*
! .*movib,<>,n.*5,%r26,.* <movib_tests>.*
! .*movib,>=,n.*5,%r26,.* <movib_tests>.*
! .*movib,ev,n.*5,%r26,.* <movib_tests>.*
.*$gdb_prompt $" { pass "movib_nullified_tests" }
-re "$gdb_prompt $" { fail "movib_nullified_tests" }
timeout { fail "(timeout) movib_nullified_tests " }
***************
*** 268,281 ****
send_gdb "x/8i comb_tests_1\n"
gdb_expect {
-re "
! .*comb r0,r4,.* <comb_tests_1>.*
! .*comb,= r0,r4,.* <comb_tests_1>.*
! .*comb,< r0,r4,.* <comb_tests_1>.*
! .*comb,<= r0,r4,.* <comb_tests_1>.*
! .*comb,<< r0,r4,.* <comb_tests_1>.*
! .*comb,<<= r0,r4,.* <comb_tests_1>.*
! .*comb,sv r0,r4,.* <comb_tests_1>.*
! .*comb,od r0,r4,.* <comb_tests_1>.*
.*$gdb_prompt $" { pass "comb_tests_1" }
-re "$gdb_prompt $" { fail "comb_tests_1" }
timeout { fail "(timeout) comb_tests_1" }
--- 271,284 ----
send_gdb "x/8i comb_tests_1\n"
gdb_expect {
-re "
! .*cmpb %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,= %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,< %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,<= %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,<< %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,<<= %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,sv %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,od %r0,%r4,.* <comb_tests_1>.*
.*$gdb_prompt $" { pass "comb_tests_1" }
-re "$gdb_prompt $" { fail "comb_tests_1" }
timeout { fail "(timeout) comb_tests_1" }
***************
*** 284,297 ****
send_gdb "x/8i comb_tests_2\n"
gdb_expect {
-re "
! .*combf r0,r4,.* <comb_tests_2>.*
! .*combf,= r0,r4,.* <comb_tests_2>.*
! .*combf,< r0,r4,.* <comb_tests_2>.*
! .*combf,<= r0,r4,.* <comb_tests_2>.*
! .*combf,<< r0,r4,.* <comb_tests_2>.*
! .*combf,<<= r0,r4,.* <comb_tests_2>.*
! .*combf,sv r0,r4,.* <comb_tests_2>.*
! .*combf,od r0,r4,.* <comb_tests_2>.*
.*$gdb_prompt $" { pass "comb_tests_2" }
-re "$gdb_prompt $" { fail "comb_tests_2" }
timeout { fail "(timeout) comb_tests_2" }
--- 287,300 ----
send_gdb "x/8i comb_tests_2\n"
gdb_expect {
-re "
! .*cmpb,tr %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,<> %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,>= %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,> %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,>>= %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,>> %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,nsv %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,ev %r0,%r4,.* <comb_tests_2>.*
.*$gdb_prompt $" { pass "comb_tests_2" }
-re "$gdb_prompt $" { fail "comb_tests_2" }
timeout { fail "(timeout) comb_tests_2" }
***************
*** 300,313 ****
send_gdb "x/8i comb_nullified_tests_1\n"
gdb_expect {
-re "
! .*comb,n r0,r4,.* <comb_tests_1>.*
! .*comb,=,n r0,r4,.* <comb_tests_1>.*
! .*comb,<,n r0,r4,.* <comb_tests_1>.*
! .*comb,<=,n r0,r4,.* <comb_tests_1>.*
! .*comb,<<,n r0,r4,.* <comb_tests_1>.*
! .*comb,<<=,n r0,r4,.* <comb_tests_1>.*
! .*comb,sv,n r0,r4,.* <comb_tests_1>.*
! .*comb,od,n r0,r4,.* <comb_tests_1>.*
.*$gdb_prompt $" { pass "comb_nullified_tests_1" }
-re "$gdb_prompt $" { fail "comb_nullified_tests_1" }
timeout { fail "(timeout) comb_nullified_tests_1" }
--- 303,316 ----
send_gdb "x/8i comb_nullified_tests_1\n"
gdb_expect {
-re "
! .*cmpb,n %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,=,n %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,<,n %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,<=,n %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,<<,n %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,<<=,n %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,sv,n %r0,%r4,.* <comb_tests_1>.*
! .*cmpb,od,n %r0,%r4,.* <comb_tests_1>.*
.*$gdb_prompt $" { pass "comb_nullified_tests_1" }
-re "$gdb_prompt $" { fail "comb_nullified_tests_1" }
timeout { fail "(timeout) comb_nullified_tests_1" }
***************
*** 316,329 ****
send_gdb "x/8i comb_nullified_tests_2\n"
gdb_expect {
-re "
! .*combf,n r0,r4,.* <comb_tests_2>.*
! .*combf,=,n r0,r4,.* <comb_tests_2>.*
! .*combf,<,n r0,r4,.* <comb_tests_2>.*
! .*combf,<=,n r0,r4,.* <comb_tests_2>.*
! .*combf,<<,n r0,r4,.* <comb_tests_2>.*
! .*combf,<<=,n r0,r4,.* <comb_tests_2>.*
! .*combf,sv,n r0,r4,.* <comb_tests_2>.*
! .*combf,od,n r0,r4,.* <comb_tests_2>.*
.*$gdb_prompt $" { pass "comb_nullified_tests_2" }
-re "$gdb_prompt $" { fail "comb_nullified_tests_2" }
timeout { fail "(timeout) comb_nullified_tests_2" }
--- 319,332 ----
send_gdb "x/8i comb_nullified_tests_2\n"
gdb_expect {
-re "
! .*cmpb,tr,n %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,<>,n %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,>=,n %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,>,n %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,>>=,n %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,>>,n %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,nsv,n %r0,%r4,.* <comb_tests_2>.*
! .*cmpb,ev,n %r0,%r4,.* <comb_tests_2>.*
.*$gdb_prompt $" { pass "comb_nullified_tests_2" }
-re "$gdb_prompt $" { fail "comb_nullified_tests_2" }
timeout { fail "(timeout) comb_nullified_tests_2" }
***************
*** 332,345 ****
send_gdb "x/8i comib_tests_1\n"
gdb_expect {
-re "
! .*comib 0,r4,.* <comib_tests_1>.*
! .*comib,= 0,r4,.* <comib_tests_1>.*
! .*comib,< 0,r4,.* <comib_tests_1>.*
! .*comib,<= 0,r4,.* <comib_tests_1>.*
! .*comib,<< 0,r4,.* <comib_tests_1>.*
! .*comib,<<= 0,r4,.* <comib_tests_1>.*
! .*comib,sv 0,r4,.* <comib_tests_1>.*
! .*comib,od 0,r4,.* <comib_tests_1>.*
.*$gdb_prompt $" { pass "comib_tests_1" }
-re "$gdb_prompt $" { fail "comib_tests_1" }
timeout { fail "(timeout) comib_tests_1" }
--- 335,348 ----
send_gdb "x/8i comib_tests_1\n"
gdb_expect {
-re "
! .*cmpib 0,%r4,.* <comib_tests_1>.*
! .*cmpib,= 0,%r4,.* <comib_tests_1>.*
! .*cmpib,< 0,%r4,.* <comib_tests_1>.*
! .*cmpib,<= 0,%r4,.* <comib_tests_1>.*
! .*cmpib,<< 0,%r4,.* <comib_tests_1>.*
! .*cmpib,<<= 0,%r4,.* <comib_tests_1>.*
! .*cmpib,sv 0,%r4,.* <comib_tests_1>.*
! .*cmpib,od 0,%r4,.* <comib_tests_1>.*
.*$gdb_prompt $" { pass "comib_tests_1" }
-re "$gdb_prompt $" { fail "comib_tests_1" }
timeout { fail "(timeout) comib_tests_1" }
***************
*** 348,361 ****
send_gdb "x/8i comib_tests_2\n"
gdb_expect {
-re "
! .*comibf 0,r4,.* <comib_tests_2>.*
! .*comibf,= 0,r4,.* <comib_tests_2>.*
! .*comibf,< 0,r4,.* <comib_tests_2>.*
! .*comibf,<= 0,r4,.* <comib_tests_2>.*
! .*comibf,<< 0,r4,.* <comib_tests_2>.*
! .*comibf,<<= 0,r4,.* <comib_tests_2>.*
! .*comibf,sv 0,r4,.* <comib_tests_2>.*
! .*comibf,od 0,r4,.* <comib_tests_2>.*
.*$gdb_prompt $" { pass "comib_tests_2" }
-re "$gdb_prompt $" { fail "comib_tests_2" }
timeout { fail "(timeout) comib_tests_2" }
--- 351,364 ----
send_gdb "x/8i comib_tests_2\n"
gdb_expect {
-re "
! .*cmpib,tr 0,%r4,.* <comib_tests_2>.*
! .*cmpib,<> 0,%r4,.* <comib_tests_2>.*
! .*cmpib,>= 0,%r4,.* <comib_tests_2>.*
! .*cmpib,> 0,%r4,.* <comib_tests_2>.*
! .*cmpib,>>= 0,%r4,.* <comib_tests_2>.*
! .*cmpib,>> 0,%r4,.* <comib_tests_2>.*
! .*cmpib,nsv 0,%r4,.* <comib_tests_2>.*
! .*cmpib,ev 0,%r4,.* <comib_tests_2>.*
.*$gdb_prompt $" { pass "comib_tests_2" }
-re "$gdb_prompt $" { fail "comib_tests_2" }
timeout { fail "(timeout) comib_tests_2" }
***************
*** 364,377 ****
send_gdb "x/8i comib_nullified_tests_1\n"
gdb_expect {
-re "
! .*comib,n 0,r4,.* <comib_tests_1>.*
! .*comib,=,n 0,r4,.* <comib_tests_1>.*
! .*comib,<,n 0,r4,.* <comib_tests_1>.*
! .*comib,<=,n 0,r4,.* <comib_tests_1>.*
! .*comib,<<,n 0,r4,.* <comib_tests_1>.*
! .*comib,<<=,n 0,r4,.* <comib_tests_1>.*
! .*comib,sv,n 0,r4,.* <comib_tests_1>.*
! .*comib,od,n 0,r4,.* <comib_tests_1>.*
.*$gdb_prompt $" { pass "comib_nullified_tests_1" }
-re "$gdb_prompt $" { fail "comib_nullified_tests_1" }
timeout { fail "(timeout) comib_nullified_tests_1" }
--- 367,380 ----
send_gdb "x/8i comib_nullified_tests_1\n"
gdb_expect {
-re "
! .*cmpib,n 0,%r4,.* <comib_tests_1>.*
! .*cmpib,=,n 0,%r4,.* <comib_tests_1>.*
! .*cmpib,<,n 0,%r4,.* <comib_tests_1>.*
! .*cmpib,<=,n 0,%r4,.* <comib_tests_1>.*
! .*cmpib,<<,n 0,%r4,.* <comib_tests_1>.*
! .*cmpib,<<=,n 0,%r4,.* <comib_tests_1>.*
! .*cmpib,sv,n 0,%r4,.* <comib_tests_1>.*
! .*cmpib,od,n 0,%r4,.* <comib_tests_1>.*
.*$gdb_prompt $" { pass "comib_nullified_tests_1" }
-re "$gdb_prompt $" { fail "comib_nullified_tests_1" }
timeout { fail "(timeout) comib_nullified_tests_1" }
***************
*** 380,393 ****
send_gdb "x/8i comib_nullified_tests_2\n"
gdb_expect {
-re "
! .*comibf,n 0,r4,.* <comib_tests_2>.*
! .*comibf,=,n 0,r4,.* <comib_tests_2>.*
! .*comibf,<,n 0,r4,.* <comib_tests_2>.*
! .*comibf,<=,n 0,r4,.* <comib_tests_2>.*
! .*comibf,<<,n 0,r4,.* <comib_tests_2>.*
! .*comibf,<<=,n 0,r4,.* <comib_tests_2>.*
! .*comibf,sv,n 0,r4,.* <comib_tests_2>.*
! .*comibf,od,n 0,r4,.* <comib_tests_2>.*
.*$gdb_prompt $" { pass "comib_nullified_tests_2" }
-re "$gdb_prompt $" { fail "comib_nullified_tests_2" }
timeout { fail "(timeout) comib_nullified_tests_2" }
--- 383,396 ----
send_gdb "x/8i comib_nullified_tests_2\n"
gdb_expect {
-re "
! .*cmpib,tr,n 0,%r4,.* <comib_tests_2>.*
! .*cmpib,<>,n 0,%r4,.* <comib_tests_2>.*
! .*cmpib,>=,n 0,%r4,.* <comib_tests_2>.*
! .*cmpib,>,n 0,%r4,.* <comib_tests_2>.*
! .*cmpib,>>=,n 0,%r4,.* <comib_tests_2>.*
! .*cmpib,>>,n 0,%r4,.* <comib_tests_2>.*
! .*cmpib,nsv,n 0,%r4,.* <comib_tests_2>.*
! .*cmpib,ev,n 0,%r4,.* <comib_tests_2>.*
.*$gdb_prompt $" { pass "comib_nullified_tests_2" }
-re "$gdb_prompt $" { fail "comib_nullified_tests_2" }
timeout { fail "(timeout) comib_nullified_tests_2" }
***************
*** 396,409 ****
send_gdb "x/8i addb_tests_1\n"
gdb_expect {
-re "
! .*addb r1,r4,.* <addb_tests_1>.*
! .*addb,= r1,r4,.* <addb_tests_1>.*
! .*addb,< r1,r4,.* <addb_tests_1>.*
! .*addb,<= r1,r4,.* <addb_tests_1>.*
! .*addb,nuv r1,r4,.* <addb_tests_1>.*
! .*addb,znv r1,r4,.* <addb_tests_1>.*
! .*addb,sv r1,r4,.* <addb_tests_1>.*
! .*addb,od r1,r4,.* <addb_tests_1>.*
.*$gdb_prompt $" { pass "addb_tests_1" }
-re "$gdb_prompt $" { fail "addb_tests_1" }
timeout { fail "(timeout) addb_tests_1" }
--- 399,412 ----
send_gdb "x/8i addb_tests_1\n"
gdb_expect {
-re "
! .*addb %r1,%r4,.* <addb_tests_1>.*
! .*addb,= %r1,%r4,.* <addb_tests_1>.*
! .*addb,< %r1,%r4,.* <addb_tests_1>.*
! .*addb,<= %r1,%r4,.* <addb_tests_1>.*
! .*addb,nuv %r1,%r4,.* <addb_tests_1>.*
! .*addb,znv %r1,%r4,.* <addb_tests_1>.*
! .*addb,sv %r1,%r4,.* <addb_tests_1>.*
! .*addb,od %r1,%r4,.* <addb_tests_1>.*
.*$gdb_prompt $" { pass "addb_tests_1" }
-re "$gdb_prompt $" { fail "addb_tests_1" }
timeout { fail "(timeout) addb_tests_1" }
***************
*** 412,425 ****
send_gdb "x/8i addb_tests_2\n"
gdb_expect {
-re "
! .*addbf r1,r4,.* <addb_tests_2>.*
! .*addbf,= r1,r4,.* <addb_tests_2>.*
! .*addbf,< r1,r4,.* <addb_tests_2>.*
! .*addbf,<= r1,r4,.* <addb_tests_2>.*
! .*addbf,nuv r1,r4,.* <addb_tests_2>.*
! .*addbf,znv r1,r4,.* <addb_tests_2>.*
! .*addbf,sv r1,r4,.* <addb_tests_2>.*
! .*addbf,od r1,r4,.* <addb_tests_2>.*
.*$gdb_prompt $" { pass "addb_tests_2" }
-re "$gdb_prompt $" { fail "addb_tests_2" }
timeout { fail "(timeout) addb_tests_2" }
--- 415,428 ----
send_gdb "x/8i addb_tests_2\n"
gdb_expect {
-re "
! .*addb,tr %r1,%r4,.* <addb_tests_2>.*
! .*addb,<> %r1,%r4,.* <addb_tests_2>.*
! .*addb,>= %r1,%r4,.* <addb_tests_2>.*
! .*addb,> %r1,%r4,.* <addb_tests_2>.*
! .*addb,uv %r1,%r4,.* <addb_tests_2>.*
! .*addb,vnz %r1,%r4,.* <addb_tests_2>.*
! .*addb,nsv %r1,%r4,.* <addb_tests_2>.*
! .*addb,ev %r1,%r4,.* <addb_tests_2>.*
.*$gdb_prompt $" { pass "addb_tests_2" }
-re "$gdb_prompt $" { fail "addb_tests_2" }
timeout { fail "(timeout) addb_tests_2" }
***************
*** 428,441 ****
send_gdb "x/8i addb_nullified_tests_1\n"
gdb_expect {
-re "
! .*addb,n r1,r4,.* <addb_tests_1>.*
! .*addb,=,n r1,r4,.* <addb_tests_1>.*
! .*addb,<,n r1,r4,.* <addb_tests_1>.*
! .*addb,<=,n r1,r4,.* <addb_tests_1>.*
! .*addb,nuv,n r1,r4,.* <addb_tests_1>.*
! .*addb,znv,n r1,r4,.* <addb_tests_1>.*
! .*addb,sv,n r1,r4,.* <addb_tests_1>.*
! .*addb,od,n r1,r4,.* <addb_tests_1>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_1" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_1" }
timeout { fail "(timeout) addb_nullified_tests_1" }
--- 431,444 ----
send_gdb "x/8i addb_nullified_tests_1\n"
gdb_expect {
-re "
! .*addb,n %r1,%r4,.* <addb_tests_1>.*
! .*addb,=,n %r1,%r4,.* <addb_tests_1>.*
! .*addb,<,n %r1,%r4,.* <addb_tests_1>.*
! .*addb,<=,n %r1,%r4,.* <addb_tests_1>.*
! .*addb,nuv,n %r1,%r4,.* <addb_tests_1>.*
! .*addb,znv,n %r1,%r4,.* <addb_tests_1>.*
! .*addb,sv,n %r1,%r4,.* <addb_tests_1>.*
! .*addb,od,n %r1,%r4,.* <addb_tests_1>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_1" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_1" }
timeout { fail "(timeout) addb_nullified_tests_1" }
***************
*** 444,457 ****
send_gdb "x/8i addb_nullified_tests_2\n"
gdb_expect {
-re "
! .*addbf,n r1,r4,.* <addb_tests_2>.*
! .*addbf,=,n r1,r4,.* <addb_tests_2>.*
! .*addbf,<,n r1,r4,.* <addb_tests_2>.*
! .*addbf,<=,n r1,r4,.* <addb_tests_2>.*
! .*addbf,nuv,n r1,r4,.* <addb_tests_2>.*
! .*addbf,znv,n r1,r4,.* <addb_tests_2>.*
! .*addbf,sv,n r1,r4,.* <addb_tests_2>.*
! .*addbf,od,n r1,r4,.* <addb_tests_2>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_2" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_2" }
timeout { fail "(timeout) addb_nullified_tests_2" }
--- 447,460 ----
send_gdb "x/8i addb_nullified_tests_2\n"
gdb_expect {
-re "
! .*addb,tr,n %r1,%r4,.* <addb_tests_2>.*
! .*addb,<>,n %r1,%r4,.* <addb_tests_2>.*
! .*addb,>=,n %r1,%r4,.* <addb_tests_2>.*
! .*addb,>,n %r1,%r4,.* <addb_tests_2>.*
! .*addb,uv,n %r1,%r4,.* <addb_tests_2>.*
! .*addb,vnz,n %r1,%r4,.* <addb_tests_2>.*
! .*addb,nsv,n %r1,%r4,.* <addb_tests_2>.*
! .*addb,ev,n %r1,%r4,.* <addb_tests_2>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_2" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_2" }
timeout { fail "(timeout) addb_nullified_tests_2" }
***************
*** 460,473 ****
send_gdb "x/8i addib_tests_1\n"
gdb_expect {
-re "
! .*addib -1,r4,.* <addib_tests_1>.*
! .*addib,= -1,r4,.* <addib_tests_1>.*
! .*addib,< -1,r4,.* <addib_tests_1>.*
! .*addib,<= -1,r4,.* <addib_tests_1>.*
! .*addib,nuv -1,r4,.* <addib_tests_1>.*
! .*addib,znv -1,r4,.* <addib_tests_1>.*
! .*addib,sv -1,r4,.* <addib_tests_1>.*
! .*addib,od -1,r4,.* <addib_tests_1>.*
.*$gdb_prompt $" { pass "addib_tests_1" }
-re "$gdb_prompt $" { fail "addib_tests_1" }
timeout { fail "(timeout) addib_tests_1" }
--- 463,476 ----
send_gdb "x/8i addib_tests_1\n"
gdb_expect {
-re "
! .*addib -1,%r4,.* <addib_tests_1>.*
! .*addib,= -1,%r4,.* <addib_tests_1>.*
! .*addib,< -1,%r4,.* <addib_tests_1>.*
! .*addib,<= -1,%r4,.* <addib_tests_1>.*
! .*addib,nuv -1,%r4,.* <addib_tests_1>.*
! .*addib,znv -1,%r4,.* <addib_tests_1>.*
! .*addib,sv -1,%r4,.* <addib_tests_1>.*
! .*addib,od -1,%r4,.* <addib_tests_1>.*
.*$gdb_prompt $" { pass "addib_tests_1" }
-re "$gdb_prompt $" { fail "addib_tests_1" }
timeout { fail "(timeout) addib_tests_1" }
***************
*** 476,489 ****
send_gdb "x/8i addib_tests_2\n"
gdb_expect {
-re "
! .*addibf -1,r4,.* <addib_tests_2>.*
! .*addibf,= -1,r4,.* <addib_tests_2>.*
! .*addibf,< -1,r4,.* <addib_tests_2>.*
! .*addibf,<= -1,r4,.* <addib_tests_2>.*
! .*addibf,nuv -1,r4,.* <addib_tests_2>.*
! .*addibf,znv -1,r4,.* <addib_tests_2>.*
! .*addibf,sv -1,r4,.* <addib_tests_2>.*
! .*addibf,od -1,r4,.* <addib_tests_2>.*
.*$gdb_prompt $" { pass "addib_tests_2" }
-re "$gdb_prompt $" { fail "addib_tests_2" }
timeout { fail "(timeout) addib_tests_2" }
--- 479,492 ----
send_gdb "x/8i addib_tests_2\n"
gdb_expect {
-re "
! .*addib,tr -1,%r4,.* <addib_tests_2>.*
! .*addib,<> -1,%r4,.* <addib_tests_2>.*
! .*addib,>= -1,%r4,.* <addib_tests_2>.*
! .*addib,> -1,%r4,.* <addib_tests_2>.*
! .*addib,uv -1,%r4,.* <addib_tests_2>.*
! .*addib,vnz -1,%r4,.* <addib_tests_2>.*
! .*addib,nsv -1,%r4,.* <addib_tests_2>.*
! .*addib,ev -1,%r4,.* <addib_tests_2>.*
.*$gdb_prompt $" { pass "addib_tests_2" }
-re "$gdb_prompt $" { fail "addib_tests_2" }
timeout { fail "(timeout) addib_tests_2" }
***************
*** 492,505 ****
send_gdb "x/8i addib_nullified_tests_1\n"
gdb_expect {
-re "
! .*addib,n -1,r4,.* <addib_tests_1>.*
! .*addib,=,n -1,r4,.* <addib_tests_1>.*
! .*addib,<,n -1,r4,.* <addib_tests_1>.*
! .*addib,<=,n -1,r4,.* <addib_tests_1>.*
! .*addib,nuv,n -1,r4,.* <addib_tests_1>.*
! .*addib,znv,n -1,r4,.* <addib_tests_1>.*
! .*addib,sv,n -1,r4,.* <addib_tests_1>.*
! .*addib,od,n -1,r4,.* <addib_tests_1>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_1" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_1" }
timeout { fail "(timeout) addb_nullified_tests_1" }
--- 495,508 ----
send_gdb "x/8i addib_nullified_tests_1\n"
gdb_expect {
-re "
! .*addib,n -1,%r4,.* <addib_tests_1>.*
! .*addib,=,n -1,%r4,.* <addib_tests_1>.*
! .*addib,<,n -1,%r4,.* <addib_tests_1>.*
! .*addib,<=,n -1,%r4,.* <addib_tests_1>.*
! .*addib,nuv,n -1,%r4,.* <addib_tests_1>.*
! .*addib,znv,n -1,%r4,.* <addib_tests_1>.*
! .*addib,sv,n -1,%r4,.* <addib_tests_1>.*
! .*addib,od,n -1,%r4,.* <addib_tests_1>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_1" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_1" }
timeout { fail "(timeout) addb_nullified_tests_1" }
***************
*** 508,521 ****
send_gdb "x/8i addib_nullified_tests_2\n"
gdb_expect {
-re "
! .*addibf,n -1,r4,.* <addib_tests_2>.*
! .*addibf,=,n -1,r4,.* <addib_tests_2>.*
! .*addibf,<,n -1,r4,.* <addib_tests_2>.*
! .*addibf,<=,n -1,r4,.* <addib_tests_2>.*
! .*addibf,nuv,n -1,r4,.* <addib_tests_2>.*
! .*addibf,znv,n -1,r4,.* <addib_tests_2>.*
! .*addibf,sv,n -1,r4,.* <addib_tests_2>.*
! .*addibf,od,n -1,r4,.* <addib_tests_2>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_2" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_2" }
timeout { fail "(timeout) addb_nullified_tests_2" }
--- 511,524 ----
send_gdb "x/8i addib_nullified_tests_2\n"
gdb_expect {
-re "
! .*addib,tr,n -1,%r4,.* <addib_tests_2>.*
! .*addib,<>,n -1,%r4,.* <addib_tests_2>.*
! .*addib,>=,n -1,%r4,.* <addib_tests_2>.*
! .*addib,>,n -1,%r4,.* <addib_tests_2>.*
! .*addib,uv,n -1,%r4,.* <addib_tests_2>.*
! .*addib,vnz,n -1,%r4,.* <addib_tests_2>.*
! .*addib,nsv,n -1,%r4,.* <addib_tests_2>.*
! .*addib,ev,n -1,%r4,.* <addib_tests_2>.*
.*$gdb_prompt $" { pass "addb_nullified_tests_2" }
-re "$gdb_prompt $" { fail "addb_nullified_tests_2" }
timeout { fail "(timeout) addb_nullified_tests_2" }
***************
*** 524,605 ****
send_gdb "x/8i bb_tests\n"
gdb_expect {
-re "
! .*bvb,< r4,.* <bb_tests>.*
! .*bvb,>= r4,.* <bb_tests>.*
! .*bvb,<,n r4,.* <bb_tests>.*
! .*bvb,>=,n r4,.* <bb_tests>.*
! .*bb,< r4,5,.* <bb_tests>.*
! .*bb,>= r4,5,.* <bb_tests>.*
! .*bb,<,n r4,5,.* <bb_tests>.*
! .*bb,>=,n r4,5,.* <bb_tests>.*
.*$gdb_prompt $" { pass "bb_tests" }
-re "$gdb_prompt $" { fail "bb_tests" }
timeout { fail "(timeout) bb_tests " }
}
}
proc all_integer_computational_tests { } {
global gdb_prompt
global hex
global decimal
! set add_insns [list {add} {addl} {addo} {addc} {addco} \
! {sh1add} {sh1addl} {sh1addo} \
! {sh2add} {sh2addl} {sh2addo} \
! {sh3add} {sh3addl} {sh3addo} ]
! foreach i $add_insns {
! send_gdb "x/16i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i r4,r5,r6.*
! .*$i,= r4,r5,r6.*
! .*$i,< r4,r5,r6.*
! .*$i,<= r4,r5,r6.*
! .*$i,nuv r4,r5,r6.*
! .*$i,znv r4,r5,r6.*
! .*$i,sv r4,r5,r6.*
! .*$i,od r4,r5,r6.*
! .*$i,tr r4,r5,r6.*
! .*$i,<> r4,r5,r6.*
! .*$i,>= r4,r5,r6.*
! .*$i,> r4,r5,r6.*
! .*$i,uv r4,r5,r6.*
! .*$i,vnz r4,r5,r6.*
! .*$i,nsv r4,r5,r6.*
! .*$i,ev r4,r5,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
! }
! }
! set sub_insns [list {sub} {subo} {subb} {subbo} {subt} {subto} \
! {ds} {comclr} ]
!
! foreach i $sub_insns {
! send_gdb "x/16i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i r4,r5,r6.*
! .*$i,= r4,r5,r6.*
! .*$i,< r4,r5,r6.*
! .*$i,<= r4,r5,r6.*
! .*$i,<< r4,r5,r6.*
! .*$i,<<= r4,r5,r6.*
! .*$i,sv r4,r5,r6.*
! .*$i,od r4,r5,r6.*
! .*$i,tr r4,r5,r6.*
! .*$i,<> r4,r5,r6.*
! .*$i,>= r4,r5,r6.*
! .*$i,> r4,r5,r6.*
! .*$i,>>= r4,r5,r6.*
! .*$i,>> r4,r5,r6.*
! .*$i,nsv r4,r5,r6.*
! .*$i,ev r4,r5,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
--- 527,649 ----
send_gdb "x/8i bb_tests\n"
gdb_expect {
-re "
! .*bb,< %r4,.* <bb_tests>.*
! .*bb,>= %r4,.* <bb_tests>.*
! .*bb,<,n %r4,.* <bb_tests>.*
! .*bb,>=,n %r4,.* <bb_tests>.*
! .*bb,< %r4,5,.* <bb_tests>.*
! .*bb,>= %r4,5,.* <bb_tests>.*
! .*bb,<,n %r4,5,.* <bb_tests>.*
! .*bb,>=,n %r4,5,.* <bb_tests>.*
.*$gdb_prompt $" { pass "bb_tests" }
-re "$gdb_prompt $" { fail "bb_tests" }
timeout { fail "(timeout) bb_tests " }
}
}
+ # set add_insns [list {add} {addl} {addo} {addc} {addco} \
+ # {sh1add} {sh1addl} {sh1addo} \
+ # {sh2add} {sh2addl} {sh2addo} \
+ # {sh3add} {sh3addl} {sh3addo} ]
+
proc all_integer_computational_tests { } {
global gdb_prompt
global hex
global decimal
! set test_list [list {add add} {addl add,l} {addc add,c} \
! {addco add,tsv,c} ]
! foreach test_args $test_list {
! set instr [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
! send_gdb "x/16i ${instr}_tests\n"
! gdb_expect {
! -re "
! .*$instr_das %r4,%r5,%r6.*
! .*$instr_das,= %r4,%r5,%r6.*
! .*$instr_das,< %r4,%r5,%r6.*
! .*$instr_das,<= %r4,%r5,%r6.*
! .*$instr_das,nuv %r4,%r5,%r6.*
! .*$instr_das,znv %r4,%r5,%r6.*
! .*$instr_das,sv %r4,%r5,%r6.*
! .*$instr_das,od %r4,%r5,%r6.*
! .*$instr_das,tr %r4,%r5,%r6.*
! .*$instr_das,<> %r4,%r5,%r6.*
! .*$instr_das,>= %r4,%r5,%r6.*
! .*$instr_das,> %r4,%r5,%r6.*
! .*$instr_das,uv %r4,%r5,%r6.*
! .*$instr_das,vnz %r4,%r5,%r6.*
! .*$instr_das,nsv %r4,%r5,%r6.*
! .*$instr_das,ev %r4,%r5,%r6.*
! .*$gdb_prompt $" { pass "test_args $instr_das tests" }
! -re "$gdb_prompt $" { fail "test_args $instr $instr_das tests" }
! timeout { fail "(timeout) test_args $instr $instr_das tests" }
! }
! }
! set test_list [list {sh1add shladd 1} {sh1addl shladd,l 1} \
! {sh1addo shladd,tsv 1} {sh2add shladd 2} \
! {sh2addl shladd,l 2} {sh2addo shladd,tsv 2} \
! {sh3add shladd 3} {sh3addl shladd,l 3} \
! {sh3addl shladd,l 3} {sh3addo shladd,tsv 3} ]
! foreach test_args $test_list {
! set instr [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
! set instr_lit [lindex $test_args 2]
! send_gdb "x/16i ${instr}_tests\n"
gdb_expect {
-re "
! .*$instr_das %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,= %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,< %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,<= %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,nuv %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,znv %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,sv %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,od %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,tr %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,<> %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,>= %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,> %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,uv %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,vnz %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,nsv %r4,$instr_lit,%r5,%r6.*
! .*$instr_das,ev %r4,$instr_lit,%r5,%r6.*
! .*$gdb_prompt $" { pass "test_args $instr_das $instr_lit tests" }
! -re "$gdb_prompt $" { fail "test_args $instr $instr_das $instr_lit tests" }
! timeout { fail "(timeout) test_args $instr $instr_das $instr_lit tests" }
! }
! }
!
!
! set test_list [list {sub sub} {subo sub,tsv} {subt sub,tc} \
! {subto sub,tsv,tc} {ds ds} {comclr cmpclr} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
! send_gdb "x/16i ${instr_asm}_tests\n";
gdb_expect {
-re "
! .*$instr_das %r4,%r5,%r6.*
! .*$instr_das,= %r4,%r5,%r6.*
! .*$instr_das,< %r4,%r5,%r6.*
! .*$instr_das,<= %r4,%r5,%r6.*
! .*$instr_das,<< %r4,%r5,%r6.*
! .*$instr_das,<<= %r4,%r5,%r6.*
! .*$instr_das,sv %r4,%r5,%r6.*
! .*$instr_das,od %r4,%r5,%r6.*
! .*$instr_das,tr %r4,%r5,%r6.*
! .*$instr_das,<> %r4,%r5,%r6.*
! .*$instr_das,>= %r4,%r5,%r6.*
! .*$instr_das,> %r4,%r5,%r6.*
! .*$instr_das,>>= %r4,%r5,%r6.*
! .*$instr_das,>> %r4,%r5,%r6.*
! .*$instr_das,nsv %r4,%r5,%r6.*
! .*$instr_das,ev %r4,%r5,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
***************
*** 609,745 ****
send_gdb "x/10i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i r4,r5,r6.*
! .*$i,= r4,r5,r6.*
! .*$i,< r4,r5,r6.*
! .*$i,<= r4,r5,r6.*
! .*$i,od r4,r5,r6.*
! .*$i,tr r4,r5,r6.*
! .*$i,<> r4,r5,r6.*
! .*$i,>= r4,r5,r6.*
! .*$i,> r4,r5,r6.*
! .*$i,ev r4,r5,r6.*
.*$gdb_prompt $" { pass "$i tests" }
-re "$gdb_prompt $" { fail "$i tests" }
timeout { fail "(timeout) $i tests" }
}
}
! set unit_insns1 [list {uxor} {uaddcm} {uaddcmt} ]
! foreach i $unit_insns1 {
! send_gdb "x/12i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i r4,r5,r6.*
! .*$i,sbz r4,r5,r6.*
! .*$i,shz r4,r5,r6.*
! .*$i,sdc r4,r5,r6.*
! .*$i,sbc r4,r5,r6.*
! .*$i,shc r4,r5,r6.*
! .*$i,tr r4,r5,r6.*
! .*$i,nbz r4,r5,r6.*
! .*$i,nhz r4,r5,r6.*
! .*$i,ndc r4,r5,r6.*
! .*$i,nbc r4,r5,r6.*
! .*$i,nhc r4,r5,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
- set unit_insns2 [list {dcor} {idcor} ]
! foreach i $unit_insns2 {
! send_gdb "x/12i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i r4,r5.*
! .*$i,sbz r4,r5.*
! .*$i,shz r4,r5.*
! .*$i,sdc r4,r5.*
! .*$i,sbc r4,r5.*
! .*$i,shc r4,r5.*
! .*$i,tr r4,r5.*
! .*$i,nbz r4,r5.*
! .*$i,nhz r4,r5.*
! .*$i,ndc r4,r5.*
! .*$i,nbc r4,r5.*
! .*$i,nhc r4,r5.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
- set addi_insns [list {addi} {addio} {addit} {addito} ]
! foreach i $addi_insns {
! send_gdb "x/16i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i 7b,r5,r6.*
! .*$i,= 7b,r5,r6.*
! .*$i,< 7b,r5,r6.*
! .*$i,<= 7b,r5,r6.*
! .*$i,nuv 7b,r5,r6.*
! .*$i,znv 7b,r5,r6.*
! .*$i,sv 7b,r5,r6.*
! .*$i,od 7b,r5,r6.*
! .*$i,tr 7b,r5,r6.*
! .*$i,<> 7b,r5,r6.*
! .*$i,>= 7b,r5,r6.*
! .*$i,> 7b,r5,r6.*
! .*$i,uv 7b,r5,r6.*
! .*$i,vnz 7b,r5,r6.*
! .*$i,nsv 7b,r5,r6.*
! .*$i,ev 7b,r5,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
- set subi_insns [list {subi} {subio} {comiclr} ]
! foreach i $subi_insns {
! send_gdb "x/16i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i 7b,r5,r6.*
! .*$i,= 7b,r5,r6.*
! .*$i,< 7b,r5,r6.*
! .*$i,<= 7b,r5,r6.*
! .*$i,<< 7b,r5,r6.*
! .*$i,<<= 7b,r5,r6.*
! .*$i,sv 7b,r5,r6.*
! .*$i,od 7b,r5,r6.*
! .*$i,tr 7b,r5,r6.*
! .*$i,<> 7b,r5,r6.*
! .*$i,>= 7b,r5,r6.*
! .*$i,> 7b,r5,r6.*
! .*$i,>>= 7b,r5,r6.*
! .*$i,>> 7b,r5,r6.*
! .*$i,nsv 7b,r5,r6.*
! .*$i,ev 7b,r5,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
send_gdb "x/8i vshd_tests\n"
gdb_expect {
-re "
! .*vshd r4,r5,r6.*
! .*vshd,= r4,r5,r6.*
! .*vshd,< r4,r5,r6.*
! .*vshd,od r4,r5,r6.*
! .*vshd,tr r4,r5,r6.*
! .*vshd,<> r4,r5,r6.*
! .*vshd,>= r4,r5,r6.*
! .*vshd,ev r4,r5,r6.*
.*$gdb_prompt $" { pass "vshd tests" }
-re "$gdb_prompt $" { fail "vshd tests" }
timeout { fail "(timeout) "vshd tests" }
--- 653,815 ----
send_gdb "x/10i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i %r4,%r5,%r6.*
! .*$i,= %r4,%r5,%r6.*
! .*$i,< %r4,%r5,%r6.*
! .*$i,<= %r4,%r5,%r6.*
! .*$i,od %r4,%r5,%r6.*
! .*$i,tr %r4,%r5,%r6.*
! .*$i,<> %r4,%r5,%r6.*
! .*$i,>= %r4,%r5,%r6.*
! .*$i,> %r4,%r5,%r6.*
! .*$i,ev %r4,%r5,%r6.*
.*$gdb_prompt $" { pass "$i tests" }
-re "$gdb_prompt $" { fail "$i tests" }
timeout { fail "(timeout) $i tests" }
}
}
! send_gdb "x/6i uxor_tests\n"
! gdb_expect {
! -re "
! .*uxor %r4,%r5,%r6.*
! .*uxor,sbz %r4,%r5,%r6.*
! .*uxor,shz %r4,%r5,%r6.*
! .*uxor,tr %r4,%r5,%r6.*
! .*uxor,nbz %r4,%r5,%r6.*
! .*uxor,nhz %r4,%r5,%r6.*
! .*$gdb_prompt $" { pass "uxor tests" }
! -re "$gdb_prompt $" { fail "uxor tests" }
! timeout { fail "(timeout) uxor tests" }
! }
!
! set test_list [list {uaddcm uaddcm} {uaddcmt uaddcm,tc} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
! send_gdb "x/12i ${instr_asm}_tests\n";
gdb_expect {
-re "
! .*$instr_das %r4,%r5,%r6.*
! .*$instr_das,sbz %r4,%r5,%r6.*
! .*$instr_das,shz %r4,%r5,%r6.*
! .*$instr_das,sdc %r4,%r5,%r6.*
! .*$instr_das,sbc %r4,%r5,%r6.*
! .*$instr_das,shc %r4,%r5,%r6.*
! .*$instr_das,tr %r4,%r5,%r6.*
! .*$instr_das,nbz %r4,%r5,%r6.*
! .*$instr_das,nhz %r4,%r5,%r6.*
! .*$instr_das,ndc %r4,%r5,%r6.*
! .*$instr_das,nbc %r4,%r5,%r6.*
! .*$instr_das,nhc %r4,%r5,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
! set test_list [list {dcor dcor} {idcor dcor,i} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/12i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das %r4,%r5.*
! .*$instr_das,sbz %r4,%r5.*
! .*$instr_das,shz %r4,%r5.*
! .*$instr_das,sdc %r4,%r5.*
! .*$instr_das,sbc %r4,%r5.*
! .*$instr_das,shc %r4,%r5.*
! .*$instr_das,tr %r4,%r5.*
! .*$instr_das,nbz %r4,%r5.*
! .*$instr_das,nhz %r4,%r5.*
! .*$instr_das,ndc %r4,%r5.*
! .*$instr_das,nbc %r4,%r5.*
! .*$instr_das,nhc %r4,%r5.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
! set test_list [list {addi addi} {addio addi,tsv} {addit addi,tc} \
! {addito addi,tsv,tc} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/16i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das 0x7b,%r5,%r6.*
! .*$instr_das,= 0x7b,%r5,%r6.*
! .*$instr_das,< 0x7b,%r5,%r6.*
! .*$instr_das,<= 0x7b,%r5,%r6.*
! .*$instr_das,nuv 0x7b,%r5,%r6.*
! .*$instr_das,znv 0x7b,%r5,%r6.*
! .*$instr_das,sv 0x7b,%r5,%r6.*
! .*$instr_das,od 0x7b,%r5,%r6.*
! .*$instr_das,tr 0x7b,%r5,%r6.*
! .*$instr_das,<> 0x7b,%r5,%r6.*
! .*$instr_das,>= 0x7b,%r5,%r6.*
! .*$instr_das,> 0x7b,%r5,%r6.*
! .*$instr_das,uv 0x7b,%r5,%r6.*
! .*$instr_das,vnz 0x7b,%r5,%r6.*
! .*$instr_das,nsv 0x7b,%r5,%r6.*
! .*$instr_das,ev 0x7b,%r5,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
! set test_list [list {subi subi} {subio subio} {comiclr cmpiclr} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/16i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das 0x7b,%r5,%r6.*
! .*$instr_das,= 0x7b,%r5,%r6.*
! .*$instr_das,< 0x7b,%r5,%r6.*
! .*$instr_das,<= 0x7b,%r5,%r6.*
! .*$instr_das,<< 0x7b,%r5,%r6.*
! .*$instr_das,<<= 0x7b,%r5,%r6.*
! .*$instr_das,sv 0x7b,%r5,%r6.*
! .*$instr_das,od 0x7b,%r5,%r6.*
! .*$instr_das,tr 0x7b,%r5,%r6.*
! .*$instr_das,<> 0x7b,%r5,%r6.*
! .*$instr_das,>= 0x7b,%r5,%r6.*
! .*$instr_das,> 0x7b,%r5,%r6.*
! .*$instr_das,>>= 0x7b,%r5,%r6.*
! .*$instr_das,>> 0x7b,%r5,%r6.*
! .*$instr_das,nsv 0x7b,%r5,%r6.*
! .*$instr_das,ev 0x7b,%r5,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
send_gdb "x/8i vshd_tests\n"
gdb_expect {
-re "
! .*shrpw %r4,%r5,%sar,%r6.*
! .*shrpw,= %r4,%r5,%sar,%r6.*
! .*shrpw,< %r4,%r5,%sar,%r6.*
! .*shrpw,od %r4,%r5,%sar,%r6.*
! .*shrpw,tr %r4,%r5,%sar,%r6.*
! .*shrpw,<> %r4,%r5,%sar,%r6.*
! .*shrpw,>= %r4,%r5,%sar,%r6.*
! .*shrpw,ev %r4,%r5,%sar,%r6.*
.*$gdb_prompt $" { pass "vshd tests" }
-re "$gdb_prompt $" { fail "vshd tests" }
timeout { fail "(timeout) "vshd tests" }
***************
*** 748,843 ****
send_gdb "x/8i shd_tests\n"
gdb_expect {
-re "
! .*shd r4,r5,5,r6.*
! .*shd,= r4,r5,5,r6.*
! .*shd,< r4,r5,5,r6.*
! .*shd,od r4,r5,5,r6.*
! .*shd,tr r4,r5,5,r6.*
! .*shd,<> r4,r5,5,r6.*
! .*shd,>= r4,r5,5,r6.*
! .*shd,ev r4,r5,5,r6.*
.*$gdb_prompt $" { pass "shd tests" }
-re "$gdb_prompt $" { fail "shd tests" }
timeout { fail "(timeout) "shd tests" }
}
- set extract_insns1 [list {extru} {extrs} {zdep} {dep} ]
! foreach i $extract_insns1 {
! send_gdb "x/8i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i r4,5,10,r6.*
! .*$i,= r4,5,10,r6.*
! .*$i,< r4,5,10,r6.*
! .*$i,od r4,5,10,r6.*
! .*$i,tr r4,5,10,r6.*
! .*$i,<> r4,5,10,r6.*
! .*$i,>= r4,5,10,r6.*
! .*$i,ev r4,5,10,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
- set extract_insns2 [list {vextru} {vextrs} {zvdep} {vdep} ]
! foreach i $extract_insns2 {
! send_gdb "x/8i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i r4,5,r6.*
! .*$i,= r4,5,r6.*
! .*$i,< r4,5,r6.*
! .*$i,od r4,5,r6.*
! .*$i,tr r4,5,r6.*
! .*$i,<> r4,5,r6.*
! .*$i,>= r4,5,r6.*
! .*$i,ev r4,5,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
- set extract_insns3 [list {vdepi} {zvdepi} ]
! foreach i $extract_insns3 {
! send_gdb "x/8i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i -1,5,r6.*
! .*$i,= -1,5,r6.*
! .*$i,< -1,5,r6.*
! .*$i,od -1,5,r6.*
! .*$i,tr -1,5,r6.*
! .*$i,<> -1,5,r6.*
! .*$i,>= -1,5,r6.*
! .*$i,ev -1,5,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
- set extract_insns4 [list {depi} {zdepi} ]
! foreach i $extract_insns4 {
! send_gdb "x/8i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i -1,4,10,r6.*
! .*$i,= -1,4,10,r6.*
! .*$i,< -1,4,10,r6.*
! .*$i,od -1,4,10,r6.*
! .*$i,tr -1,4,10,r6.*
! .*$i,<> -1,4,10,r6.*
! .*$i,>= -1,4,10,r6.*
! .*$i,ev -1,4,10,r6.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
}
--- 818,926 ----
send_gdb "x/8i shd_tests\n"
gdb_expect {
-re "
! .*shrpw %r4,%r5,5,%r6.*
! .*shrpw,= %r4,%r5,5,%r6.*
! .*shrpw,< %r4,%r5,5,%r6.*
! .*shrpw,od %r4,%r5,5,%r6.*
! .*shrpw,tr %r4,%r5,5,%r6.*
! .*shrpw,<> %r4,%r5,5,%r6.*
! .*shrpw,>= %r4,%r5,5,%r6.*
! .*shrpw,ev %r4,%r5,5,%r6.*
.*$gdb_prompt $" { pass "shd tests" }
-re "$gdb_prompt $" { fail "shd tests" }
timeout { fail "(timeout) "shd tests" }
}
! set test_list [list {extru extrw,u} {extrs extrw,s} {zdep depw,z} \
! {dep depw} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
! send_gdb "x/8i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das %r4,1,2,%r6.*
! .*$instr_das,= %r4,1,2,%r6.*
! .*$instr_das,< %r4,1,2,%r6.*
! .*$instr_das,od %r4,1,2,%r6.*
! .*$instr_das,tr %r4,1,2,%r6.*
! .*$instr_das,<> %r4,1,2,%r6.*
! .*$instr_das,>= %r4,1,2,%r6.*
! .*$instr_das,ev %r4,1,2,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
! set test_list [list {vextru extrw,u} {vextrs extrw,s} {zvdep depw,z} \
! {vdep depw} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/8i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das %r4,%sar,5,%r6.*
! .*$instr_das,= %r4,%sar,5,%r6.*
! .*$instr_das,< %r4,%sar,5,%r6.*
! .*$instr_das,od %r4,%sar,5,%r6.*
! .*$instr_das,tr %r4,%sar,5,%r6.*
! .*$instr_das,<> %r4,%sar,5,%r6.*
! .*$instr_das,>= %r4,%sar,5,%r6.*
! .*$instr_das,ev %r4,%sar,5,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
! set test_list [list {vdepi depwi} {zvdepi depwi,z} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/8i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das -1,%sar,5,%r6.*
! .*$instr_das,= -1,%sar,5,%r6.*
! .*$instr_das,< -1,%sar,5,%r6.*
! .*$instr_das,od -1,%sar,5,%r6.*
! .*$instr_das,tr -1,%sar,5,%r6.*
! .*$instr_das,<> -1,%sar,5,%r6.*
! .*$instr_das,>= -1,%sar,5,%r6.*
! .*$instr_das,ev -1,%sar,5,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
! set test_list [list {depi depwi} {zdepi depwi,z} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/8i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das -1,4,5,%r6.*
! .*$instr_das,= -1,4,5,%r6.*
! .*$instr_das,< -1,4,5,%r6.*
! .*$instr_das,od -1,4,5,%r6.*
! .*$instr_das,tr -1,4,5,%r6.*
! .*$instr_das,<> -1,4,5,%r6.*
! .*$instr_das,>= -1,4,5,%r6.*
! .*$instr_das,ev -1,4,5,%r6.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
}
***************
*** 850,870 ****
send_gdb "x/14i system_control_tests\n"
gdb_expect {
-re "
! .*break 5,c.*
! .*rfi.*
! .*rfir.*
! .*ssm 5,r4.*
! .*rsm 5,r4.*
! .*mtsm r4.*
! .*ldsid \\(sr0,r5\\),r4.*
! .*mtsp r4,sr0.*
! .*mtctl r4,ccr.*
! .*mfsp sr0,r4.*
! .*mfctl ccr,r4.*
! .*sync.*
! .*syncdma.*
! .*diag 4d2.*
! .*$gdb_prompt $" { pass "system_constrol_tests" }
-re "$gdb_prompt $" { fail "system_control_tests" }
timeout { file "(timeout) system_control_tests" }
}
--- 933,940 ----
send_gdb "x/14i system_control_tests\n"
gdb_expect {
-re "
! .*break 5,0xc\r\n.*rfi\r\n.*rfi,r\r\n.*ssm 5,%r4\r\n.*rsm 5,%r4\r\n.*mtsm %r4\r\n.*ldsid \\(%sr0,%r5\\),%r4\r\n.*mtsp %r4,%sr0\r\n.*mtctl %r4,%ccr\r\n.*mfsp %sr0,%r4\r\n.*mfctl %ccr,%r4\r\n.*sync\r\n.*syncdma\r\n.*diag 0x4d2\r\n$gdb_prompt $" \
! { pass "system_constrol_tests" }
-re "$gdb_prompt $" { fail "system_control_tests" }
timeout { file "(timeout) system_control_tests" }
}
***************
*** 872,895 ****
send_gdb "x/4i probe_tests\n"
gdb_expect {
-re "
! .*prober \\(sr0,r5\\),r6,r7.*
! .*proberi \\(sr0,r5\\),1,r7.*
! .*probew \\(sr0,r5\\),r6,r7.*
! .*probewi \\(sr0,r5\\),1,r7.*
.*$gdb_prompt $" { pass "probe_tests" }
-re "$gdb_prompt $" { fail "probe_tests" }
timeout { file "(timeout) probe_tests" }
}
! # lci uses the same bit pattern as lha, so accept lha.
! send_gdb "x/5i lpa_tests\n"
gdb_expect {
-re "
! .*lpa r4\\(sr0,r5\\),r6.*
! .*lpa,m r4\\(sr0,r5\\),r6.*
! .*lha r4\\(sr0,r5\\),r6.*
! .*lha,m r4\\(sr0,r5\\),r6.*
! .*lha r4\\(sr0,r5\\),r6.*
.*$gdb_prompt $" { pass "lpa_tests" }
-re "$gdb_prompt $" { fail "lpa_tests" }
timeout { file "(timeout) lpa_tests" }
--- 942,962 ----
send_gdb "x/4i probe_tests\n"
gdb_expect {
-re "
! .*probe,r \\(%sr0,%r5\\),%r6,%r7.*
! .*probei,r \\(%sr0,%r5\\),1,%r7.*
! .*probe,w \\(%sr0,%r5\\),%r6,%r7.*
! .*probei,w \\(%sr0,%r5\\),1,%r7.*
.*$gdb_prompt $" { pass "probe_tests" }
-re "$gdb_prompt $" { fail "probe_tests" }
timeout { file "(timeout) probe_tests" }
}
! send_gdb "x/3i lpa_tests\n"
gdb_expect {
-re "
! .*lpa %r4\\(%sr0,%r5\\),%r6.*
! .*lpa,m %r4\\(%sr0,%r5\\),%r6.*
! .*lci %r4\\(%sr0,%r5\\),%r6.*
.*$gdb_prompt $" { pass "lpa_tests" }
-re "$gdb_prompt $" { fail "lpa_tests" }
timeout { file "(timeout) lpa_tests" }
***************
*** 898,921 ****
send_gdb "x/18i purge_tests\n"
gdb_expect {
-re "
! .*pdtlb r4\\(sr0,r5\\).*
! .*pdtlb,m r4\\(sr0,r5\\).*
! .*pitlb r4\\(sr0,r5\\).*
! .*pitlb,m r4\\(sr0,r5\\).*
! .*pdtlbe r4\\(sr0,r5\\).*
! .*pdtlbe,m r4\\(sr0,r5\\).*
! .*pitlbe r4\\(sr0,r5\\).*
! .*pitlbe,m r4\\(sr0,r5\\).*
! .*pdc r4\\(sr0,r5\\).*
! .*pdc,m r4\\(sr0,r5\\).*
! .*fdc r4\\(sr0,r5\\).*
! .*fdc,m r4\\(sr0,r5\\).*
! .*fic r4\\(sr0,r5\\).*
! .*fic,m r4\\(sr0,r5\\).*
! .*fdce r4\\(sr0,r5\\).*
! .*fdce,m r4\\(sr0,r5\\).*
! .*fice r4\\(sr0,r5\\).*
! .*fice,m r4\\(sr0,r5\\).*
.*$gdb_prompt $" { pass "purge_tests" }
-re "$gdb_prompt $" { fail "purge_tests" }
timeout { file "(timeout) purge_tests" }
--- 965,988 ----
send_gdb "x/18i purge_tests\n"
gdb_expect {
-re "
! .*pdtlb %r4\\(%sr0,%r5\\).*
! .*pdtlb,m %r4\\(%sr0,%r5\\).*
! .*pitlb %r4\\(%sr0,%r5\\).*
! .*pitlb,m %r4\\(%sr0,%r5\\).*
! .*pdtlbe %r4\\(%sr0,%r5\\).*
! .*pdtlbe,m %r4\\(%sr0,%r5\\).*
! .*pitlbe %r4\\(%sr0,%r5\\).*
! .*pitlbe,m %r4\\(%sr0,%r5\\).*
! .*pdc %r4\\(%sr0,%r5\\).*
! .*pdc,m %r4\\(%sr0,%r5\\).*
! .*fdc %r4\\(%sr0,%r5\\).*
! .*fdc,m %r4\\(%sr0,%r5\\).*
! .*fic %r4\\(%sr0,%r5\\).*
! .*fic,m %r4\\(%sr0,%r5\\).*
! .*fdce %r4\\(%sr0,%r5\\).*
! .*fdce,m %r4\\(%sr0,%r5\\).*
! .*fice %r4\\(%sr0,%r5\\).*
! .*fice,m %r4\\(%sr0,%r5\\).*
.*$gdb_prompt $" { pass "purge_tests" }
-re "$gdb_prompt $" { fail "purge_tests" }
timeout { file "(timeout) purge_tests" }
***************
*** 924,933 ****
send_gdb "x/4i insert_tests\n"
gdb_expect {
-re "
! .*idtlba r4,\\(sr0,r5\\).*
! .*iitlba r4,\\(sr0,r5\\).*
! .*idtlbp r4,\\(sr0,r5\\).*
! .*iitlbp r4,\\(sr0,r5\\).*
.*$gdb_prompt $" { pass "insert_tests" }
-re "$gdb_prompt $" { fail "insert_tests" }
timeout { file "(timeout) insert_tests" }
--- 991,1000 ----
send_gdb "x/4i insert_tests\n"
gdb_expect {
-re "
! .*idtlba %r4,\\(%sr0,%r5\\).*
! .*iitlba %r4,\\(%sr0,%r5\\).*
! .*idtlbp %r4,\\(%sr0,%r5\\).*
! .*iitlbp %r4,\\(%sr0,%r5\\).*
.*$gdb_prompt $" { pass "insert_tests" }
-re "$gdb_prompt $" { fail "insert_tests" }
timeout { file "(timeout) insert_tests" }
***************
*** 943,968 ****
send_gdb "x/20i fpu_memory_indexing_tests\n"
gdb_expect {
-re "
! .*fldwx r4\\(sr0,r5\\),fr6.*
! .*fldwx,s r4\\(sr0,r5\\),fr6.*
! .*fldwx,m r4\\(sr0,r5\\),fr6.*
! .*fldwx,sm r4\\(sr0,r5\\),fr6.*
! .*flddx r4\\(sr0,r5\\),fr6.*
! .*flddx,s r4\\(sr0,r5\\),fr6.*
! .*flddx,m r4\\(sr0,r5\\),fr6.*
! .*flddx,sm r4\\(sr0,r5\\),fr6.*
! .*fstwx fr6,r4\\(sr0,r5\\).*
! .*fstwx,s fr6,r4\\(sr0,r5\\).*
! .*fstwx,m fr6,r4\\(sr0,r5\\).*
! .*fstwx,sm fr6,r4\\(sr0,r5\\).*
! .*fstdx fr6,r4\\(sr0,r5\\).*
! .*fstdx,s fr6,r4\\(sr0,r5\\).*
! .*fstdx,m fr6,r4\\(sr0,r5\\).*
! .*fstdx,sm fr6,r4\\(sr0,r5\\).*
! .*fstqx fr6,r4\\(sr0,r5\\).*
! .*fstqx,s fr6,r4\\(sr0,r5\\).*
! .*fstqx,m fr6,r4\\(sr0,r5\\).*
! .*fstqx,sm fr6,r4\\(sr0,r5\\).*
.*$gdb_prompt $" { pass "fpu_memory_indexing_tests" }
-re "$gdb_prompt $" { fail "fpu_memory_indexing_tests" }
timeout { file "(timeout) fpu_memory_indexing_tests" }
--- 1010,1035 ----
send_gdb "x/20i fpu_memory_indexing_tests\n"
gdb_expect {
-re "
! .*fldw %r4\\(%sr0,%r5\\),%fr6.*
! .*fldw,s %r4\\(%sr0,%r5\\),%fr6.*
! .*fldw,m %r4\\(%sr0,%r5\\),%fr6.*
! .*fldw,sm %r4\\(%sr0,%r5\\),%fr6.*
! .*fldd %r4\\(%sr0,%r5\\),%fr6.*
! .*fldd,s %r4\\(%sr0,%r5\\),%fr6.*
! .*fldd,m %r4\\(%sr0,%r5\\),%fr6.*
! .*fldd,sm %r4\\(%sr0,%r5\\),%fr6.*
! .*fstw %fr6,%r4\\(%sr0,%r5\\).*
! .*fstw,s %fr6,%r4\\(%sr0,%r5\\).*
! .*fstw,m %fr6,%r4\\(%sr0,%r5\\).*
! .*fstw,sm %fr6,%r4\\(%sr0,%r5\\).*
! .*fstd %fr6,%r4\\(%sr0,%r5\\).*
! .*fstd,s %fr6,%r4\\(%sr0,%r5\\).*
! .*fstd,m %fr6,%r4\\(%sr0,%r5\\).*
! .*fstd,sm %fr6,%r4\\(%sr0,%r5\\).*
! .*fstqs %fr6,%r4\\(%sr0,%r5\\).*
! .*fstqs,s %fr6,%r4\\(%sr0,%r5\\).*
! .*fstqs,m %fr6,%r4\\(%sr0,%r5\\).*
! .*fstqs,sm %fr6,%r4\\(%sr0,%r5\\).*
.*$gdb_prompt $" { pass "fpu_memory_indexing_tests" }
-re "$gdb_prompt $" { fail "fpu_memory_indexing_tests" }
timeout { file "(timeout) fpu_memory_indexing_tests" }
***************
*** 971,991 ****
send_gdb "x/15i fpu_short_memory_tests\n"
gdb_expect {
-re "
! .*fldws 0\\(sr0,r5\\),fr6.*
! .*fldws,mb 0\\(sr0,r5\\),fr6.*
! .*fldws,ma 0\\(sr0,r5\\),fr6.*
! .*fldds 0\\(sr0,r5\\),fr6.*
! .*fldds,mb 0\\(sr0,r5\\),fr6.*
! .*fldds,ma 0\\(sr0,r5\\),fr6.*
! .*fstws fr6,0\\(sr0,r5\\).*
! .*fstws,mb fr6,0\\(sr0,r5\\).*
! .*fstws,ma fr6,0\\(sr0,r5\\).*
! .*fstds fr6,0\\(sr0,r5\\).*
! .*fstds,mb fr6,0\\(sr0,r5\\).*
! .*fstds,ma fr6,0\\(sr0,r5\\).*
! .*fstqs fr6,0\\(sr0,r5\\).*
! .*fstqs,mb fr6,0\\(sr0,r5\\).*
! .*fstqs,ma fr6,0\\(sr0,r5\\).*
.*$gdb_prompt $" { pass "fpu_short_memory_tests" }
-re "$gdb_prompt $" { fail "fpu_short_memory_tests" }
timeout { file "(timeout) fpu_short_memory_tests" }
--- 1038,1058 ----
send_gdb "x/15i fpu_short_memory_tests\n"
gdb_expect {
-re "
! .*fldw 0\\(%sr0,%r5\\),%fr6.*
! .*fldw,mb 0\\(%sr0,%r5\\),%fr6.*
! .*fldw 0\\(%sr0,%r5\\),%fr6.*
! .*fldd 0\\(%sr0,%r5\\),%fr6.*
! .*fldd,mb 0\\(%sr0,%r5\\),%fr6.*
! .*fldd 0\\(%sr0,%r5\\),%fr6.*
! .*fstw %fr6,0\\(%sr0,%r5\\).*
! .*fstw,mb %fr6,0\\(%sr0,%r5\\).*
! .*fstw %fr6,0\\(%sr0,%r5\\).*
! .*fstd %fr6,0\\(%sr0,%r5\\).*
! .*fstd,mb %fr6,0\\(%sr0,%r5\\).*
! .*fstd %fr6,0\\(%sr0,%r5\\).*
! .*fstqs %fr6,0\\(%sr0,%r5\\).*
! .*fstqs,mb %fr6,0\\(%sr0,%r5\\).*
! .*fstqs %fr6,0\\(%sr0,%r5\\).*
.*$gdb_prompt $" { pass "fpu_short_memory_tests" }
-re "$gdb_prompt $" { fail "fpu_short_memory_tests" }
timeout { file "(timeout) fpu_short_memory_tests" }
***************
*** 1013,1071 ****
send_gdb "x/5i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i,sgl fr5,fr10.*
! .*$i,dbl fr5,fr10.*
! .*$i,quad fr5,fr10.*
! .*$i,sgl fr20,fr24.*
! .*$i,dbl fr20,fr24.*
.*$gdb_prompt $" { pass "$i tests" }
-re "$gdb_prompt $" { fail "$i tests" }
timeout { fail "(timeout) $i tests" }
}
}
- set fpu_conversions [list {fcnvff} {fcnvxf} {fcnvfx} {fcnvfxt} ]
! foreach i $fpu_conversions {
! send_gdb "x/18i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i,sgl,sgl fr5,fr10.*
! .*$i,sgl,dbl fr5,fr10.*
! .*$i,sgl,quad fr5,fr10.*
! .*$i,dbl,sgl fr5,fr10.*
! .*$i,dbl,dbl fr5,fr10.*
! .*$i,dbl,quad fr5,fr10.*
! .*$i,quad,sgl fr5,fr10.*
! .*$i,quad,dbl fr5,fr10.*
! .*$i,quad,quad fr5,fr10.*
! .*$i,sgl,sgl fr20,fr24.*
! .*$i,sgl,dbl fr20,fr24.*
! .*$i,sgl,quad fr20,fr24.*
! .*$i,dbl,sgl fr20,fr24.*
! .*$i,dbl,dbl fr20,fr24.*
! .*$i,dbl,quad fr20,fr24.*
! .*$i,quad,sgl fr20,fr24.*
! .*$i,quad,dbl fr20,fr24.*
! .*$i,quad,quad fr20,fr24.*
! .*$gdb_prompt $" { pass "$i tests" }
! -re "$gdb_prompt $" { fail "$i tests" }
! timeout { fail "(timeout) $i tests" }
}
}
set fpu_three_op_insns [list {fadd} {fsub} {fmpy} {fdiv} {frem} ]
foreach i $fpu_three_op_insns {
send_gdb "x/6i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i,sgl fr4,fr8,fr12.*
! .*$i,dbl fr4,fr8,fr12.*
! .*$i,quad fr4,fr8,fr12.*
! .*$i,sgl fr20,fr24,fr28.*
! .*$i,dbl fr20,fr24,fr28.*
! .*$i,quad fr20,fr24,fr28.*
.*$gdb_prompt $" { pass "$i tests" }
-re "$gdb_prompt $" { fail "$i tests" }
timeout { fail "(timeout) $i tests" }
--- 1080,1208 ----
send_gdb "x/5i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i,sgl %fr5,%fr10.*
! .*$i,dbl %fr5,%fr10.*
! .*$i,quad %fr5,%fr10.*
! .*$i,sgl %fr20,%fr24.*
! .*$i,dbl %fr20,%fr24.*
.*$gdb_prompt $" { pass "$i tests" }
-re "$gdb_prompt $" { fail "$i tests" }
timeout { fail "(timeout) $i tests" }
}
}
! set test_list [list {fcnvff fcnv} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/18i ${instr_asm}_tests\n"
gdb_expect {
-re "
! .*$instr_das,sgl,sgl %fr5,%fr10.*
! .*$instr_das,sgl,dbl %fr5,%fr10.*
! .*$instr_das,sgl,quad %fr5,%fr10.*
! .*$instr_das,dbl,sgl %fr5,%fr10.*
! .*$instr_das,dbl,dbl %fr5,%fr10.*
! .*$instr_das,dbl,quad %fr5,%fr10.*
! .*$instr_das,quad,sgl %fr5,%fr10.*
! .*$instr_das,quad,dbl %fr5,%fr10.*
! .*$instr_das,quad,quad %fr5,%fr10.*
! .*$instr_das,sgl,sgl %fr20,%fr24.*
! .*$instr_das,sgl,dbl %fr20,%fr24.*
! .*$instr_das,sgl,quad %fr20,%fr24.*
! .*$instr_das,dbl,sgl %fr20,%fr24.*
! .*$instr_das,dbl,dbl %fr20,%fr24.*
! .*$instr_das,dbl,quad %fr20,%fr24.*
! .*$instr_das,quad,sgl %fr20,%fr24.*
! .*$instr_das,quad,dbl %fr20,%fr24.*
! .*$instr_das,quad,quad %fr20,%fr24.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
! }
! }
!
!
! set test_list [list {fcnvxf fcnv} ]
! foreach test_args $test_list {
! set instr_asm [lindex $test_args 0]
! set instr_das [lindex $test_args 1]
!
! send_gdb "x/18i ${instr_asm}_tests\n"
! gdb_expect {
! -re "
! .*$instr_das,w,sgl %fr5,%fr10.*
! .*$instr_das,w,dbl %fr5,%fr10.*
! .*$instr_das,w,quad %fr5,%fr10.*
! .*$instr_das,dw,sgl %fr5,%fr10.*
! .*$instr_das,dw,dbl %fr5,%fr10.*
! .*$instr_das,dw,quad %fr5,%fr10.*
! .*$instr_das,qw,sgl %fr5,%fr10.*
! .*$instr_das,qw,dbl %fr5,%fr10.*
! .*$instr_das,qw,quad %fr5,%fr10.*
! .*$instr_das,w,sgl %fr20,%fr24.*
! .*$instr_das,w,dbl %fr20,%fr24.*
! .*$instr_das,w,quad %fr20,%fr24.*
! .*$instr_das,dw,sgl %fr20,%fr24.*
! .*$instr_das,dw,dbl %fr20,%fr24.*
! .*$instr_das,dw,quad %fr20,%fr24.*
! .*$instr_das,qw,sgl %fr20,%fr24.*
! .*$instr_das,qw,dbl %fr20,%fr24.*
! .*$instr_das,qw,quad %fr20,%fr24.*
! .*$gdb_prompt $" { pass "$instr_asm tests" }
! -re "$gdb_prompt $" { fail "$instr_asm tests" }
! timeout { fail "(timeout) $instr_asm tests" }
}
}
+
+ set test_list [list {fcnvfx fcnv} {fcnvfxt fcnv,t} ]
+ foreach test_args $test_list {
+ set instr_asm [lindex $test_args 0]
+ set instr_das [lindex $test_args 1]
+
+ send_gdb "x/18i ${instr_asm}_tests\n"
+ gdb_expect {
+ -re "
+ .*$instr_das,sgl,w %fr5,%fr10.*
+ .*$instr_das,sgl,dw %fr5,%fr10.*
+ .*$instr_das,sgl,qw %fr5,%fr10.*
+ .*$instr_das,dbl,w %fr5,%fr10.*
+ .*$instr_das,dbl,dw %fr5,%fr10.*
+ .*$instr_das,dbl,qw %fr5,%fr10.*
+ .*$instr_das,quad,w %fr5,%fr10.*
+ .*$instr_das,quad,dw %fr5,%fr10.*
+ .*$instr_das,quad,qw %fr5,%fr10.*
+ .*$instr_das,sgl,w %fr20,%fr24.*
+ .*$instr_das,sgl,dw %fr20,%fr24.*
+ .*$instr_das,sgl,qw %fr20,%fr24.*
+ .*$instr_das,dbl,w %fr20,%fr24.*
+ .*$instr_das,dbl,dw %fr20,%fr24.*
+ .*$instr_das,dbl,qw %fr20,%fr24.*
+ .*$instr_das,quad,w %fr20,%fr24.*
+ .*$instr_das,quad,dw %fr20,%fr24.*
+ .*$instr_das,quad,qw %fr20,%fr24.*
+ .*$gdb_prompt $" { pass "$instr_asm tests" }
+ -re "$gdb_prompt $" { fail "$instr_asm tests" }
+ timeout { fail "(timeout) $instr_asm tests" }
+ }
+ }
+
+
set fpu_three_op_insns [list {fadd} {fsub} {fmpy} {fdiv} {frem} ]
foreach i $fpu_three_op_insns {
send_gdb "x/6i $i"; send_gdb "_tests\n"
gdb_expect {
-re "
! .*$i,sgl %fr4,%fr8,%fr12.*
! .*$i,dbl %fr4,%fr8,%fr12.*
! .*$i,quad %fr4,%fr8,%fr12.*
! .*$i,sgl %fr20,%fr24,%fr28.*
! .*$i,dbl %fr20,%fr24,%fr28.*
! .*$i,quad %fr20,%fr24,%fr28.*
.*$gdb_prompt $" { pass "$i tests" }
-re "$gdb_prompt $" { fail "$i tests" }
timeout { fail "(timeout) $i tests" }
***************
*** 1075,1084 ****
send_gdb "x/4i fmpy_addsub_tests\n"
gdb_expect {
-re "
! .*fmpyadd,sgl fr16,fr17,fr18,fr19,fr20.*
! .*fmpyadd,dbl fr16,fr17,fr18,fr19,fr20.*
! .*fmpysub,sgl fr16,fr17,fr18,fr19,fr20.*
! .*fmpysub,dbl fr16,fr17,fr18,fr19,fr20.*
.*$gdb_prompt $" { pass "fmpy_addsub_tests" }
-re "$gdb_prompt $" { fail "fmpy_addsub_tests" }
timeout { fail "(timeout) fmpy_addsub_tests" }
--- 1212,1221 ----
send_gdb "x/4i fmpy_addsub_tests\n"
gdb_expect {
-re "
! .*fmpyadd,sgl %fr16,%fr17,%fr18,%fr19,%fr20.*
! .*fmpyadd,dbl %fr16,%fr17,%fr18,%fr19,%fr20.*
! .*fmpysub,sgl %fr16,%fr17,%fr18,%fr19,%fr20.*
! .*fmpysub,dbl %fr16,%fr17,%fr18,%fr19,%fr20.*
.*$gdb_prompt $" { pass "fmpy_addsub_tests" }
-re "$gdb_prompt $" { fail "fmpy_addsub_tests" }
timeout { fail "(timeout) fmpy_addsub_tests" }
***************
*** 1087,1093 ****
send_gdb "x/i xmpyu_tests\n"
gdb_expect {
-re "
! .*xmpyu fr4,fr5,fr6.*
.*$gdb_prompt $" {pass "xmpyu_tests" }
-re "$gdb_prompt $" {fail "xmpyu_tests" }
timeout { fail "(timeout) xmpyu_tests" }
--- 1224,1230 ----
send_gdb "x/i xmpyu_tests\n"
gdb_expect {
-re "
! .*xmpyu %fr4,%fr5,%fr6.*
.*$gdb_prompt $" {pass "xmpyu_tests" }
-re "$gdb_prompt $" {fail "xmpyu_tests" }
timeout { fail "(timeout) xmpyu_tests" }
***************
*** 1106,1119 ****
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_1\n"
gdb_expect {
-re "
! .*fcmp,$i,false\\? fr4,fr5.*
! .*fcmp,$i,false fr4,fr5.*
! .*fcmp,$i,\\? fr4,fr5.*
! .*fcmp,$i,!<=> fr4,fr5.*
! .*fcmp,$i,= fr4,fr5.*
! .*fcmp,$i,=t fr4,fr5.*
! .*fcmp,$i,\\?= fr4,fr5.*
! .*fcmp,$i,!<> fr4,fr5.*
.*$gdb_prompt $" { pass "$i tests (part1) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part1) " }
timeout { fail "(timeout) fcmp_$i tests (part1) " }
--- 1243,1256 ----
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_1\n"
gdb_expect {
-re "
! .*fcmp,$i,false\\? %fr4,%fr5.*
! .*fcmp,$i,false %fr4,%fr5.*
! .*fcmp,$i,\\? %fr4,%fr5.*
! .*fcmp,$i,!<=> %fr4,%fr5.*
! .*fcmp,$i,= %fr4,%fr5.*
! .*fcmp,$i,=t %fr4,%fr5.*
! .*fcmp,$i,\\?= %fr4,%fr5.*
! .*fcmp,$i,!<> %fr4,%fr5.*
.*$gdb_prompt $" { pass "$i tests (part1) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part1) " }
timeout { fail "(timeout) fcmp_$i tests (part1) " }
***************
*** 1122,1135 ****
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_2\n"
gdb_expect {
-re "
! .*fcmp,$i,!\\?>= fr4,fr5.*
! .*fcmp,$i,< fr4,fr5.*
! .*fcmp,$i,\\?< fr4,fr5.*
! .*fcmp,$i,!>= fr4,fr5.*
! .*fcmp,$i,!\\?> fr4,fr5.*
! .*fcmp,$i,<= fr4,fr5.*
! .*fcmp,$i,\\?<= fr4,fr5.*
! .*fcmp,$i,!> fr4,fr5.*
.*$gdb_prompt $" { pass "$i tests (part2) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part2) " }
timeout { fail "(timeout) fcmp_$i tests (part2) " }
--- 1259,1272 ----
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_2\n"
gdb_expect {
-re "
! .*fcmp,$i,!\\?>= %fr4,%fr5.*
! .*fcmp,$i,< %fr4,%fr5.*
! .*fcmp,$i,\\?< %fr4,%fr5.*
! .*fcmp,$i,!>= %fr4,%fr5.*
! .*fcmp,$i,!\\?> %fr4,%fr5.*
! .*fcmp,$i,<= %fr4,%fr5.*
! .*fcmp,$i,\\?<= %fr4,%fr5.*
! .*fcmp,$i,!> %fr4,%fr5.*
.*$gdb_prompt $" { pass "$i tests (part2) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part2) " }
timeout { fail "(timeout) fcmp_$i tests (part2) " }
***************
*** 1138,1151 ****
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_3\n"
gdb_expect {
-re "
! .*fcmp,$i,!\\?<= fr4,fr5.*
! .*fcmp,$i,> fr4,fr5.*
! .*fcmp,$i,\\?> fr4,fr5.*
! .*fcmp,$i,!<= fr4,fr5.*
! .*fcmp,$i,!\\?< fr4,fr5.*
! .*fcmp,$i,>= fr4,fr5.*
! .*fcmp,$i,\\?>= fr4,fr5.*
! .*fcmp,$i,!< fr4,fr5.*
.*$gdb_prompt $" { pass "$i tests (part3) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part3) " }
timeout { fail "(timeout) fcmp_$i tests (part3) " }
--- 1275,1288 ----
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_3\n"
gdb_expect {
-re "
! .*fcmp,$i,!\\?<= %fr4,%fr5.*
! .*fcmp,$i,> %fr4,%fr5.*
! .*fcmp,$i,\\?> %fr4,%fr5.*
! .*fcmp,$i,!<= %fr4,%fr5.*
! .*fcmp,$i,!\\?< %fr4,%fr5.*
! .*fcmp,$i,>= %fr4,%fr5.*
! .*fcmp,$i,\\?>= %fr4,%fr5.*
! .*fcmp,$i,!< %fr4,%fr5.*
.*$gdb_prompt $" { pass "$i tests (part3) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part3) " }
timeout { fail "(timeout) fcmp_$i tests (part3) " }
***************
*** 1154,1167 ****
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_4\n"
gdb_expect {
-re "
! .*fcmp,$i,!\\?= fr4,fr5.*
! .*fcmp,$i,<> fr4,fr5.*
! .*fcmp,$i,!= fr4,fr5.*
! .*fcmp,$i,!=t fr4,fr5.*
! .*fcmp,$i,!\\? fr4,fr5.*
! .*fcmp,$i,<=> fr4,fr5.*
! .*fcmp,$i,true\\? fr4,fr5.*
! .*fcmp,$i,true fr4,fr5.*
.*$gdb_prompt $" { pass "$i tests (part4) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part4) " }
timeout { fail "(timeout) fcmp_$i tests (part4) " }
--- 1291,1304 ----
send_gdb "x/8i fcmp_$i"; send_gdb "_tests_4\n"
gdb_expect {
-re "
! .*fcmp,$i,!\\?= %fr4,%fr5.*
! .*fcmp,$i,<> %fr4,%fr5.*
! .*fcmp,$i,!= %fr4,%fr5.*
! .*fcmp,$i,!=t %fr4,%fr5.*
! .*fcmp,$i,!\\? %fr4,%fr5.*
! .*fcmp,$i,<=> %fr4,%fr5.*
! .*fcmp,$i,true\\? %fr4,%fr5.*
! .*fcmp,$i,true %fr4,%fr5.*
.*$gdb_prompt $" { pass "$i tests (part4) " }
-re "$gdb_prompt $" { fail "fcmp_$i tests (part4) " }
timeout { fail "(timeout) fcmp_$i tests (part4) " }
***************
*** 1177,1186 ****
send_gdb "x/4i special_tests\n"
gdb_expect {
-re "
! .*gfw r4\\(sr0,r5\\).*
! .*gfw,m r4\\(sr0,r5\\).*
! .*gfr r4\\(sr0,r5\\).*
! .*gfr,m r4\\(sr0,r5\\).*
.*$gdb_prompt $" { pass "special tests" }
-re "$gdb_prompt $" { fail "special tests" }
timeout { fail "(timeout) special tests " }
--- 1314,1323 ----
send_gdb "x/4i special_tests\n"
gdb_expect {
-re "
! .*gfw %r4\\(%sr0,%r5\\).*
! .*gfw,m %r4\\(%sr0,%r5\\).*
! .*gfr %r4\\(%sr0,%r5\\).*
! .*gfr,m %r4\\(%sr0,%r5\\).*
.*$gdb_prompt $" { pass "special tests" }
-re "$gdb_prompt $" { fail "special tests" }
timeout { fail "(timeout) special tests " }
***************
*** 1196,1218 ****
send_gdb "x/16i sfu_tests\n"
gdb_expect {
-re "
! .*spop0,4,5.*
! .*spop0,4,73.*
! .*spop0,4,5,n.*
! .*spop0,4,73,n.*
! .*spop1,4,5 r5.*
! .*spop1,4,73 r5.*
! .*spop1,4,5,n r5.*
! .*spop1,4,73,n r5.*
! .*spop2,4,5 r5.*
! .*spop2,4,73 r5.*
! .*spop2,4,5,n r5.*
! .*spop2,4,73,n r5.*
! .*spop3,4,5 r5,r6.*
! .*spop3,4,73 r5,r6.*
! .*spop3,4,5,n r5,r6.*
! .*spop3,4,73,n r5,r6.*
! .*$gdb_prompt $" { pass "sfu tests" }
-re "$gdb_prompt $" { fail "sfu tests" }
timeout { fail "(timeout) sfu tests " }
}
--- 1333,1339 ----
send_gdb "x/16i sfu_tests\n"
gdb_expect {
-re "
! .*spop0,4,5.*\r\n.*spop0,4,0x73.*\r\n.*spop0,4,5,n.*\r\n.*spop0,4,0x73,n.*\r\n.*spop1,4,5 %r5.*\r\n.*spop1,4,0x73 %r5.*\r\n.*spop1,4,5,n %r5.*\r\n.*spop1,4,0x73,n %r5.*\r\n.*spop2,4,5 %r5.*\r\n.*spop2,4,0x73 %r5.*\r\n.*spop2,4,5,n %r5.*\r\n.*spop2,4,0x73,n %r5.*\r\n.*spop3,4,5 %r5,%r6.*\r\n.*spop3,4,0x73 %r5,%r6.*\r\n.*spop3,4,5,n %r5,%r6.*\r\n.*spop3,4,0x73,n %r5,%r6.*\r\n$gdb_prompt $" { pass "sfu tests" }
-re "$gdb_prompt $" { fail "sfu tests" }
timeout { fail "(timeout) sfu tests " }
}
***************
*** 1227,1235 ****
gdb_expect {
-re "
.*copr,4,5.*
! .*copr,4,73.*
.*copr,4,5,n.*
! .*copr,4,73,n.*
.*$gdb_prompt $" { pass "copr tests" }
-re "$gdb_prompt $" { fail "copr tests" }
timeout { fail "(timeout) copr tests " }
--- 1348,1356 ----
gdb_expect {
-re "
.*copr,4,5.*
! .*copr,4,0x73.*
.*copr,4,5,n.*
! .*copr,4,0x73,n.*
.*$gdb_prompt $" { pass "copr tests" }
-re "$gdb_prompt $" { fail "copr tests" }
timeout { fail "(timeout) copr tests " }
***************
*** 1244,1257 ****
send_gdb "x/8i copr_indexing_load\n"
gdb_expect {
-re "
! .*cldwx,4 r5\\(sr0,r4\\),r26.*
! .*cldwx,4,s r5\\(sr0,r4\\),r26.*
! .*cldwx,4,m r5\\(sr0,r4\\),r26.*
! .*cldwx,4,sm r5\\(sr0,r4\\),r26.*
! .*clddx,4 r5\\(sr0,r4\\),r26.*
! .*clddx,4,s r5\\(sr0,r4\\),r26.*
! .*clddx,4,m r5\\(sr0,r4\\),r26.*
! .*clddx,4,sm r5\\(sr0,r4\\),r26.*
.*$gdb_prompt $" { pass "copr indexed load tests" }
-re "$gdb_prompt $" { fail "copr indexed load tests" }
timeout { fail "(timeout) copr indexed load tests " }
--- 1365,1378 ----
send_gdb "x/8i copr_indexing_load\n"
gdb_expect {
-re "
! .*cldw,4 %r5\\(%sr0,%r4\\),26.*
! .*cldw,4,s %r5\\(%sr0,%r4\\),26.*
! .*cldw,4,m %r5\\(%sr0,%r4\\),26.*
! .*cldw,4,sm %r5\\(%sr0,%r4\\),26.*
! .*cldd,4 %r5\\(%sr0,%r4\\),26.*
! .*cldd,4,s %r5\\(%sr0,%r4\\),26.*
! .*cldd,4,m %r5\\(%sr0,%r4\\),26.*
! .*cldd,4,sm %r5\\(%sr0,%r4\\),26.*
.*$gdb_prompt $" { pass "copr indexed load tests" }
-re "$gdb_prompt $" { fail "copr indexed load tests" }
timeout { fail "(timeout) copr indexed load tests " }
***************
*** 1260,1273 ****
send_gdb "x/8i copr_indexing_store\n"
gdb_expect {
-re "
! .*cstwx,4 r26,r5\\(sr0,r4\\).*
! .*cstwx,4,s r26,r5\\(sr0,r4\\).*
! .*cstwx,4,m r26,r5\\(sr0,r4\\).*
! .*cstwx,4,sm r26,r5\\(sr0,r4\\).*
! .*cstdx,4 r26,r5\\(sr0,r4\\).*
! .*cstdx,4,s r26,r5\\(sr0,r4\\).*
! .*cstdx,4,m r26,r5\\(sr0,r4\\).*
! .*cstdx,4,sm r26,r5\\(sr0,r4\\).*
.*$gdb_prompt $" { pass "copr indexed store tests" }
-re "$gdb_prompt $" { fail "copr indexed store tests" }
timeout { fail "(timeout) copr indexed load tests " }
--- 1381,1394 ----
send_gdb "x/8i copr_indexing_store\n"
gdb_expect {
-re "
! .*cstw,4 26,%r5\\(%sr0,%r4\\).*
! .*cstw,4,s 26,%r5\\(%sr0,%r4\\).*
! .*cstw,4,m 26,%r5\\(%sr0,%r4\\).*
! .*cstw,4,sm 26,%r5\\(%sr0,%r4\\).*
! .*cstd,4 26,%r5\\(%sr0,%r4\\).*
! .*cstd,4,s 26,%r5\\(%sr0,%r4\\).*
! .*cstd,4,m 26,%r5\\(%sr0,%r4\\).*
! .*cstd,4,sm 26,%r5\\(%sr0,%r4\\).*
.*$gdb_prompt $" { pass "copr indexed store tests" }
-re "$gdb_prompt $" { fail "copr indexed store tests" }
timeout { fail "(timeout) copr indexed load tests " }
***************
*** 1276,1293 ****
send_gdb "x/12i copr_short_memory\n"
gdb_expect {
-re "
! .*cldws,4 0\\(sr0,r4\\),r26.*
! .*cldws,4,mb 0\\(sr0,r4\\),r26.*
! .*cldws,4,ma 0\\(sr0,r4\\),r26.*
! .*cldds,4 0\\(sr0,r4\\),r26.*
! .*cldds,4,mb 0\\(sr0,r4\\),r26.*
! .*cldds,4,ma 0\\(sr0,r4\\),r26.*
! .*cstws,4 r26,0\\(sr0,r4\\).*
! .*cstws,4,mb r26,0\\(sr0,r4\\).*
! .*cstws,4,ma r26,0\\(sr0,r4\\).*
! .*cstds,4 r26,0\\(sr0,r4\\).*
! .*cstds,4,mb r26,0\\(sr0,r4\\).*
! .*cstds,4,ma r26,0\\(sr0,r4\\).*
.*$gdb_prompt $" { pass "copr short memory tests" }
-re "$gdb_prompt $" { fail "copr short memory tests" }
timeout { fail "(timeout) copr short memory tests " }
--- 1397,1414 ----
send_gdb "x/12i copr_short_memory\n"
gdb_expect {
-re "
! .*cldw,4 0\\(%sr0,%r4\\),26.*
! .*cldw,4,mb 0\\(%sr0,%r4\\),26.*
! .*cldw,4 0\\(%sr0,%r4\\),26.*
! .*cldd,4 0\\(%sr0,%r4\\),26.*
! .*cldd,4,mb 0\\(%sr0,%r4\\),26.*
! .*cldd,4 0\\(%sr0,%r4\\),26.*
! .*cstw,4 26,0\\(%sr0,%r4\\).*
! .*cstw,4,mb 26,0\\(%sr0,%r4\\).*
! .*cstw,4 26,0\\(%sr0,%r4\\).*
! .*cstd,4 26,0\\(%sr0,%r4\\).*
! .*cstd,4,mb 26,0\\(%sr0,%r4\\).*
! .*cstd,4 26,0\\(%sr0,%r4\\).*
.*$gdb_prompt $" { pass "copr short memory tests" }
-re "$gdb_prompt $" { fail "copr short memory tests" }
timeout { fail "(timeout) copr short memory tests " }
***************
*** 1302,1319 ****
send_gdb "x/12i fmemLRbug_tests_1\n"
gdb_expect {
-re "
! .*fstws fr6R,0\\(sr0,r26\\).*
! .*fstws fr6,4\\(sr0,r26\\).*
! .*fstws fr6,8\\(sr0,r26\\).*
! .*fstds fr6,0\\(sr0,r26\\).*
! .*fstds fr6,4\\(sr0,r26\\).*
! .*fstds fr6,8\\(sr0,r26\\).*
! .*fldws 0\\(sr0,r26\\),fr6R.*
! .*fldws 4\\(sr0,r26\\),fr6.*
! .*fldws 8\\(sr0,r26\\),fr6.*
! .*fldds 0\\(sr0,r26\\),fr6.*
! .*fldds 4\\(sr0,r26\\),fr6.*
! .*fldds 8\\(sr0,r26\\),fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part1)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part1)" }
timeout { fail "(timeout) fmem LR register selector tests (part1)" }
--- 1423,1440 ----
send_gdb "x/12i fmemLRbug_tests_1\n"
gdb_expect {
-re "
! .*fstw %fr6R,0\\(%sr0,%r26\\).*
! .*fstw %fr6,4\\(%sr0,%r26\\).*
! .*fstw %fr6,8\\(%sr0,%r26\\).*
! .*fstd %fr6,0\\(%sr0,%r26\\).*
! .*fstd %fr6,4\\(%sr0,%r26\\).*
! .*fstd %fr6,8\\(%sr0,%r26\\).*
! .*fldw 0\\(%sr0,%r26\\),%fr6R.*
! .*fldw 4\\(%sr0,%r26\\),%fr6.*
! .*fldw 8\\(%sr0,%r26\\),%fr6.*
! .*fldd 0\\(%sr0,%r26\\),%fr6.*
! .*fldd 4\\(%sr0,%r26\\),%fr6.*
! .*fldd 8\\(%sr0,%r26\\),%fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part1)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part1)" }
timeout { fail "(timeout) fmem LR register selector tests (part1)" }
***************
*** 1322,1339 ****
send_gdb "x/12i fmemLRbug_tests_2\n"
gdb_expect {
-re "
! .*fstws fr6R,0\\(sr0,r26\\).*
! .*fstws fr6,4\\(sr0,r26\\).*
! .*fstws fr6,8\\(sr0,r26\\).*
! .*fstds fr6,0\\(sr0,r26\\).*
! .*fstds fr6,4\\(sr0,r26\\).*
! .*fstds fr6,8\\(sr0,r26\\).*
! .*fldws 0\\(sr0,r26\\),fr6R.*
! .*fldws 4\\(sr0,r26\\),fr6.*
! .*fldws 8\\(sr0,r26\\),fr6.*
! .*fldds 0\\(sr0,r26\\),fr6.*
! .*fldds 4\\(sr0,r26\\),fr6.*
! .*fldds 8\\(sr0,r26\\),fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part2)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part2)" }
timeout { fail "(timeout) fmem LR register selector tests (part2)" }
--- 1443,1460 ----
send_gdb "x/12i fmemLRbug_tests_2\n"
gdb_expect {
-re "
! .*fstw %fr6R,0\\(%sr0,%r26\\).*
! .*fstw %fr6,4\\(%sr0,%r26\\).*
! .*fstw %fr6,8\\(%sr0,%r26\\).*
! .*fstd %fr6,0\\(%sr0,%r26\\).*
! .*fstd %fr6,4\\(%sr0,%r26\\).*
! .*fstd %fr6,8\\(%sr0,%r26\\).*
! .*fldw 0\\(%sr0,%r26\\),%fr6R.*
! .*fldw 4\\(%sr0,%r26\\),%fr6.*
! .*fldw 8\\(%sr0,%r26\\),%fr6.*
! .*fldd 0\\(%sr0,%r26\\),%fr6.*
! .*fldd 4\\(%sr0,%r26\\),%fr6.*
! .*fldd 8\\(%sr0,%r26\\),%fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part2)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part2)" }
timeout { fail "(timeout) fmem LR register selector tests (part2)" }
***************
*** 1342,1359 ****
send_gdb "x/12i fmemLRbug_tests_3\n"
gdb_expect {
-re "
! .*fstwx fr6R,r25\\(sr0,r26\\).*
! .*fstwx fr6,r25\\(sr0,r26\\).*
! .*fstwx fr6,r25\\(sr0,r26\\).*
! .*fstdx fr6,r25\\(sr0,r26\\).*
! .*fstdx fr6,r25\\(sr0,r26\\).*
! .*fstdx fr6,r25\\(sr0,r26\\).*
! .*fldwx r25\\(sr0,r26\\),fr6R.*
! .*fldwx r25\\(sr0,r26\\),fr6.*
! .*fldwx r25\\(sr0,r26\\),fr6.*
! .*flddx r25\\(sr0,r26\\),fr6.*
! .*flddx r25\\(sr0,r26\\),fr6.*
! .*flddx r25\\(sr0,r26\\),fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part3)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part3)" }
timeout { fail "(timeout) fmem LR register selector tests (part3)" }
--- 1463,1480 ----
send_gdb "x/12i fmemLRbug_tests_3\n"
gdb_expect {
-re "
! .*fstw %fr6R,%r25\\(%sr0,%r26\\).*
! .*fstw %fr6,%r25\\(%sr0,%r26\\).*
! .*fstw %fr6,%r25\\(%sr0,%r26\\).*
! .*fstd %fr6,%r25\\(%sr0,%r26\\).*
! .*fstd %fr6,%r25\\(%sr0,%r26\\).*
! .*fstd %fr6,%r25\\(%sr0,%r26\\).*
! .*fldw %r25\\(%sr0,%r26\\),%fr6R.*
! .*fldw %r25\\(%sr0,%r26\\),%fr6.*
! .*fldw %r25\\(%sr0,%r26\\),%fr6.*
! .*fldd %r25\\(%sr0,%r26\\),%fr6.*
! .*fldd %r25\\(%sr0,%r26\\),%fr6.*
! .*fldd %r25\\(%sr0,%r26\\),%fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part3)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part3)" }
timeout { fail "(timeout) fmem LR register selector tests (part3)" }
***************
*** 1362,1379 ****
send_gdb "x/12i fmemLRbug_tests_4\n"
gdb_expect {
-re "
! .*fstwx fr6R,r25\\(sr0,r26\\).*
! .*fstwx fr6,r25\\(sr0,r26\\).*
! .*fstwx fr6,r25\\(sr0,r26\\).*
! .*fstdx fr6,r25\\(sr0,r26\\).*
! .*fstdx fr6,r25\\(sr0,r26\\).*
! .*fstdx fr6,r25\\(sr0,r26\\).*
! .*fldwx r25\\(sr0,r26\\),fr6R.*
! .*fldwx r25\\(sr0,r26\\),fr6.*
! .*fldwx r25\\(sr0,r26\\),fr6.*
! .*flddx r25\\(sr0,r26\\),fr6.*
! .*flddx r25\\(sr0,r26\\),fr6.*
! .*flddx r25\\(sr0,r26\\),fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part4)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part4)" }
timeout { fail "(timeout) fmem LR register selector tests (part4)" }
--- 1483,1500 ----
send_gdb "x/12i fmemLRbug_tests_4\n"
gdb_expect {
-re "
! .*fstw %fr6R,%r25\\(%sr0,%r26\\).*
! .*fstw %fr6,%r25\\(%sr0,%r26\\).*
! .*fstw %fr6,%r25\\(%sr0,%r26\\).*
! .*fstd %fr6,%r25\\(%sr0,%r26\\).*
! .*fstd %fr6,%r25\\(%sr0,%r26\\).*
! .*fstd %fr6,%r25\\(%sr0,%r26\\).*
! .*fldw %r25\\(%sr0,%r26\\),%fr6R.*
! .*fldw %r25\\(%sr0,%r26\\),%fr6.*
! .*fldw %r25\\(%sr0,%r26\\),%fr6.*
! .*fldd %r25\\(%sr0,%r26\\),%fr6.*
! .*fldd %r25\\(%sr0,%r26\\),%fr6.*
! .*fldd %r25\\(%sr0,%r26\\),%fr6.*
.*$gdb_prompt $" { pass "fmem LR register selector tests (part4)" }
-re "$gdb_prompt $" { fail "fmem LR register selector tests (part4)" }
timeout { fail "(timeout) fmem LR register selector tests (part4)" }
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/hppa.s gdb/testsuite/gdb.disasm/hppa.s
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/hppa.s Sun Aug 4 09:21:21 1996
--- gdb/testsuite/gdb.disasm/hppa.s Thu Jul 22 17:49:44 1999
***************
*** 1,3 ****
--- 1,4 ----
+ .level 1.1
.SPACE $PRIVATE$
.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31
.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
***************
*** 185,217 ****
integer_load_short_memory
ldws 0(0,%r4),%r26
ldws,mb 0(0,%r4),%r26
! ldws,ma 0(0,%r4),%r26
ldhs 0(0,%r4),%r26
ldhs,mb 0(0,%r4),%r26
! ldhs,ma 0(0,%r4),%r26
ldbs 0(0,%r4),%r26
ldbs,mb 0(0,%r4),%r26
! ldbs,ma 0(0,%r4),%r26
ldwas 0(%r4),%r26
ldwas,mb 0(%r4),%r26
! ldwas,ma 0(%r4),%r26
ldcws 0(0,%r4),%r26
ldcws,mb 0(0,%r4),%r26
! ldcws,ma 0(0,%r4),%r26
integer_store_short_memory
stws %r26,0(0,%r4)
stws,mb %r26,0(0,%r4)
! stws,ma %r26,0(0,%r4)
sths %r26,0(0,%r4)
sths,mb %r26,0(0,%r4)
! sths,ma %r26,0(0,%r4)
stbs %r26,0(0,%r4)
stbs,mb %r26,0(0,%r4)
! stbs,ma %r26,0(0,%r4)
stwas %r26,0(%r4)
stwas,mb %r26,0(%r4)
! stwas,ma %r26,0(%r4)
stbys %r26,0(0,%r4)
stbys,b %r26,0(0,%r4)
stbys,e %r26,0(0,%r4)
--- 186,218 ----
integer_load_short_memory
ldws 0(0,%r4),%r26
ldws,mb 0(0,%r4),%r26
! ldws 0(0,%r4),%r26
ldhs 0(0,%r4),%r26
ldhs,mb 0(0,%r4),%r26
! ldhs 0(0,%r4),%r26
ldbs 0(0,%r4),%r26
ldbs,mb 0(0,%r4),%r26
! ldbs 0(0,%r4),%r26
ldwas 0(%r4),%r26
ldwas,mb 0(%r4),%r26
! ldwas 0(%r4),%r26
ldcws 0(0,%r4),%r26
ldcws,mb 0(0,%r4),%r26
! ldcws 0(0,%r4),%r26
integer_store_short_memory
stws %r26,0(0,%r4)
stws,mb %r26,0(0,%r4)
! stws %r26,0(0,%r4)
sths %r26,0(0,%r4)
sths,mb %r26,0(0,%r4)
! sths %r26,0(0,%r4)
stbs %r26,0(0,%r4)
stbs,mb %r26,0(0,%r4)
! stbs %r26,0(0,%r4)
stwas %r26,0(%r4)
stwas,mb %r26,0(%r4)
! stwas %r26,0(%r4)
stbys %r26,0(0,%r4)
stbys,b %r26,0(0,%r4)
stbys,e %r26,0(0,%r4)
***************
*** 909,923 ****
uxor %r4,%r5,%r6
uxor,sbz %r4,%r5,%r6
uxor,shz %r4,%r5,%r6
- uxor,sdc %r4,%r5,%r6
- uxor,sbc %r4,%r5,%r6
- uxor,shc %r4,%r5,%r6
uxor,tr %r4,%r5,%r6
uxor,nbz %r4,%r5,%r6
uxor,nhz %r4,%r5,%r6
- uxor,ndc %r4,%r5,%r6
- uxor,nbc %r4,%r5,%r6
- uxor,nhc %r4,%r5,%r6
uaddcm_tests
uaddcm %r4,%r5,%r6
--- 910,918 ----
***************
*** 1122,1165 ****
shd,ev %r4,%r5,5,%r6
extru_tests
! extru %r4,5,10,%r6
! extru,= %r4,5,10,%r6
! extru,< %r4,5,10,%r6
! extru,od %r4,5,10,%r6
! extru,tr %r4,5,10,%r6
! extru,<> %r4,5,10,%r6
! extru,>= %r4,5,10,%r6
! extru,ev %r4,5,10,%r6
extrs_tests
! extrs %r4,5,10,%r6
! extrs,= %r4,5,10,%r6
! extrs,< %r4,5,10,%r6
! extrs,od %r4,5,10,%r6
! extrs,tr %r4,5,10,%r6
! extrs,<> %r4,5,10,%r6
! extrs,>= %r4,5,10,%r6
! extrs,ev %r4,5,10,%r6
zdep_tests
! zdep %r4,5,10,%r6
! zdep,= %r4,5,10,%r6
! zdep,< %r4,5,10,%r6
! zdep,od %r4,5,10,%r6
! zdep,tr %r4,5,10,%r6
! zdep,<> %r4,5,10,%r6
! zdep,>= %r4,5,10,%r6
! zdep,ev %r4,5,10,%r6
dep_tests
! dep %r4,5,10,%r6
! dep,= %r4,5,10,%r6
! dep,< %r4,5,10,%r6
! dep,od %r4,5,10,%r6
! dep,tr %r4,5,10,%r6
! dep,<> %r4,5,10,%r6
! dep,>= %r4,5,10,%r6
! dep,ev %r4,5,10,%r6
vextru_tests
vextru %r4,5,%r6
--- 1117,1160 ----
shd,ev %r4,%r5,5,%r6
extru_tests
! extru %r4,1,2,%r6
! extru,= %r4,1,2,%r6
! extru,< %r4,1,2,%r6
! extru,od %r4,1,2,%r6
! extru,tr %r4,1,2,%r6
! extru,<> %r4,1,2,%r6
! extru,>= %r4,1,2,%r6
! extru,ev %r4,1,2,%r6
extrs_tests
! extrs %r4,1,2,%r6
! extrs,= %r4,1,2,%r6
! extrs,< %r4,1,2,%r6
! extrs,od %r4,1,2,%r6
! extrs,tr %r4,1,2,%r6
! extrs,<> %r4,1,2,%r6
! extrs,>= %r4,1,2,%r6
! extrs,ev %r4,1,2,%r6
zdep_tests
! zdep %r4,1,2,%r6
! zdep,= %r4,1,2,%r6
! zdep,< %r4,1,2,%r6
! zdep,od %r4,1,2,%r6
! zdep,tr %r4,1,2,%r6
! zdep,<> %r4,1,2,%r6
! zdep,>= %r4,1,2,%r6
! zdep,ev %r4,1,2,%r6
dep_tests
! dep %r4,1,2,%r6
! dep,= %r4,1,2,%r6
! dep,< %r4,1,2,%r6
! dep,od %r4,1,2,%r6
! dep,tr %r4,1,2,%r6
! dep,<> %r4,1,2,%r6
! dep,>= %r4,1,2,%r6
! dep,ev %r4,1,2,%r6
vextru_tests
vextru %r4,5,%r6
***************
*** 1223,1246 ****
zvdepi,ev -1,5,%r6
depi_tests
! depi -1,4,10,%r6
! depi,= -1,4,10,%r6
! depi,< -1,4,10,%r6
! depi,od -1,4,10,%r6
! depi,tr -1,4,10,%r6
! depi,<> -1,4,10,%r6
! depi,>= -1,4,10,%r6
! depi,ev -1,4,10,%r6
zdepi_tests
! zdepi -1,4,10,%r6
! zdepi,= -1,4,10,%r6
! zdepi,< -1,4,10,%r6
! zdepi,od -1,4,10,%r6
! zdepi,tr -1,4,10,%r6
! zdepi,<> -1,4,10,%r6
! zdepi,>= -1,4,10,%r6
! zdepi,ev -1,4,10,%r6
system_control_tests
--- 1218,1241 ----
zvdepi,ev -1,5,%r6
depi_tests
! depi -1,4,5,%r6
! depi,= -1,4,5,%r6
! depi,< -1,4,5,%r6
! depi,od -1,4,5,%r6
! depi,tr -1,4,5,%r6
! depi,<> -1,4,5,%r6
! depi,>= -1,4,5,%r6
! depi,ev -1,4,5,%r6
zdepi_tests
! zdepi -1,4,5,%r6
! zdepi,= -1,4,5,%r6
! zdepi,< -1,4,5,%r6
! zdepi,od -1,4,5,%r6
! zdepi,tr -1,4,5,%r6
! zdepi,<> -1,4,5,%r6
! zdepi,>= -1,4,5,%r6
! zdepi,ev -1,4,5,%r6
system_control_tests
***************
*** 1268,1275 ****
lpa_tests
lpa %r4(%sr0,%r5),%r6
lpa,m %r4(%sr0,%r5),%r6
! lha %r4(%sr0,%r5),%r6
! lha,m %r4(%sr0,%r5),%r6
lci %r4(%sr0,%r5),%r6
purge_tests
--- 1263,1270 ----
lpa_tests
lpa %r4(%sr0,%r5),%r6
lpa,m %r4(%sr0,%r5),%r6
! ; lha %r4(%sr0,%r5),%r6
! ; lha,m %r4(%sr0,%r5),%r6
lci %r4(%sr0,%r5),%r6
purge_tests
***************
*** 1302,1307 ****
--- 1297,1303 ----
ftest
fpu_memory_indexing_tests
+ .allow quadstore
fldwx %r4(%sr0,%r5),%fr6
fldwx,s %r4(%sr0,%r5),%fr6
fldwx,m %r4(%sr0,%r5),%fr6
***************
*** 1326,1344 ****
fpu_short_memory_tests
fldws 0(%sr0,%r5),%fr6
fldws,mb 0(%sr0,%r5),%fr6
! fldws,ma 0(%sr0,%r5),%fr6
fldds 0(%sr0,%r5),%fr6
fldds,mb 0(%sr0,%r5),%fr6
! fldds,ma 0(%sr0,%r5),%fr6
fstws %fr6,0(%sr0,%r5)
fstws,mb %fr6,0(%sr0,%r5)
! fstws,ma %fr6,0(%sr0,%r5)
fstds %fr6,0(%sr0,%r5)
fstds,mb %fr6,0(%sr0,%r5)
! fstds,ma %fr6,0(%sr0,%r5)
fstqs %fr6,0(%sr0,%r5)
fstqs,mb %fr6,0(%sr0,%r5)
! fstqs,ma %fr6,0(%sr0,%r5)
fcpy_tests
--- 1322,1340 ----
fpu_short_memory_tests
fldws 0(%sr0,%r5),%fr6
fldws,mb 0(%sr0,%r5),%fr6
! fldws 0(%sr0,%r5),%fr6
fldds 0(%sr0,%r5),%fr6
fldds,mb 0(%sr0,%r5),%fr6
! fldds 0(%sr0,%r5),%fr6
fstws %fr6,0(%sr0,%r5)
fstws,mb %fr6,0(%sr0,%r5)
! fstws %fr6,0(%sr0,%r5)
fstds %fr6,0(%sr0,%r5)
fstds,mb %fr6,0(%sr0,%r5)
! fstds %fr6,0(%sr0,%r5)
fstqs %fr6,0(%sr0,%r5)
fstqs,mb %fr6,0(%sr0,%r5)
! fstqs %fr6,0(%sr0,%r5)
fcpy_tests
***************
*** 1610,1615 ****
--- 1606,1612 ----
xmpyu %fr4,%fr5,%fr6
special_tests
+ .allow gflush
gfw %r4(%sr0,%r5)
gfw,m %r4(%sr0,%r5)
gfr %r4(%sr0,%r5)
***************
*** 1620,1637 ****
spop0,4,115
spop0,4,5,n
spop0,4,115,n
! spop1,4,5 5
! spop1,4,115 5
! spop1,4,5,n 5
! spop1,4,115,n 5
! spop2,4,5 5
! spop2,4,115 5
! spop2,4,5,n 5
! spop2,4,115,n 5
! spop3,4,5 5,6
! spop3,4,115 5,6
! spop3,4,5,n 5,6
! spop3,4,115,n 5,6
copr_tests
copr,4,5
--- 1617,1634 ----
spop0,4,115
spop0,4,5,n
spop0,4,115,n
! spop1,4,5 %r5
! spop1,4,115 %r5
! spop1,4,5,n %r5
! spop1,4,115,n %r5
! spop2,4,5 %r5
! spop2,4,115 %r5
! spop2,4,5,n %r5
! spop2,4,115,n %r5
! spop3,4,5 %r5,%r6
! spop3,4,115 %r5,%r6
! spop3,4,5,n %r5,%r6
! spop3,4,115,n %r5,%r6
copr_tests
copr,4,5
***************
*** 1640,1732 ****
copr,4,115,n
copr_indexing_load
! cldwx,4 5(0,4),26
! cldwx,4,s 5(0,4),26
! cldwx,4,m 5(0,4),26
! cldwx,4,sm 5(0,4),26
! clddx,4 5(0,4),26
! clddx,4,s 5(0,4),26
! clddx,4,m 5(0,4),26
! clddx,4,sm 5(0,4),26
copr_indexing_store
! cstwx,4 26,5(0,4)
! cstwx,4,s 26,5(0,4)
! cstwx,4,m 26,5(0,4)
! cstwx,4,sm 26,5(0,4)
! cstdx,4 26,5(0,4)
! cstdx,4,s 26,5(0,4)
! cstdx,4,m 26,5(0,4)
! cstdx,4,sm 26,5(0,4)
copr_short_memory
! cldws,4 0(0,4),26
! cldws,4,mb 0(0,4),26
! cldws,4,ma 0(0,4),26
! cldds,4 0(0,4),26
! cldds,4,mb 0(0,4),26
! cldds,4,ma 0(0,4),26
! cstws,4 26,0(0,4)
! cstws,4,mb 26,0(0,4)
! cstws,4,ma 26,0(0,4)
! cstds,4 26,0(0,4)
! cstds,4,mb 26,0(0,4)
! cstds,4,ma 26,0(0,4)
fmemLRbug_tests_1
fstws %fr6R,0(%r26)
fstws %fr6L,4(%r26)
fstws %fr6,8(%r26)
! fstds %fr6R,0(%r26)
! fstds %fr6L,4(%r26)
fstds %fr6,8(%r26)
fldws 0(%r26),%fr6R
fldws 4(%r26),%fr6L
fldws 8(%r26),%fr6
! fldds 0(%r26),%fr6R
! fldds 4(%r26),%fr6L
fldds 8(%r26),%fr6
fmemLRbug_tests_2
fstws %fr6R,0(%sr0,%r26)
fstws %fr6L,4(%sr0,%r26)
fstws %fr6,8(%sr0,%r26)
! fstds %fr6R,0(%sr0,%r26)
! fstds %fr6L,4(%sr0,%r26)
fstds %fr6,8(%sr0,%r26)
fldws 0(%sr0,%r26),%fr6R
fldws 4(%sr0,%r26),%fr6L
fldws 8(%sr0,%r26),%fr6
! fldds 0(%sr0,%r26),%fr6R
! fldds 4(%sr0,%r26),%fr6L
fldds 8(%sr0,%r26),%fr6
fmemLRbug_tests_3
fstwx %fr6R,%r25(%r26)
fstwx %fr6L,%r25(%r26)
fstwx %fr6,%r25(%r26)
! fstdx %fr6R,%r25(%r26)
! fstdx %fr6L,%r25(%r26)
fstdx %fr6,%r25(%r26)
fldwx %r25(%r26),%fr6R
fldwx %r25(%r26),%fr6L
fldwx %r25(%r26),%fr6
! flddx %r25(%r26),%fr6R
! flddx %r25(%r26),%fr6L
flddx %r25(%r26),%fr6
fmemLRbug_tests_4
fstwx %fr6R,%r25(%sr0,%r26)
fstwx %fr6L,%r25(%sr0,%r26)
fstwx %fr6,%r25(%sr0,%r26)
! fstdx %fr6R,%r25(%sr0,%r26)
! fstdx %fr6L,%r25(%sr0,%r26)
fstdx %fr6,%r25(%sr0,%r26)
fldwx %r25(%sr0,%r26),%fr6R
fldwx %r25(%sr0,%r26),%fr6L
fldwx %r25(%sr0,%r26),%fr6
! flddx %r25(%sr0,%r26),%fr6R
! flddx %r25(%sr0,%r26),%fr6L
flddx %r25(%sr0,%r26),%fr6
ldw 0(0,%r4),%r26
--- 1637,1729 ----
copr,4,115,n
copr_indexing_load
! cldwx,4 %r5(0,%r4),26
! cldwx,4,s %r5(0,%r4),26
! cldwx,4,m %r5(0,%r4),26
! cldwx,4,sm %r5(0,%r4),26
! clddx,4 %r5(0,%r4),26
! clddx,4,s %r5(0,%r4),26
! clddx,4,m %r5(0,%r4),26
! clddx,4,sm %r5(0,%r4),26
copr_indexing_store
! cstwx,4 26,%r5(0,%r4)
! cstwx,4,s 26,%r5(0,%r4)
! cstwx,4,m 26,%r5(0,%r4)
! cstwx,4,sm 26,%r5(0,%r4)
! cstdx,4 26,%r5(0,%r4)
! cstdx,4,s 26,%r5(0,%r4)
! cstdx,4,m 26,%r5(0,%r4)
! cstdx,4,sm 26,%r5(0,%r4)
copr_short_memory
! cldws,4 0(0,%r4),26
! cldws,4,mb 0(0,%r4),26
! cldws,4 0(0,%r4),26
! cldds,4 0(0,%r4),26
! cldds,4,mb 0(0,%r4),26
! cldds,4 0(0,%r4),26
! cstws,4 26,0(0,%r4)
! cstws,4,mb 26,0(0,%r4)
! cstws,4 26,0(0,%r4)
! cstds,4 26,0(0,%r4)
! cstds,4,mb 26,0(0,%r4)
! cstds,4 26,0(0,%r4)
fmemLRbug_tests_1
fstws %fr6R,0(%r26)
fstws %fr6L,4(%r26)
fstws %fr6,8(%r26)
! fstds %fr6,0(%r26)
! fstds %fr6,4(%r26)
fstds %fr6,8(%r26)
fldws 0(%r26),%fr6R
fldws 4(%r26),%fr6L
fldws 8(%r26),%fr6
! fldds 0(%r26),%fr6
! fldds 4(%r26),%fr6
fldds 8(%r26),%fr6
fmemLRbug_tests_2
fstws %fr6R,0(%sr0,%r26)
fstws %fr6L,4(%sr0,%r26)
fstws %fr6,8(%sr0,%r26)
! fstds %fr6,0(%sr0,%r26)
! fstds %fr6,4(%sr0,%r26)
fstds %fr6,8(%sr0,%r26)
fldws 0(%sr0,%r26),%fr6R
fldws 4(%sr0,%r26),%fr6L
fldws 8(%sr0,%r26),%fr6
! fldds 0(%sr0,%r26),%fr6
! fldds 4(%sr0,%r26),%fr6
fldds 8(%sr0,%r26),%fr6
fmemLRbug_tests_3
fstwx %fr6R,%r25(%r26)
fstwx %fr6L,%r25(%r26)
fstwx %fr6,%r25(%r26)
! fstdx %fr6,%r25(%r26)
! fstdx %fr6,%r25(%r26)
fstdx %fr6,%r25(%r26)
fldwx %r25(%r26),%fr6R
fldwx %r25(%r26),%fr6L
fldwx %r25(%r26),%fr6
! flddx %r25(%r26),%fr6
! flddx %r25(%r26),%fr6
flddx %r25(%r26),%fr6
fmemLRbug_tests_4
fstwx %fr6R,%r25(%sr0,%r26)
fstwx %fr6L,%r25(%sr0,%r26)
fstwx %fr6,%r25(%sr0,%r26)
! fstdx %fr6,%r25(%sr0,%r26)
! fstdx %fr6,%r25(%sr0,%r26)
fstdx %fr6,%r25(%sr0,%r26)
fldwx %r25(%sr0,%r26),%fr6R
fldwx %r25(%sr0,%r26),%fr6L
fldwx %r25(%sr0,%r26),%fr6
! flddx %r25(%sr0,%r26),%fr6
! flddx %r25(%sr0,%r26),%fr6
flddx %r25(%sr0,%r26),%fr6
ldw 0(0,%r4),%r26
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa-sed.cmd gdb/testsuite/gdb.disasm/pa-sed.cmd
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa-sed.cmd Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa-sed.cmd Thu Jul 22 17:49:51 1999
***************
*** 0 ****
--- 1 ----
+ s/0x[0123456789abcdef]* </</g
\ No newline at end of file
Binary files ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11 and gdb/testsuite/gdb.disasm/pa11 differ
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11-instr.s gdb/testsuite/gdb.disasm/pa11-instr.s
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11-instr.s Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa11-instr.s Thu Jul 22 17:49:46 1999
***************
*** 0 ****
--- 1,874 ----
+ ; assemble as "as -o pa1.exe pa11-instr.s"
+ ;
+ ; PA-RISC assembly-language test program for the debugger.
+ ;
+ ; This test is *not* intended to be executed. Rather, this test serves
+ ; as a comprehensive test for the debugger's PA disassembler.
+ ;
+
+ ; We'd like PA2.0 opcodes to be tested as well as PA1.x, but our PA2.0
+ ; testing strategy is murky at the moment. For now, we'll only test
+ ; PA1.x. (We'll assume we're not running tests on any PA1.0 machines
+ ; any more, so it's safe to specify PA1.1.)
+ .level 1.1
+
+ .code
+ .export main,ENTRY
+ .export mainend,ENTRY
+ .space $TEXT$
+ .subspa $CODE$
+
+ main
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+ labela
+ ADD %r1,%r1,%r2
+ ADD,C %r0,%r1,%r2
+ ADD,DC %r0,%r1,%r2
+ ADD,L %r1,%r2,%r3
+ ADD,TSV %r3,%r4,%r5
+ ADD,C,TSV %r3,%r4,%r5
+ ADD,DC,TSV %r3,%r4,%r5
+
+ ADDB,= %r25,%r26,labelb
+ ADDB,=,N %r25,%r26,labelb
+ ADDB,SV %r27,%r28,labela
+ ADDB,OD %r27,%r28,labela
+ ADDB,TR %r27,%r28,labela
+ ADDB,NSV %r27,%r28,labela
+ ADDB,EV %r27,%r28,labela
+ ADDB,<> %r27,%r28,labela
+
+ ADDBF,NUV %r1,%r5,labela
+ ADDBF,<=,N %r10,%r6,labelb
+
+ ADDBT,NUV %r1,%r5,labela
+ ADDBT,<=,N %r10,%r6,labelb
+
+ ADDC %r28,%r29,%r30
+ ADDC,UV %r28,%r29,%r30
+
+ ADDCO %r28,%r29,%r30
+ ADDCO,UV %r28,%r29,%r30
+
+ ADDI 0,%r2,%r0
+ ADDI,> 1,%r3,%r0
+ ADDI,< 2,%r4,%r0
+
+ ADDIB,>= -1,%r5,labela
+ ADDIB,<=,N 10,%r6,labelb
+
+ ADDIBF,NUV -1,%r5,labela
+ ADDIBF,<=,N 10,%r6,labelb
+
+ ADDIBT,NUV -1,%r5,labela
+ ADDIBT,<=,N 10,%r6,labelb
+
+ ADDIL -1,%r3
+ ADDIL 70000,%r3
+
+ ADDIO 4,%r22,%r21
+ ADDIO,< 4,%r22,%r21
+
+ ADDIT 4,%r22,%r21
+ ADDIT,TR 4,%r22,%r21
+
+ ADDITO 934,%r25,%r24
+ ADDITO,<> 1023,%r25,%r24
+
+ ADDO %r28,%r29,%r30
+ ADDO,SV %r28,%r29,%r30
+
+ ADDL %r28,%r29,%r30
+ ADDL,NSV %r28,%r29,%r30
+
+ AND %r30,%r31,%r30
+ AND,< %r30,%r31,%r30
+
+ ANDCM %r26,%r27,%r28
+ ANDCM,> %r26,%r27,%r28
+
+ labelb
+ B labelc
+ B,N labelc
+ B,GATE labelc
+ B,L labelb,%r3
+
+ BB,< %r9,%cr11,labelc
+ BB,>=,N %r9,31,labelc
+
+ BE 100(%sr4,%r11)
+ BE,L 0(%sr4,%r11),%sr0,%r31
+
+ BL labelb,%r3
+ BL,N labelb,%r3
+
+ BLE 12345(%sr0,%r3)
+ BLE,N 12345(%sr0,%r3)
+
+ BLR %r31,%r3
+ BLR,N %r0,%r3
+
+ BREAK 0,1
+ BREAK 31,1000
+
+ BV 0(%r1)
+ BV,N (%r20)
+
+ BVB,< %r3,labela
+ BVB,<,N %r3,labela
+
+ BVE (%r5)
+ BVE,POP (%r5)
+ ; PA2.0 opcodes:
+ ; BVE,L (%r5),%r2
+ ; BVE,L,PUSH (%r5),%r2
+
+ labelc
+ CLDDS,0 0(%sr2,%r0),0
+ CLDDS,1,MA 1(%sr2,%r1),2
+ CLDDS,2,MB 9(%sr2,%r6),3
+
+ CLDDX,0 %r3(%sr2,%r10),0
+ CLDDX,0,S %r3(%sr2,%r20),1
+ CLDDX,1,M %r3(%sr2,%r30),2
+ CLDDX,2,SM %r3(%sr2,%r0),3
+
+ CLDWS,0 0(%sr2,%r0),0
+ CLDWS,1,MA 3(%sr2,%r0),2
+ CLDWS,2,MB 7(%sr2,%r0),3
+
+ CLDWX,0 %r3(%sr2,%r0),0
+ CLDWX,0,S %r3(%sr2,%r0),1
+ CLDWX,1,M %r3(%sr2,%r0),2
+ CLDWX,2,SM %r3(%sr2,%r0),3
+
+ CMPB,< %r11,%r12,labelc
+ CMPB,>=,N %r11,%r12,main
+
+ CMPCLR,<> %r2,%r3,%r4
+
+ CMPIB,<= 0,%r2,labeld
+ CMPIB,NSV,N -16,%r2,labeld
+
+ CMPICLR,OD 1000,%r0,%r31
+
+ COMBF,<= %r0,%r2,labeld
+ COMBF,<<,N %r16,%r2,labeld
+
+ COMBT,<= %r0,%r2,labeld
+ COMBT,<<,N %r16,%r2,labeld
+
+ COMCLR %r11,%r12,%r13
+ COMCLR,>= %r11,%r12,%r13
+
+ COMIBF,<= 0,%r2,labeld
+ COMIBF,<<=,N -16,%r2,labeld
+
+ COMIBT,<= 0,%r2,labeld
+ COMIBT,<,N -16,%r2,labeld
+
+ COMICLR 1,%r3,%r4
+ COMICLR,EV 157,%r3,%r4
+
+ COPR,0,0
+ COPR,7,0
+ COPR,7,255
+
+ COPY %r3,%r4
+
+ CSTDS,0 8,0(%sr1,%r31)
+ CSTDS,7,MA 11,2(%sr1,%r3)
+ CSTDS,4,MB 14,2(%sr1,%r3)
+
+ CSTWS,0 8,0(%sr1,%r31)
+ CSTWS,7,MA 11,2(%sr1,%r3)
+ CSTWS,4,MB 14,2(%sr1,%r3)
+
+ labeld
+ DCOR %r3,%r4
+ DCOR,I %r3,%r4
+ DCOR,SBZ %r4,%r5
+ DCOR,SHZ %r4,%r6
+ DCOR,SDC %r4,%r7
+ DCOR,SBC %r4,%r8
+ DCOR,SHC %r4,%r9
+ DCOR,NBZ %r4,%r10
+ DCOR,NHZ %r4,%r11
+ DCOR,NDC %r4,%r12
+ DCOR,NBC %r4,%r13
+ DCOR,NHC %r4,%r14
+
+ DEP %r21,14,3,%r22
+ DEP,>= %r21,14,3,%r22
+
+ DEPI 1,14,3,%r22
+ DEPI,>= 2,14,3,%r22
+
+ DEPW %r19,1,2,%r1
+ DEPW,Z %r19,1,2,%r1
+ DEPW,Z %r19,%cr11,31,%r1
+ DEPW,Z,< %r19,30,1,%r1
+
+ DEPWI 15,0,1,%r2
+ DEPWI,Z -16,0,1,%r2
+
+ DIAG 123456
+
+ DS %r1,%r2,%r3
+ DS,<> %r1,%r2,%r3
+
+ labele
+ EXTRS %r1,3,4,%r2
+ EXTRS,OD %r1,3,4,%r2
+
+ EXTRU %r1,3,4,%r2
+ EXTRU,EV %r1,3,4,%r2
+
+ EXTRW %r0,3,4,%r1
+ EXTRW,S %r0,3,4,%r1
+ EXTRW,U %r0,3,4,%r1
+ EXTRW,U,EV %r0,3,4,%r1
+ EXTRW,<> %r0,%cr11,4,%r1
+
+ labelf
+ FABS,SGL %fr2,%fr3
+ FABS,DBL %fr2,%fr6
+
+ FADD,SGL %fr2,%fr4,%fr6
+ FADD,DBL %fr2,%fr4,%fr6
+
+ FCMP,SGL %fr3,%fr2
+ FCMP,DBL,false %fr3,%fr2
+ FCMP,DBL,? %fr3,%fr2
+ FCMP,DBL,!<=> %fr3,%fr2
+ FCMP,DBL,= %fr3,%fr2
+ FCMP,DBL,=T %fr3,%fr2
+ FCMP,DBL,?= %fr3,%fr2
+ FCMP,DBL,!<> %fr3,%fr2
+ FCMP,DBL,!?>= %fr3,%fr2
+ FCMP,DBL,< %fr3,%fr2
+ FCMP,DBL,?< %fr3,%fr2
+ FCMP,DBL,!>= %fr3,%fr2
+ FCMP,DBL,!?> %fr3,%fr2
+ FCMP,DBL,<= %fr3,%fr2
+ FCMP,DBL,?<= %fr3,%fr2
+ FCMP,DBL,!> %fr3,%fr2
+ FCMP,DBL,!?<= %fr3,%fr2
+ FCMP,DBL,> %fr3,%fr2
+ FCMP,DBL,?> %fr3,%fr2
+ FCMP,DBL,!<= %fr3,%fr2
+ FCMP,DBL,!?< %fr3,%fr2
+ FCMP,DBL,>= %fr3,%fr2
+ FCMP,DBL,?>= %fr3,%fr2
+ FCMP,DBL,!< %fr3,%fr2
+ FCMP,DBL,!?= %fr3,%fr2
+ FCMP,DBL,<> %fr3,%fr2
+ FCMP,DBL,!= %fr3,%fr2
+ FCMP,DBL,!=T %fr3,%fr2
+ FCMP,DBL,!? %fr3,%fr2
+ FCMP,DBL,<=> %fr3,%fr2
+ FCMP,DBL,true? %fr3,%fr2
+ FCMP,DBL,true %fr3,%fr2
+
+ FCNV,SGL,DBL %fr2,%fr4
+ FCNV,SGL,W %fr2,%fr4
+ FCNV,SGL,DW %fr2,%fr4
+ FCNV,SGL,QUAD %fr2,%fr4
+ FCNV,SGL,QW %fr2,%fr4
+ FCNV,W,SGL %fr2,%fr4
+ FCNV,W,DBL %fr2,%fr4
+ FCNV,W,QUAD %fr2,%fr4
+ FCNV,DBL,SGL %fr2,%fr4
+ FCNV,DBL,W %fr2,%fr4
+ FCNV,DBL,QUAD %fr2,%fr4
+ FCNV,DBL,QW %fr2,%fr4
+ FCNV,QUAD,SGL %fr2,%fr6
+ FCNV,QUAD,DBL %fr2,%fr6
+ FCNV,QUAD,W %fr2,%fr6
+ FCNV,QUAD,QW %fr2,%fr6
+ FCNV,QW,SGL %fr2,%fr4
+ FCNV,QW,DBL %fr2,%fr4
+ FCNV,QW,QUAD %fr2,%fr4
+
+ FCNVFXT,DBL %fr3,%fr4
+
+ FCPY,SGL %fr5,%fr6
+ FCPY,DBL %fr5,%fr6
+
+ FDC %r3(0,%r3)
+ FDC,M 0(0,%r4)
+
+ FDCE,M %r0(%sr3,%r7)
+
+ FDIV,DBL %fr1,%fr0,%fr2
+
+ FIC %r4(0,%r5)
+ FIC,M %r4(%sr2,%r5)
+
+ FICE,M %r0(%sr1,%r8)
+
+ FID
+
+ FLDD 0(0,%r1),%fr1
+ FLDD,MA 10(0,%r1),%fr1
+ FLDD,MB 0(0,%r1),%fr1
+ FLDD,O 0(0,%r1),%fr1
+ FLDD,MA,SL 4(0,%r1),%fr1
+
+ FLDDS 0(0,%r1),%fr1
+ FLDDS,MA 10(0,%r1),%fr1
+ FLDDS,MB 0(0,%r1),%fr1
+
+ FLDDX 0(0,%r1),%fr1
+ FLDDX,S %r10(0,%r1),%fr1
+ FLDDX,M 0(0,%r1),%fr1
+ FLDDX,SM 0(0,%r1),%fr1
+
+ FLDW %r1(0,%r1),%fr1
+ FLDW,MA 10(0,%r1),%fr1
+ FLDW,MB 0(0,%r1),%fr1
+ FLDW,O 0(0,%r1),%fr1
+ FLDW,MA,SL 4(0,%r1),%fr1
+
+ FLDWS %r1(0,%r1),%fr1
+ FLDWS,MA 10(0,%r1),%fr1
+ FLDWS,MB 0(0,%r1),%fr1
+
+ FLDWX %r1(0,%r1),%fr1
+ FLDWX,S %r10(0,%r1),%fr1
+ FLDWX,M 0(0,%r1),%fr1
+ FLDWX,SM 0(0,%r1),%fr1
+
+ FMPY,SGL %fr6,%fr8,%fr10
+ FMPY,DBL %fr6,%fr8,%fr10
+
+ FMPYADD,SGL %fr16,%fr17,%fr18,%fr19,%fr20
+ FMPYADD,DBL %fr4,%fr7,%fr7,%fr5,%fr6
+
+ FMPYFADD,DBL %fr10,%fr11,%fr12,%fr13
+
+ FMPYNFADD,DBL %fr10,%fr11,%fr12,%fr13
+
+ FMPYSUB,SGL %fr16,%fr17,%fr18,%fr19,%fr30
+
+ ; PA2.0 opcodes:
+ ; FNEG,DBL %fr10,%fr1
+
+ ; PA2.0 opcodes:
+ ; FNEGABS,SGL %fr1,%fr1
+
+ FRND,DBL %fr2,%fr3
+
+ FSQRT,SGL %fr16,%fr17
+
+ FSTD %fr3,0(0,%r2)
+ FSTD,MA %fr3,8(0,%r2)
+ FSTD,MB %fr3,0(0,%r2)
+ FSTD,O %fr3,0(0,%r2)
+ FSTD,MA,SL %fr3,4(0,%r2)
+
+ FSTDS %fr3,0(0,%r2)
+ FSTDS,MA %fr3,8(0,%r2)
+ FSTDS,MB %fr3,0(0,%r2)
+
+ FSTDX %fr3,0(0,%r2)
+ FSTDX,S %fr3,%r8(0,%r2)
+ FSTDX,M %fr3,0(0,%r2)
+ FSTDX,SM %fr3,0(0,%r2)
+
+ FSTW %fr3,0(0,%r2)
+ FSTW,MA %fr3,8(0,%r2)
+ FSTW,MB %fr3,0(0,%r2)
+ FSTW,O %fr3,0(0,%r2)
+ FSTW,MA,SL %fr3,4(0,%r2)
+
+ FSTWS %fr3,0(0,%r2)
+ FSTWS,MA %fr3,8(0,%r2)
+ FSTWS,MB %fr3,0(0,%r2)
+
+ FSTWX %fr3,0(0,%r2)
+ FSTWX,S %fr3,%r8(0,%r2)
+ FSTWX,M %fr3,0(0,%r2)
+ FSTWX,SM %fr3,0(0,%r2)
+
+ FSUB,DBL %fr5,%fr2,%fr0
+
+ FTEST
+ FTEST,ACC
+ FTEST,ACC8
+ FTEST,ACC6
+ FTEST,ACC4
+ FTEST,ACC2
+ FTEST,REJ
+ FTEST,REJ8
+
+ labelg
+ GATE labelg,%r3
+ GATE,N labelu,%r3
+
+ labelh
+ ; PA2.0 opcodes:
+ ; HADD %r2,%r3,%r4
+ ; HADD,S %r2,%r3,%r4
+ ; HADD,U %r2,%r3,%r4
+
+ labeli
+ IDCOR %r4,%r17
+ IDCOR,SBZ %r4,%r17
+ IDCOR,SHZ %r4,%r17
+ IDCOR,SDC %r4,%r17
+ IDCOR,SBC %r4,%r17
+ IDCOR,SHC %r4,%r17
+ IDCOR,TR %r4,%r17
+ IDCOR,NBZ %r4,%r17
+ IDCOR,NHZ %r4,%r17
+ IDCOR,NDC %r4,%r17
+ IDCOR,NBC %r4,%r17
+ IDCOR,NHC %r4,%r17
+
+ ; PA2.0 opcodes:
+ ; IDTLBT %r1,%r2
+
+ IDTLBA %r5,(%sr2,%r4)
+
+ IDTLBP %r5,(%sr2,%r4)
+
+ ; PA2.0 opcodes:
+ ; IITLBT %r2,%r3
+
+ IITLBA %r5,(%sr2,%r4)
+
+ IITLBP %r5,(%sr2,%r4)
+
+ labelj
+ labelk
+ labell
+ LCI %r0(0,%r1),%r2
+
+ LDB %r1(0,%r1),%r1
+ LDB,MA 10(0,%r1),%r1
+ LDB,MB 0(0,%r1),%r1
+ LDB,O 0(0,%r1),%r1
+ LDB,MA,SL 4(0,%r1),%r1
+
+ LDBS %r1(0,%r1),%r1
+ LDBS,MA 10(0,%r1),%r1
+ LDBS,MB 0(0,%r1),%r1
+ LDBS,O 0(0,%r1),%r1
+ LDBS,MA,SL 4(0,%r1),%r1
+
+ LDBX %r1(0,%r1),%r1
+ LDBX,S %r10(0,%r1),%r1
+ LDBX,M 0(0,%r1),%r1
+ LDBX,SM 0(0,%r1),%r1
+
+ ; PA2.0 opcodes:
+ ; LDCD 0(0,%r1),%r1
+
+ LDCW %r1(0,%r1),%r1
+ LDCW,MA 10(0,%r1),%r1
+ LDCW,MB 0(0,%r1),%r1
+ LDCW,O 0(0,%r1),%r1
+ LDCW,MA,CO 4(0,%r1),%r1
+
+ LDCWS %r1(0,%r1),%r1
+ LDCWS,MA 10(0,%r1),%r1
+ LDCWS,MB 0(0,%r1),%r1
+ LDCWS,O 0(0,%r1),%r1
+ LDCWS,MA,CO 4(0,%r1),%r1
+
+ LDCWX %r1(0,%r1),%r1
+ LDCWX,S %r3(0,%r1),%r1
+ LDCWX,M 0(0,%r1),%r1
+ LDCWX,SM 0(0,%r1),%r1
+
+ LDH %r1(0,%r1),%r1
+ LDH,MA 10(0,%r1),%r1
+ LDH,MB 0(0,%r1),%r1
+ LDH,O 0(0,%r1),%r1
+ LDH,MA,SL 4(0,%r1),%r1
+
+ LDHS %r1(0,%r1),%r1
+ LDHS,MA 10(0,%r1),%r1
+ LDHS,MB 0(0,%r1),%r1
+ LDHS,O 0(0,%r1),%r1
+ LDHS,MA,SL 4(0,%r1),%r1
+
+ LDHX %r1(0,%r1),%r1
+ LDHX,S %r10(0,%r1),%r1
+ LDHX,M 0(0,%r1),%r1
+ LDHX,SM 0(0,%r1),%r1
+
+ LDIL 23456,%r6
+
+ LDO 100(%r3),%r20
+
+ LDSID (0,%r0),%r3
+
+ LDW %r1(0,%r1),%r1
+ LDW,MA 10(0,%r1),%r1
+ LDW,MB 0(0,%r1),%r1
+ LDW,O 0(0,%r1),%r1
+ LDW,MA,SL 4(0,%r1),%r1
+
+ LDWA %r1(%r3),%r2
+ LDWA,MA 8(%r3),%r2
+ LDWA,MB 0(%r3),%r2
+ LDWA,O 0(%r3),%r2
+ LDWA,MA,SL 8(%r3),%r2
+
+ LDWAS %r1(%r3),%r2
+ LDWAS,MA 8(%r3),%r2
+ LDWAS,MB 0(%r3),%r2
+ LDWAS,O 0(%r3),%r2
+ LDWAS,MA,SL 8(%r3),%r2
+
+ LDWAX %r1(%r3),%r2
+ LDWAX,S %r8(%r3),%r2
+ LDWAX,M 0(%r3),%r2
+ LDWAX,SM 0(%r3),%r2
+
+ LDWM 8(%sr1,%r3),%r4
+
+ LDWS %r1(0,%r1),%r1
+ LDWS,MA 10(0,%r1),%r1
+ LDWS,MB 0(0,%r1),%r1
+ LDWS,O 0(0,%r1),%r1
+ LDWS,MA,SL 4(0,%r1),%r1
+
+ LDWX %r1(%r3),%r2
+ LDWX,S %r8(%r3),%r2
+ LDWX,M 0(%r3),%r2
+ LDWX,SM 0(%r3),%r2
+
+ LPA %r0(0,%r3),%r19
+ LPA,M %r0(%sr2,%r3),%r19
+
+ labelm
+ MFCTL %cr0,%r4
+ MFCTL %cr12,%r4
+
+ ; PA2.0 opcodes:
+ ; MFIA %r25
+
+ MFSP %sr4,%r29
+
+ ; PA2.0 opcodes:
+ ; MIXH,L %r1,%r2,%r3
+
+ MOVB %r1,%r2,labelk
+ MOVB,N %r1,%r2,labelj
+ MOVB,>=,N %r1,%r2,labela
+
+ MOVIB 15,%r3,main
+ MOVIB,< 15,%r3,main
+ MOVIB,<>,N 15,%r3,main
+
+ MTCTL %r0,%cr17
+
+ MTSAR %r3
+
+ ; PA2.0 opcodes:
+ ; MTSARCM %r7
+
+ MTSM %r2
+
+ MTSP %r19,%sr3
+
+ labeln
+ NOP
+
+ labelo
+ OR %r1,%r0,%r3
+ OR,EV %r1,%r0,%r3
+
+ labelp
+ PDC %r0(0,%r1)
+ PDC,M %r0(0,%r1)
+
+ PDTLB %r8(%sr2,%r2)
+ PDTLB,M %r8(%sr2,%r2)
+ ; PA2.0 opcodes:
+ ; PDTLB,L %r8(%sr2,%r2)
+ ; PDTLB,L,M %r8(%sr2,%r2)
+
+ PDTLBE %r4(%sr1,%r21)
+ PDTLBE,M %r4(%sr1,%r21)
+
+ PITLB %r6(%sr0,%r30)
+ PITLB,M %r6(%sr0,%r30)
+
+ PITLBE %r6(%sr0,%r30)
+ PITLBE,M %r6(%sr0,%r30)
+
+ PROBE,R (%sr0,%r26),%r0,%r30
+ PROBE,W (%sr0,%r26),%r0,%r30
+
+ PROBEI,R (%sr0,%r26),10,%r30
+ PROBEI,W (%sr0,%r26),7,%r30
+
+ labelq
+ labelr
+ RFI
+ RFI,R
+
+ RFIR
+
+ RSM 31,%r24
+
+ labels
+ SH1ADD %r14,%r15,%r16
+ SH1ADD,NUV %r14,%r15,%r16
+ SH1ADD,ZNV %r14,%r15,%r16
+ SH1ADD,SV %r14,%r15,%r16
+ SH1ADD,UV %r14,%r15,%r16
+ SH1ADD,VNZ %r14,%r15,%r16
+ SH1ADD,NSV %r14,%r15,%r16
+
+ SH1ADDL %r14,%r15,%r16
+ SH1ADDL,NUV %r14,%r15,%r16
+ SH1ADDL,ZNV %r14,%r15,%r16
+ SH1ADDL,SV %r14,%r15,%r16
+ SH1ADDL,UV %r14,%r15,%r16
+ SH1ADDL,VNZ %r14,%r15,%r16
+ SH1ADDL,NSV %r14,%r15,%r16
+
+ SH1ADDO %r14,%r15,%r16
+ SH1ADDO,NUV %r14,%r15,%r16
+ SH1ADDO,ZNV %r14,%r15,%r16
+ SH1ADDO,SV %r14,%r15,%r16
+ SH1ADDO,UV %r14,%r15,%r16
+ SH1ADDO,VNZ %r14,%r15,%r16
+ SH1ADDO,NSV %r14,%r15,%r16
+
+ SH2ADD %r14,%r15,%r16
+ SH2ADD,NUV %r14,%r15,%r16
+ SH2ADD,ZNV %r14,%r15,%r16
+ SH2ADD,SV %r14,%r15,%r16
+ SH2ADD,UV %r14,%r15,%r16
+ SH2ADD,VNZ %r14,%r15,%r16
+ SH2ADD,NSV %r14,%r15,%r16
+
+ SH2ADDL %r14,%r15,%r16
+ SH2ADDL,NUV %r14,%r15,%r16
+ SH2ADDL,ZNV %r14,%r15,%r16
+ SH2ADDL,SV %r14,%r15,%r16
+ SH2ADDL,UV %r14,%r15,%r16
+ SH2ADDL,VNZ %r14,%r15,%r16
+ SH2ADDL,NSV %r14,%r15,%r16
+
+ SH2ADDO %r14,%r15,%r16
+ SH2ADDO,NUV %r14,%r15,%r16
+ SH2ADDO,ZNV %r14,%r15,%r16
+ SH2ADDO,SV %r14,%r15,%r16
+ SH2ADDO,UV %r14,%r15,%r16
+ SH2ADDO,VNZ %r14,%r15,%r16
+ SH2ADDO,NSV %r14,%r15,%r16
+
+ SH3ADD %r14,%r15,%r16
+ SH3ADD,NUV %r14,%r15,%r16
+ SH3ADD,ZNV %r14,%r15,%r16
+ SH3ADD,SV %r14,%r15,%r16
+ SH3ADD,UV %r14,%r15,%r16
+ SH3ADD,VNZ %r14,%r15,%r16
+ SH3ADD,NSV %r14,%r15,%r16
+
+ SH3ADDL %r14,%r15,%r16
+ SH3ADDL,NUV %r14,%r15,%r16
+ SH3ADDL,ZNV %r14,%r15,%r16
+ SH3ADDL,SV %r14,%r15,%r16
+ SH3ADDL,UV %r14,%r15,%r16
+ SH3ADDL,VNZ %r14,%r15,%r16
+ SH3ADDL,NSV %r14,%r15,%r16
+
+ SH3ADDO %r14,%r15,%r16
+ SH3ADDO,NUV %r14,%r15,%r16
+ SH3ADDO,ZNV %r14,%r15,%r16
+ SH3ADDO,SV %r14,%r15,%r16
+ SH3ADDO,UV %r14,%r15,%r16
+ SH3ADDO,VNZ %r14,%r15,%r16
+ SH3ADDO,NSV %r14,%r15,%r16
+
+ SHD %r3,%r2,15,%r0
+ SHD,<> %r3,%r2,15,%r0
+
+ SHLADD %r1,2,%r3,%r6
+ SHLADD,TSV %r1,2,%r3,%r6
+ SHLADD,L %r1,2,%r3,%r6
+ SHLADD,= %r1,2,%r3,%r6
+ SHLADD,< %r1,2,%r3,%r6
+ SHLADD,<= %r1,2,%r3,%r6
+ SHLADD,NUV %r1,2,%r3,%r6
+ SHLADD,ZNV %r1,2,%r3,%r6
+ SHLADD,SV %r1,2,%r3,%r6
+ SHLADD,OD %r1,2,%r3,%r6
+ SHLADD,TR %r1,2,%r3,%r6
+ SHLADD,<> %r1,2,%r3,%r6
+ SHLADD,>= %r1,2,%r3,%r6
+ SHLADD,> %r1,2,%r3,%r6
+ SHLADD,UV %r1,2,%r3,%r6
+ SHLADD,VNZ %r1,2,%r3,%r6
+ SHLADD,NSV %r1,2,%r3,%r6
+ SHLADD,EV %r1,2,%r3,%r6
+
+ SHRPW %r1,%r2,1,%r3
+
+ SPOP0,0,35
+
+ SPOP1,3,35 %r6
+
+ SPOP2,3,35 %r6
+
+ SPOP3,3,35 %r6,%r7
+
+ SSM 127,%r1
+
+ STB %r0,8(%sr1,%r3)
+ STB,BC %r0,8(%sr1,%r3)
+ STB,SL %r0,8(%sr1,%r3)
+
+ STBS %r0,8(%sr1,%r3)
+ STBS,BC %r0,8(%sr1,%r3)
+ STBS,SL %r0,8(%sr1,%r3)
+
+ STBY %r7,6(%sr1,%r30)
+ STBY,B %r7,6(%sr1,%r30)
+ STBY,E %r7,6(%sr1,%r30)
+ STBY,M %r7,6(%sr1,%r30)
+ STBY,B,BC %r7,6(%sr1,%r30)
+ STBY,E,SL %r7,6(%sr1,%r30)
+
+ STBYS %r7,6(%sr1,%r30)
+ STBYS,B,M %r7,6(%sr1,%r30)
+ STBYS,E,M %r7,6(%sr1,%r30)
+ STBYS,M %r7,6(%sr1,%r30)
+ STBYS,B,BC %r7,6(%sr1,%r30)
+ STBYS,E,SL %r7,6(%sr1,%r30)
+
+ ; PA2.0 opcodes:
+ ; STD %r18,0(%sr3,%r29)
+
+ STH %r18,0(%sr3,%r29)
+
+ STHS %r18,0(%sr3,%r29)
+
+ STW %r17,3(0,%r1)
+
+ STWA %r16,0(%r6)
+
+ STWM %r16,0(%sr3,%r6)
+
+ STWAS,MA %r16,2(%r6)
+
+ STWS %r16,0(%r6)
+
+ SUB %r1,%r0,%r3
+ SUB,B %r1,%r0,%r3
+ SUB,DB %r1,%r0,%r3
+ SUB,TC %r1,%r0,%r3
+ SUB,TSV %r1,%r0,%r3
+ SUB,TSV,TC %r1,%r0,%r3
+ SUB,B,TSV %r1,%r0,%r3
+ SUB,B,TSV,< %r1,%r0,%r3
+
+ SUBB %r8,%r9,%r10
+ SUBB,<<= %r8,%r9,%r10
+ SUBB,>>= %r8,%r9,%r10
+ SUBB,NSV %r8,%r9,%r10
+
+ SUBBO %r8,%r9,%r10
+ SUBBO,<<= %r8,%r9,%r10
+ SUBBO,>>= %r8,%r9,%r10
+ SUBBO,NSV %r8,%r9,%r10
+
+ SUBI 9,%r3,%r5
+ SUBI,TSV 2,%r3,%r5
+
+ SUBIO 5,%r27,%r26
+ SUBIO,< 5,%r27,%r26
+
+ SUBO %r8,%r9,%r10
+ SUBO,<<= %r8,%r9,%r10
+ SUBO,>>= %r8,%r9,%r10
+ SUBO,NSV %r8,%r9,%r10
+
+ SUBT %r8,%r9,%r10
+ SUBT,<= %r8,%r9,%r10
+ SUBT,>= %r8,%r9,%r10
+ SUBT,NSV %r8,%r9,%r10
+
+ SUBTO %r8,%r9,%r10
+ SUBTO,<<= %r8,%r9,%r10
+ SUBTO,>>= %r8,%r9,%r10
+ SUBTO,NSV %r8,%r9,%r10
+
+ SYNC
+
+ SYNCDMA
+
+ labelt
+ labelu
+ UADDCM %r3,%r4,%r5
+ UADDCM,TC %r3,%r4,%r5
+
+ UADDCMT %r3,%r4,%r5
+ UADDCMT,SHC %r3,%r4,%r5
+
+ UXOR %r19,%r3,%r20
+ UXOR,SHZ %r19,%r3,%r20
+
+ labelv
+ VDEP %r7,3,%r8
+ VDEP,TR %r2,3,%r8
+
+ VDEPI 7,3,%r8
+ VDEPI,= 2,3,%r8
+
+ VEXTRS %r4,30,%r4
+ VEXTRS,< %r4,30,%r4
+
+ VEXTRU %r4,30,%r4
+ VEXTRU,>= %r4,30,%r4
+
+ VSHD %r3,%r2,%r0
+ VSHD,< %r3,%r2,%r0
+
+ labelw
+ labelx
+ XMPYU %fr3,%fr4,%fr5
+
+ XOR %r0,%r1,%r2
+ XOR,TR %r0,%r1,%r2
+ XOR,>= %r0,%r1,%r2
+
+ labely
+ labelz
+ ZDEP %r18,1,2,%r2
+ ZDEP,<> %r18,2,3,%r2
+
+ ZDEPI 1,1,2,%r2
+ ZDEPI,EV 3,2,3,%r2
+
+ ZVDEP %r18,30,%r2
+ ZVDEP,< %r18,8,%r2
+
+ ZVDEPI 15,30,%r2
+ ZVDEPI,OD 8,8,%r2
+
+ .exit
+ .procend
+
+ mainend
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+ NOP
+
+ .exit
+ .procend
+
+ .end
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11.com gdb/testsuite/gdb.disasm/pa11.com
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11.com Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa11.com Thu Jul 22 17:49:51 1999
***************
*** 0 ****
--- 1 ----
+ x/583i main
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11.exp gdb/testsuite/gdb.disasm/pa11.exp
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11.exp Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa11.exp Thu Jul 22 17:49:50 1999
***************
*** 0 ****
--- 1,72 ----
+ # pa11.exp Test gdb disassembly operations
+ #
+ if ![istarget "hppa*-*-*"] {
+ verbose "Tests ignored for all but hppa based targets."
+ return
+ }
+
+ if $tracelevel {
+ strace $tracelevel
+ }
+
+ set prms_id 0
+ set bug_id 0
+
+ # use this to debug:
+ #log_user 1
+
+ set testfile pa11
+ set srcfile ${srcdir}/${subdir}/pa11-instr.s
+ set binfile ${srcdir}/${subdir}/${testfile}
+ set outfile ${srcdir}/${subdir}/${testfile}.out
+ set comfile ${srcdir}/${subdir}/${testfile}.com
+ set tmpfile ${objdir}/${subdir}/${testfile}.tmp
+ set sedfile ${srcdir}/${subdir}/pa-sed.cmd
+ set diffile ${objdir}/${subdir}/${testfile}.dif
+ set tmp2file ${objdir}/${subdir}/${testfile}.tmp2
+ set out2file ${srcdir}/${subdir}/${testfile}.out.with_bug
+
+ # Clean up for test
+ #
+ gdb_exit
+ remote_exec build "rm -f ${tmpfile} ${tmp2file} ${diffile}"
+
+ # To build a pa 1.1 executable
+ #
+ # as -o pa11 pa11-instr.s
+ # or
+ # cc -g -o pa11 pa11-instr.s
+ #
+ ##if { [gdb_compile "${srcfile}" "${binfile}" executable {debug additional_flags="+DA1.1"}] != "" } {
+ ## gdb_suppress_entire_file "Testcase compile failed, so all tests in this file will automatically fail."
+ ##}
+
+ # This non-standard start-up sequence is taken from that for
+ # the standard "gdb_start" in
+ # /CLO/Components/WDB/Src/gdb/gdb/testsuite/lib/gdb.exp.
+ # We use it so we can run gdb in non-interactive mode.
+ #
+ global GDB
+ if { [which $GDB] == 0 } {
+ perror "$GDB does not exist."
+ exit 1
+ }
+
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmpfile} $GDB -nx -batch -silent -se ${binfile} -command ${comfile}"
+
+ # Remove actual addresses, which may vary from one OS release to another.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmp2file} sed -f ${sedfile} ${tmpfile}"
+
+ # Should be no differences in the output.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${diffile} diff ${outfile} ${tmp2file}"
+ set exec_output [remote_exec build "wc -l ${diffile}"]
+
+ if [ regexp "^0 {0 ${diffile}" ${exec_output} ] {
+ pass "Disassembly"
+ } else {
+ fail "Disassembly"
+ }
+
+ return 0
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11.out gdb/testsuite/gdb.disasm/pa11.out
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa11.out Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa11.out Thu Jul 22 17:49:50 1999
***************
*** 0 ****
--- 1,583 ----
+ <main>: add %r1,%r1,%rp
+ <main+4>: add,c %r0,%r1,%rp
+ <main+8>: add,dc %r0,%r1,%rp
+ <main+12>: add,l %r1,%rp,%r3
+ <main+16>: add,tsv %r3,%r4,%r5
+ <main+20>: add,tsv,c %r3,%r4,%r5
+ <main+24>: add,tsv,dc %r3,%r4,%r5
+ <main+28>: addb,= %r25,%r26,<labelb>
+ <main+32>: addb,=,n %r25,%r26,<labelb>
+ <main+36>: addb,sv %dp,%ret0,<main>
+ <main+40>: addb,od %dp,%ret0,<main>
+ <main+44>: addb,tr %dp,%ret0,<main>
+ <main+48>: addb,nsv %dp,%ret0,<main>
+ <main+52>: addb,ev %dp,%ret0,<main>
+ <main+56>: addb,<> %dp,%ret0,<main>
+ <main+60>: addb,uv %r1,%r5,<main>
+ <main+64>: addb,>,n %r10,%r6,<labelb>
+ <main+68>: addb,nuv %r1,%r5,<main>
+ <main+72>: addb,<=,n %r10,%r6,<labelb>
+ <main+76>: add,c %ret0,%ret1,%sp
+ <main+80>: add,c,uv %ret0,%ret1,%sp
+ <main+84>: add,tsv,c %ret0,%ret1,%sp
+ <main+88>: add,tsv,c,uv %ret0,%ret1,%sp
+ <main+92>: addi 0,%rp,%r0
+ <main+96>: addi,> 1,%r3,%r0
+ <main+100>: addi,< 2,%r4,%r0
+ <main+104>: addib,>= -1,%r5,<main>
+ <main+108>: addib,<=,n 0xa,%r6,<labelb>
+ <main+112>: addib,uv -1,%r5,<main>
+ <main+116>: addib,>,n 0xa,%r6,<labelb>
+ <main+120>: addib,nuv -1,%r5,<main>
+ <main+124>: addib,<=,n 0xa,%r6,<labelb>
+ <main+128>: addil L'-0x800,%r3,%r1
+ <main+132>: addil L'0x88b8000,%r3,%r1
+ <main+136>: addi,tsv 4,%r22,%r21
+ <main+140>: addi,tsv,< 4,%r22,%r21
+ <main+144>: addi,tc 4,%r22,%r21
+ <main+148>: addi,tc,tr 4,%r22,%r21
+ <main+152>: addi,tsv,tc 0x3a6,%r25,%r24
+ <main+156>: addi,tsv,tc,<> 0x3ff,%r25,%r24
+ <main+160>: add,tsv %ret0,%ret1,%sp
+ <main+164>: add,tsv,sv %ret0,%ret1,%sp
+ <main+168>: add,l %ret0,%ret1,%sp
+ <main+172>: add,l,nsv %ret0,%ret1,%sp
+ <main+176>: and %sp,%r31,%sp
+ <main+180>: and,< %sp,%r31,%sp
+ <main+184>: andcm %r26,%dp,%ret0
+ <main+188>: andcm,> %r26,%dp,%ret0
+ <labelb>: b <labelc>
+ <labelb+4>: b,n <labelc>
+ <labelb+8>: b,gate <labelc>,%r0
+ <labelb+12>: b,l <labelb>,%r3
+ <labelb+16>: bb,< %r9,%sar,<labelc>
+ <labelb+20>: bb,>=,n %r9,0x1f,<labelc>
+ <labelb+24>: be 0x64(%sr4,%r11)
+ <labelb+28>: be,l 0(%sr4,%r11)
+ <labelb+32>: b,l <labelb>,%r3
+ <labelb+36>: b,l,n <labelb>,%r3
+ <labelb+40>: be,l 0x3038(%sr0,%r3)
+ <labelb+44>: be,l,n 0x3038(%sr0,%r3)
+ <labelb+48>: blr %r31,%r3
+ <labelb+52>: blr,n %r0,%r3
+ <labelb+56>: break 0,1
+ <labelb+60>: break 0x1f,0x3e8
+ <labelb+64>: bv %r0(%r1)
+ <labelb+68>: bv,n %r0(%r20)
+ <labelb+72>: bb,< %r3,%sar,<main>
+ <labelb+76>: bb,<,n %r3,%sar,<main>
+ <labelb+80>: bve (%r5)
+ <labelb+84>: bve,pop (%r5)
+ <labelc>: fldd 0(%sr2,%r0),%fr0
+ <labelc+4>: cldd,1,ma 1(%sr2,%r1),2
+ <labelc+8>: cldd,2,mb 9(%sr2,%r6),3
+ <labelc+12>: fldd %r3(%sr2,%r10),%fr0
+ <labelc+16>: fldd,s %r3(%sr2,%r20),%fr1
+ <labelc+20>: cldd,1,m %r3(%sr2,%sp),2
+ <labelc+24>: cldd,2,sm %r3(%sr2,%r0),3
+ <labelc+28>: fldw 0(%sr2,%r0),%fr0
+ <labelc+32>: fldw,ma 3(%sr2,%r0),%fr2R
+ <labelc+36>: cldw,2,mb 7(%sr2,%r0),3
+ <labelc+40>: fldw %r3(%sr2,%r0),%fr0
+ <labelc+44>: fldw,s %r3(%sr2,%r0),%fr1
+ <labelc+48>: fldw,m %r3(%sr2,%r0),%fr2R
+ <labelc+52>: cldw,2,sm %r3(%sr2,%r0),3
+ <labelc+56>: cmpb,< %r11,%r12,<labelc>
+ <labelc+60>: cmpb,>=,n %r11,%r12,<main>
+ <labelc+64>: cmpclr,<> %rp,%r3,%r4
+ <labelc+68>: cmpib,<= 0,%rp,<labeld>
+ <labelc+72>: cmpib,nsv,n -0x10,%rp,<labeld>
+ <labelc+76>: cmpiclr,od 0x3e8,%r0,%r31
+ <labelc+80>: cmpb,> %r0,%rp,<labeld>
+ <labelc+84>: cmpb,>>=,n %r16,%rp,<labeld>
+ <labelc+88>: cmpb,<= %r0,%rp,<labeld>
+ <labelc+92>: cmpb,<<,n %r16,%rp,<labeld>
+ <labelc+96>: cmpclr %r11,%r12,%r13
+ <labelc+100>: cmpclr,>= %r11,%r12,%r13
+ <labelc+104>: cmpib,> 0,%rp,<labeld>
+ <labelc+108>: cmpib,>>,n -0x10,%rp,<labeld>
+ <labelc+112>: cmpib,<= 0,%rp,<labeld>
+ <labelc+116>: cmpib,<,n -0x10,%rp,<labeld>
+ <labelc+120>: cmpiclr 1,%r3,%r4
+ <labelc+124>: cmpiclr,ev 0x9d,%r3,%r4
+ <labelc+128>: fid
+ <labelc+132>: copr,7,0
+ <labelc+136>: copr,7,0xff
+ <labelc+140>: copy %r3,%r4
+ <labelc+144>: fstd %fr8,0(%sr1,%r31)
+ <labelc+148>: cstd,7,ma 11,2(%sr1,%r3)
+ <labelc+152>: cstd,4,mb 14,2(%sr1,%r3)
+ <labelc+156>: fstw %fr8,0(%sr1,%r31)
+ <labelc+160>: cstw,7,ma 11,2(%sr1,%r3)
+ <labelc+164>: cstw,4,mb 14,2(%sr1,%r3)
+ <labeld>: dcor %r3,%r4
+ <labeld+4>: dcor,i %r3,%r4
+ <labeld+8>: dcor,sbz %r4,%r5
+ <labeld+12>: dcor,shz %r4,%r6
+ <labeld+16>: dcor,sdc %r4,%r7
+ <labeld+20>: dcor,sbc %r4,%r8
+ <labeld+24>: dcor,shc %r4,%r9
+ <labeld+28>: dcor,nbz %r4,%r10
+ <labeld+32>: dcor,nhz %r4,%r11
+ <labeld+36>: dcor,ndc %r4,%r12
+ <labeld+40>: dcor,nbc %r4,%r13
+ <labeld+44>: dcor,nhc %r4,%r14
+ <labeld+48>: depw %r21,14,3,%r22
+ <labeld+52>: depw,>= %r21,14,3,%r22
+ <labeld+56>: depwi 1,14,3,%r22
+ <labeld+60>: depwi,>= 2,14,3,%r22
+ <labeld+64>: depw %r19,1,2,%r1
+ <labeld+68>: depw,z %r19,1,2,%r1
+ <labeld+72>: depw,z %r19,%sar,31,%r1
+ <labeld+76>: depw,z,< %r19,30,1,%r1
+ <labeld+80>: depwi 0xf,0,1,%rp
+ <labeld+84>: depwi,z -0x10,0,1,%rp
+ <labeld+88>: diag 0x1e240
+ <labeld+92>: ds %r1,%rp,%r3
+ <labeld+96>: ds,<> %r1,%rp,%r3
+ <labeld+100>: extrw,s %r1,3,4,%rp
+ <labeld+104>: extrw,s,od %r1,3,4,%rp
+ <labeld+108>: extrw,u %r1,3,4,%rp
+ <labeld+112>: extrw,u,ev %r1,3,4,%rp
+ <labeld+116>: extrw,s %r0,3,4,%r1
+ <labeld+120>: extrw,s %r0,3,4,%r1
+ <labeld+124>: extrw,u %r0,3,4,%r1
+ <labeld+128>: extrw,u,ev %r0,3,4,%r1
+ <labeld+132>: extrw,s,<> %r0,%sar,4,%r1
+ <labeld+136>: fabs,sgl %fr2,%fr3
+ <labeld+140>: fabs,dbl %fr2,%fr6
+ <labeld+144>: fadd,sgl %fr2,%fr4,%fr6
+ <labeld+148>: fadd,dbl %fr2,%fr4,%fr6
+ <labeld+152>: fcmp,sgl,false? %fr3,%fr2
+ <labeld+156>: fcmp,dbl,false %fr3,%fr2
+ <labeld+160>: fcmp,dbl,? %fr3,%fr2
+ <labeld+164>: fcmp,dbl,!<=> %fr3,%fr2
+ <labeld+168>: fcmp,dbl,= %fr3,%fr2
+ <labeld+172>: fcmp,dbl,=t %fr3,%fr2
+ <labeld+176>: fcmp,dbl,?= %fr3,%fr2
+ <labeld+180>: fcmp,dbl,!<> %fr3,%fr2
+ <labeld+184>: fcmp,dbl,!?>= %fr3,%fr2
+ <labeld+188>: fcmp,dbl,< %fr3,%fr2
+ <labeld+192>: fcmp,dbl,?< %fr3,%fr2
+ <labeld+196>: fcmp,dbl,!>= %fr3,%fr2
+ <labeld+200>: fcmp,dbl,!?> %fr3,%fr2
+ <labeld+204>: fcmp,dbl,<= %fr3,%fr2
+ <labeld+208>: fcmp,dbl,?<= %fr3,%fr2
+ <labeld+212>: fcmp,dbl,!> %fr3,%fr2
+ <labeld+216>: fcmp,dbl,!?<= %fr3,%fr2
+ <labeld+220>: fcmp,dbl,> %fr3,%fr2
+ <labeld+224>: fcmp,dbl,?> %fr3,%fr2
+ <labeld+228>: fcmp,dbl,!<= %fr3,%fr2
+ <labeld+232>: fcmp,dbl,!?< %fr3,%fr2
+ <labeld+236>: fcmp,dbl,>= %fr3,%fr2
+ <labeld+240>: fcmp,dbl,?>= %fr3,%fr2
+ <labeld+244>: fcmp,dbl,!< %fr3,%fr2
+ <labeld+248>: fcmp,dbl,!?= %fr3,%fr2
+ <labeld+252>: fcmp,dbl,<> %fr3,%fr2
+ <labeld+256>: fcmp,dbl,!= %fr3,%fr2
+ <labeld+260>: fcmp,dbl,!=t %fr3,%fr2
+ <labeld+264>: fcmp,dbl,!? %fr3,%fr2
+ <labeld+268>: fcmp,dbl,<=> %fr3,%fr2
+ <labeld+272>: fcmp,dbl,true? %fr3,%fr2
+ <labeld+276>: fcmp,dbl,true %fr3,%fr2
+ <labeld+280>: fcnv,sgl,dbl %fr2,%fr4
+ <labeld+284>: fcnv,sgl,w %fr2,%fr4
+ <labeld+288>: fcnv,sgl,dw %fr2,%fr4
+ <labeld+292>: fcnv,sgl,quad %fr2,%fr4
+ <labeld+296>: fcnv,sgl,qw %fr2,%fr4
+ <labeld+300>: fcnv,w,sgl %fr2,%fr4
+ <labeld+304>: fcnv,w,dbl %fr2,%fr4
+ <labeld+308>: fcnv,w,quad %fr2,%fr4
+ <labeld+312>: fcnv,dbl,sgl %fr2,%fr4
+ <labeld+316>: fcnv,dbl,w %fr2,%fr4
+ <labeld+320>: fcnv,dbl,quad %fr2,%fr4
+ <labeld+324>: fcnv,dbl,qw %fr2,%fr4
+ <labeld+328>: fcnv,quad,sgl %fr2,%fr6
+ <labeld+332>: fcnv,quad,dbl %fr2,%fr6
+ <labeld+336>: fcnv,quad,w %fr2,%fr6
+ <labeld+340>: fcnv,quad,qw %fr2,%fr6
+ <labeld+344>: fcnv,qw,sgl %fr2,%fr4
+ <labeld+348>: fcnv,qw,dbl %fr2,%fr4
+ <labeld+352>: fcnv,qw,quad %fr2,%fr4
+ <labeld+356>: fcnv,t,dbl,w %fr3,%fr4
+ <labeld+360>: fcpy,sgl %fr5,%fr6
+ <labeld+364>: fcpy,dbl %fr5,%fr6
+ <labeld+368>: fdc %r3(%sr0,%r3)
+ <labeld+372>: fdc,m %r0(%sr0,%r4)
+ <labeld+376>: fdce,m %r0(%sr3,%r7)
+ <labeld+380>: fdiv,dbl %fr1,%fr0,%fr2
+ <labeld+384>: fic %r4(%sr0,%r5)
+ <labeld+388>: fic,m %r4(%sr2,%r5)
+ <labeld+392>: fice,m %r0(%sr1,%r8)
+ <labeld+396>: fid
+ <labeld+400>: fldd 0(%sr0,%r1),%fr1
+ <labeld+404>: fldd,ma 0xa(%sr0,%r1),%fr1
+ <labeld+408>: fldd,mb 0(%sr0,%r1),%fr1
+ <labeld+412>: fldd,o 0(%sr0,%r1),%fr1
+ <labeld+416>: fldd,ma,sl 4(%sr0,%r1),%fr1
+ <labeld+420>: fldd 0(%sr0,%r1),%fr1
+ <labeld+424>: fldd,ma 0xa(%sr0,%r1),%fr1
+ <labeld+428>: fldd,mb 0(%sr0,%r1),%fr1
+ <labeld+432>: fldd %r0(%sr0,%r1),%fr1
+ <labeld+436>: fldd,s %r10(%sr0,%r1),%fr1
+ <labeld+440>: fldd,m %r0(%sr0,%r1),%fr1
+ <labeld+444>: fldd,sm %r0(%sr0,%r1),%fr1
+ <labeld+448>: fldw %r1(%sr0,%r1),%fr1
+ <labeld+452>: fldw,ma 0xa(%sr0,%r1),%fr1
+ <labeld+456>: fldw,mb 0(%sr0,%r1),%fr1
+ <labeld+460>: fldw,o 0(%sr0,%r1),%fr1
+ <labeld+464>: fldw,ma,sl 4(%sr0,%r1),%fr1
+ <labeld+468>: fldw 1(%sr0,%r1),%fr1
+ <labeld+472>: fldw,ma 0xa(%sr0,%r1),%fr1
+ <labeld+476>: fldw,mb 0(%sr0,%r1),%fr1
+ <labeld+480>: fldw %r1(%sr0,%r1),%fr1
+ <labeld+484>: fldw,s %r10(%sr0,%r1),%fr1
+ <labeld+488>: fldw,m %r0(%sr0,%r1),%fr1
+ <labeld+492>: fldw,sm %r0(%sr0,%r1),%fr1
+ <labeld+496>: fmpy,sgl %fr6,%fr8,%fr10
+ <labeld+500>: fmpy,dbl %fr6,%fr8,%fr10
+ <labeld+504>: fmpyadd,sgl %fr16,%fr17,%fr18,%fr19,%fr20
+ <labeld+508>: fmpyadd,dbl %fr4,%fr7,%fr7,%fr5,%fr6
+ <labeld+512>: fmpyfadd,dbl %fr10,%fr11,%fr12,%fr13
+ <labeld+516>: fmpynfadd,dbl %fr10,%fr11,%fr12,%fr13
+ <labeld+520>: fmpysub,sgl %fr16,%fr17,%fr18,%fr19,%fr30
+ <labeld+524>: frnd,dbl %fr2,%fr3
+ <labeld+528>: fsqrt,sgl %fr16,%fr17
+ <labeld+532>: fstd %fr3,0(%sr0,%rp)
+ <labeld+536>: fstd,ma %fr3,8(%sr0,%rp)
+ <labeld+540>: fstd,mb %fr3,0(%sr0,%rp)
+ <labeld+544>: fstd,o %fr3,0(%sr0,%rp)
+ <labeld+548>: fstd,ma,sl %fr3,4(%sr0,%rp)
+ <labeld+552>: fstd %fr3,0(%sr0,%rp)
+ <labeld+556>: fstd,ma %fr3,8(%sr0,%rp)
+ <labeld+560>: fstd,mb %fr3,0(%sr0,%rp)
+ <labeld+564>: fstd %fr3,%r0(%sr0,%rp)
+ <labeld+568>: fstd,s %fr3,%r8(%sr0,%rp)
+ <labeld+572>: fstd,m %fr3,%r0(%sr0,%rp)
+ <labeld+576>: fstd,sm %fr3,%r0(%sr0,%rp)
+ <labeld+580>: fstw %fr3,0(%sr0,%rp)
+ <labeld+584>: fstw,ma %fr3,8(%sr0,%rp)
+ <labeld+588>: fstw,mb %fr3,0(%sr0,%rp)
+ <labeld+592>: fstw,o %fr3,0(%sr0,%rp)
+ <labeld+596>: fstw,ma,sl %fr3,4(%sr0,%rp)
+ <labeld+600>: fstw %fr3,0(%sr0,%rp)
+ <labeld+604>: fstw,ma %fr3,8(%sr0,%rp)
+ <labeld+608>: fstw,mb %fr3,0(%sr0,%rp)
+ <labeld+612>: fstw %fr3,%r0(%sr0,%rp)
+ <labeld+616>: fstw,s %fr3,%r8(%sr0,%rp)
+ <labeld+620>: fstw,m %fr3,%r0(%sr0,%rp)
+ <labeld+624>: fstw,sm %fr3,%r0(%sr0,%rp)
+ <labeld+628>: fsub,dbl %fr5,%fr2,%fr0
+ <labeld+632>: ftest
+ <labeld+636>: ftest,acc
+ <labeld+640>: ftest,acc8
+ <labeld+644>: ftest,acc6
+ <labeld+648>: ftest,acc4
+ <labeld+652>: ftest,acc2
+ <labeld+656>: ftest,rej
+ <labeld+660>: ftest,rej8
+ <labelg>: b,gate <labelg>,%r3
+ <labelg+4>: b,gate,n <labelu>,%r3
+ <labelg+8>: dcor,i %r4,%r17
+ <labelg+12>: dcor,i,sbz %r4,%r17
+ <labelg+16>: dcor,i,shz %r4,%r17
+ <labelg+20>: dcor,i,sdc %r4,%r17
+ <labelg+24>: dcor,i,sbc %r4,%r17
+ <labelg+28>: dcor,i,shc %r4,%r17
+ <labelg+32>: dcor,i,tr %r4,%r17
+ <labelg+36>: dcor,i,nbz %r4,%r17
+ <labelg+40>: dcor,i,nhz %r4,%r17
+ <labelg+44>: dcor,i,ndc %r4,%r17
+ <labelg+48>: dcor,i,nbc %r4,%r17
+ <labelg+52>: dcor,i,nhc %r4,%r17
+ <labelg+56>: idtlba %r5,(%sr2,%r4)
+ <labelg+60>: idtlbp %r5,(%sr2,%r4)
+ <labelg+64>: iitlba %r5,(%sr2,%r4)
+ <labelg+68>: iitlbp %r5,(%sr2,%r4)
+ <labelk>: lci %r0(%sr0,%r1),%rp
+ <labelk+4>: ldb %r1(%sr0,%r1),%r1
+ <labelk+8>: ldb,ma 0xa(%sr0,%r1),%r1
+ <labelk+12>: ldb,mb 0(%sr0,%r1),%r1
+ <labelk+16>: ldb,o 0(%sr0,%r1),%r1
+ <labelk+20>: ldb,ma,sl 4(%sr0,%r1),%r1
+ <labelk+24>: ldb 1(%sr0,%r1),%r1
+ <labelk+28>: ldb,ma 0xa(%sr0,%r1),%r1
+ <labelk+32>: ldb,mb 0(%sr0,%r1),%r1
+ <labelk+36>: ldb,o 0(%sr0,%r1),%r1
+ <labelk+40>: ldb,ma,sl 4(%sr0,%r1),%r1
+ <labelk+44>: ldb %r1(%sr0,%r1),%r1
+ <labelk+48>: ldb,s %r10(%sr0,%r1),%r1
+ <labelk+52>: ldb,m %r0(%sr0,%r1),%r1
+ <labelk+56>: ldb,sm %r0(%sr0,%r1),%r1
+ <labelk+60>: ldcw %r1(%sr0,%r1),%r1
+ <labelk+64>: ldcw,ma 0xa(%sr0,%r1),%r1
+ <labelk+68>: ldcw,mb 0(%sr0,%r1),%r1
+ <labelk+72>: ldcw,o 0(%sr0,%r1),%r1
+ <labelk+76>: ldcw,ma,co 4(%sr0,%r1),%r1
+ <labelk+80>: ldcw 1(%sr0,%r1),%r1
+ <labelk+84>: ldcw,ma 0xa(%sr0,%r1),%r1
+ <labelk+88>: ldcw,mb 0(%sr0,%r1),%r1
+ <labelk+92>: ldcw,o 0(%sr0,%r1),%r1
+ <labelk+96>: ldcw,ma,co 4(%sr0,%r1),%r1
+ <labelk+100>: ldcw %r1(%sr0,%r1),%r1
+ <labelk+104>: ldcw,s %r3(%sr0,%r1),%r1
+ <labelk+108>: ldcw,m %r0(%sr0,%r1),%r1
+ <labelk+112>: ldcw,sm %r0(%sr0,%r1),%r1
+ <labelk+116>: ldh %r1(%sr0,%r1),%r1
+ <labelk+120>: ldh,ma 0xa(%sr0,%r1),%r1
+ <labelk+124>: ldh,mb 0(%sr0,%r1),%r1
+ <labelk+128>: ldh,o 0(%sr0,%r1),%r1
+ <labelk+132>: ldh,ma,sl 4(%sr0,%r1),%r1
+ <labelk+136>: ldh 1(%sr0,%r1),%r1
+ <labelk+140>: ldh,ma 0xa(%sr0,%r1),%r1
+ <labelk+144>: ldh,mb 0(%sr0,%r1),%r1
+ <labelk+148>: ldh,o 0(%sr0,%r1),%r1
+ <labelk+152>: ldh,ma,sl 4(%sr0,%r1),%r1
+ <labelk+156>: ldh %r1(%sr0,%r1),%r1
+ <labelk+160>: ldh,s %r10(%sr0,%r1),%r1
+ <labelk+164>: ldh,m %r0(%sr0,%r1),%r1
+ <labelk+168>: ldh,sm %r0(%sr0,%r1),%r1
+ <labelk+172>: ldil L'0x2dd0000,%r6
+ <labelk+176>: ldo 0x64(%r3),%r20
+ <labelk+180>: ldsid (%sr0,%r0),%r3
+ <labelk+184>: ldw %r1(%sr0,%r1),%r1
+ <labelk+188>: ldw,ma 0xa(%sr0,%r1),%r1
+ <labelk+192>: ldw,mb 0(%sr0,%r1),%r1
+ <labelk+196>: ldw,o 0(%sr0,%r1),%r1
+ <labelk+200>: ldw,ma,sl 4(%sr0,%r1),%r1
+ <labelk+204>: ldwa %r1(%r3),%rp
+ <labelk+208>: ldwa,ma 8(%r3),%rp
+ <labelk+212>: ldwa,mb 0(%r3),%rp
+ <labelk+216>: ldwa,o 0(%r3),%rp
+ <labelk+220>: ldwa,ma,sl 8(%r3),%rp
+ <labelk+224>: ldwa 1(%r3),%rp
+ <labelk+228>: ldwa,ma 8(%r3),%rp
+ <labelk+232>: ldwa,mb 0(%r3),%rp
+ <labelk+236>: ldwa,o 0(%r3),%rp
+ <labelk+240>: ldwa,ma,sl 8(%r3),%rp
+ <labelk+244>: ldwa %r1(%r3),%rp
+ <labelk+248>: ldwa,s %r8(%r3),%rp
+ <labelk+252>: ldwa,m %r0(%r3),%rp
+ <labelk+256>: ldwa,sm %r0(%r3),%rp
+ <labelk+260>: ldw,ma 8(%sr1,%r3),%r4
+ <labelk+264>: ldw 1(%sr0,%r1),%r1
+ <labelk+268>: ldw,ma 0xa(%sr0,%r1),%r1
+ <labelk+272>: ldw,mb 0(%sr0,%r1),%r1
+ <labelk+276>: ldw,o 0(%sr0,%r1),%r1
+ <labelk+280>: ldw,ma,sl 4(%sr0,%r1),%r1
+ <labelk+284>: ldw %r1(%sr0,%r3),%rp
+ <labelk+288>: ldw,s %r8(%sr0,%r3),%rp
+ <labelk+292>: ldw,m %r0(%sr0,%r3),%rp
+ <labelk+296>: ldw,sm %r0(%sr0,%r3),%rp
+ <labelk+300>: lpa %r0(%sr0,%r3),%r19
+ <labelk+304>: lpa,m %r0(%sr2,%r3),%r19
+ <labelk+308>: mfctl %rctr,%r4
+ <labelk+312>: mfctl %pidr3,%r4
+ <labelk+316>: mfsp %sr4,%ret1
+ <labelk+320>: movb %r1,%rp,<labelk>
+ <labelk+324>: movb,n %r1,%rp,<labelk>
+ <labelk+328>: movb,>=,n %r1,%rp,<main>
+ <labelk+332>: movib 0xf,%r3,<main>
+ <labelk+336>: movib,< 0xf,%r3,<main>
+ <labelk+340>: movib,<>,n 0xf,%r3,<main>
+ <labelk+344>: mtctl %r0,%pcsq
+ <labelk+348>: mtsar %r3
+ <labelk+352>: mtsm %rp
+ <labelk+356>: mtsp %r19,%sr3
+ <labelk+360>: nop
+ <labelk+364>: or %r1,%r0,%r3
+ <labelk+368>: or,ev %r1,%r0,%r3
+ <labelk+372>: pdc %r0(%sr0,%r1)
+ <labelk+376>: pdc,m %r0(%sr0,%r1)
+ <labelk+380>: pdtlb %r8(%sr2,%rp)
+ <labelk+384>: pdtlb,m %r8(%sr2,%rp)
+ <labelk+388>: pdtlbe %r4(%sr1,%r21)
+ <labelk+392>: pdtlbe,m %r4(%sr1,%r21)
+ <labelk+396>: pitlb %r6(%sr0,%sp)
+ <labelk+400>: pitlb,m %r6(%sr0,%sp)
+ <labelk+404>: pitlbe %r6(%sr0,%sp)
+ <labelk+408>: pitlbe,m %r6(%sr0,%sp)
+ <labelk+412>: probe,r (%sr0,%r26),%r0,%sp
+ <labelk+416>: probe,w (%sr0,%r26),%r0,%sp
+ <labelk+420>: probei,r (%sr0,%r26),0xa,%sp
+ <labelk+424>: probei,w (%sr0,%r26),7,%sp
+ <labelk+428>: rfi
+ <labelk+432>: rfi,r
+ <labelk+436>: rfi,r
+ <labelk+440>: rsm 0x1f,%r24
+ <labelk+444>: shladd %r14,1,%r15,%r16
+ <labelk+448>: shladd,nuv %r14,1,%r15,%r16
+ <labelk+452>: shladd,znv %r14,1,%r15,%r16
+ <labelk+456>: shladd,sv %r14,1,%r15,%r16
+ <labelk+460>: shladd,uv %r14,1,%r15,%r16
+ <labelk+464>: shladd,vnz %r14,1,%r15,%r16
+ <labelk+468>: shladd,nsv %r14,1,%r15,%r16
+ <labelk+472>: shladd,l %r14,1,%r15,%r16
+ <labelk+476>: shladd,l,nuv %r14,1,%r15,%r16
+ <labelk+480>: shladd,l,znv %r14,1,%r15,%r16
+ <labelk+484>: shladd,l,sv %r14,1,%r15,%r16
+ <labelk+488>: shladd,l,uv %r14,1,%r15,%r16
+ <labelk+492>: shladd,l,vnz %r14,1,%r15,%r16
+ <labelk+496>: shladd,l,nsv %r14,1,%r15,%r16
+ <labelk+500>: shladd,tsv %r14,1,%r15,%r16
+ <labelk+504>: shladd,tsv,nuv %r14,1,%r15,%r16
+ <labelk+508>: shladd,tsv,znv %r14,1,%r15,%r16
+ <labelk+512>: shladd,tsv,sv %r14,1,%r15,%r16
+ <labelk+516>: shladd,tsv,uv %r14,1,%r15,%r16
+ <labelk+520>: shladd,tsv,vnz %r14,1,%r15,%r16
+ <labelk+524>: shladd,tsv,nsv %r14,1,%r15,%r16
+ <labelk+528>: shladd %r14,2,%r15,%r16
+ <labelk+532>: shladd,nuv %r14,2,%r15,%r16
+ <labelk+536>: shladd,znv %r14,2,%r15,%r16
+ <labelk+540>: shladd,sv %r14,2,%r15,%r16
+ <labelk+544>: shladd,uv %r14,2,%r15,%r16
+ <labelk+548>: shladd,vnz %r14,2,%r15,%r16
+ <labelk+552>: shladd,nsv %r14,2,%r15,%r16
+ <labelk+556>: shladd,l %r14,2,%r15,%r16
+ <labelk+560>: shladd,l,nuv %r14,2,%r15,%r16
+ <labelk+564>: shladd,l,znv %r14,2,%r15,%r16
+ <labelk+568>: shladd,l,sv %r14,2,%r15,%r16
+ <labelk+572>: shladd,l,uv %r14,2,%r15,%r16
+ <labelk+576>: shladd,l,vnz %r14,2,%r15,%r16
+ <labelk+580>: shladd,l,nsv %r14,2,%r15,%r16
+ <labelk+584>: shladd,tsv %r14,2,%r15,%r16
+ <labelk+588>: shladd,tsv,nuv %r14,2,%r15,%r16
+ <labelk+592>: shladd,tsv,znv %r14,2,%r15,%r16
+ <labelk+596>: shladd,tsv,sv %r14,2,%r15,%r16
+ <labelk+600>: shladd,tsv,uv %r14,2,%r15,%r16
+ <labelk+604>: shladd,tsv,vnz %r14,2,%r15,%r16
+ <labelk+608>: shladd,tsv,nsv %r14,2,%r15,%r16
+ <labelk+612>: shladd %r14,3,%r15,%r16
+ <labelk+616>: shladd,nuv %r14,3,%r15,%r16
+ <labelk+620>: shladd,znv %r14,3,%r15,%r16
+ <labelk+624>: shladd,sv %r14,3,%r15,%r16
+ <labelk+628>: shladd,uv %r14,3,%r15,%r16
+ <labelk+632>: shladd,vnz %r14,3,%r15,%r16
+ <labelk+636>: shladd,nsv %r14,3,%r15,%r16
+ <labelk+640>: shladd,l %r14,3,%r15,%r16
+ <labelk+644>: shladd,l,nuv %r14,3,%r15,%r16
+ <labelk+648>: shladd,l,znv %r14,3,%r15,%r16
+ <labelk+652>: shladd,l,sv %r14,3,%r15,%r16
+ <labelk+656>: shladd,l,uv %r14,3,%r15,%r16
+ <labelk+660>: shladd,l,vnz %r14,3,%r15,%r16
+ <labelk+664>: shladd,l,nsv %r14,3,%r15,%r16
+ <labelk+668>: shladd,tsv %r14,3,%r15,%r16
+ <labelk+672>: shladd,tsv,nuv %r14,3,%r15,%r16
+ <labelk+676>: shladd,tsv,znv %r14,3,%r15,%r16
+ <labelk+680>: shladd,tsv,sv %r14,3,%r15,%r16
+ <labelk+684>: shladd,tsv,uv %r14,3,%r15,%r16
+ <labelk+688>: shladd,tsv,vnz %r14,3,%r15,%r16
+ <labelk+692>: shladd,tsv,nsv %r14,3,%r15,%r16
+ <labelk+696>: shrpw %r3,%rp,15,%r0
+ <labelk+700>: shrpw,<> %r3,%rp,15,%r0
+ <labelk+704>: shladd %r1,2,%r3,%r6
+ <labelk+708>: shladd,tsv %r1,2,%r3,%r6
+ <labelk+712>: shladd,l %r1,2,%r3,%r6
+ <labelk+716>: shladd,= %r1,2,%r3,%r6
+ <labelk+720>: shladd,< %r1,2,%r3,%r6
+ <labelk+724>: shladd,<= %r1,2,%r3,%r6
+ <labelk+728>: shladd,nuv %r1,2,%r3,%r6
+ <labelk+732>: shladd,znv %r1,2,%r3,%r6
+ <labelk+736>: shladd,sv %r1,2,%r3,%r6
+ <labelk+740>: shladd,od %r1,2,%r3,%r6
+ <labelk+744>: shladd,tr %r1,2,%r3,%r6
+ <labelk+748>: shladd,<> %r1,2,%r3,%r6
+ <labelk+752>: shladd,>= %r1,2,%r3,%r6
+ <labelk+756>: shladd,> %r1,2,%r3,%r6
+ <labelk+760>: shladd,uv %r1,2,%r3,%r6
+ <labelk+764>: shladd,vnz %r1,2,%r3,%r6
+ <labelk+768>: shladd,nsv %r1,2,%r3,%r6
+ <labelk+772>: shladd,ev %r1,2,%r3,%r6
+ <labelk+776>: shrpw %r1,%rp,1,%r3
+ <labelk+780>: spop0,0,0x23
+ <labelk+784>: spop1,3,0x23 %r6
+ <labelk+788>: spop2,3,0x23 %r6
+ <labelk+792>: spop3,3,0x23 %r6,%r7
+ <labelk+796>: ssm 0x7f,%r1
+ <labelk+800>: stb %r0,8(%sr1,%r3)
+ <labelk+804>: stb,bc %r0,8(%sr1,%r3)
+ <labelk+808>: stb,sl %r0,8(%sr1,%r3)
+ <labelk+812>: stb %r0,8(%sr1,%r3)
+ <labelk+816>: stb,bc %r0,8(%sr1,%r3)
+ <labelk+820>: stb,sl %r0,8(%sr1,%r3)
+ <labelk+824>: stby,b %r7,6(%sr1,%sp)
+ <labelk+828>: stby,b %r7,6(%sr1,%sp)
+ <labelk+832>: stby,e %r7,6(%sr1,%sp)
+ <labelk+836>: stby,b,m %r7,6(%sr1,%sp)
+ <labelk+840>: stby,b,bc %r7,6(%sr1,%sp)
+ <labelk+844>: stby,e,sl %r7,6(%sr1,%sp)
+ <labelk+848>: stby,b %r7,6(%sr1,%sp)
+ <labelk+852>: stby,b,m %r7,6(%sr1,%sp)
+ <labelk+856>: stby,e,m %r7,6(%sr1,%sp)
+ <labelk+860>: stby,b,m %r7,6(%sr1,%sp)
+ <labelk+864>: stby,b,bc %r7,6(%sr1,%sp)
+ <labelk+868>: stby,e,sl %r7,6(%sr1,%sp)
+ <labelk+872>: sth %r18,0(%sr3,%ret1)
+ <labelk+876>: sth %r18,0(%sr3,%ret1)
+ <labelk+880>: stw %r17,3(%sr0,%r1)
+ <labelk+884>: stwa %r16,0(%r6)
+ <labelk+888>: stw,ma %r16,0(%sr3,%r6)
+ <labelk+892>: stwa,ma %r16,2(%r6)
+ <labelk+896>: stw %r16,0(%sr0,%r6)
+ <labelk+900>: sub %r1,%r0,%r3
+ <labelk+904>: sub,b %r1,%r0,%r3
+ <labelk+908>: sub,db* %r1,%r0,%r3
+ <labelk+912>: sub,tc %r1,%r0,%r3
+ <labelk+916>: sub,tsv %r1,%r0,%r3
+ <labelk+920>: sub,tsv,tc %r1,%r0,%r3
+ <labelk+924>: sub,tsv,b %r1,%r0,%r3
+ <labelk+928>: sub,tsv,b,< %r1,%r0,%r3
+ <labelk+932>: sub,b %r8,%r9,%r10
+ <labelk+936>: sub,b,<<= %r8,%r9,%r10
+ <labelk+940>: sub,b,>>= %r8,%r9,%r10
+ <labelk+944>: sub,b,nsv %r8,%r9,%r10
+ <labelk+948>: sub,tsv,b %r8,%r9,%r10
+ <labelk+952>: sub,tsv,b,<<= %r8,%r9,%r10
+ <labelk+956>: sub,tsv,b,>>= %r8,%r9,%r10
+ <labelk+960>: sub,tsv,b,nsv %r8,%r9,%r10
+ <labelk+964>: subi 9,%r3,%r5
+ <labelk+968>: subio 2,%r3,%r5
+ <labelk+972>: subio 5,%dp,%r26
+ <labelk+976>: subio,< 5,%dp,%r26
+ <labelk+980>: sub,tsv %r8,%r9,%r10
+ <labelk+984>: sub,tsv,<<= %r8,%r9,%r10
+ <labelk+988>: sub,tsv,>>= %r8,%r9,%r10
+ <labelk+992>: sub,tsv,nsv %r8,%r9,%r10
+ <labelk+996>: sub,tc %r8,%r9,%r10
+ <labelk+1000>: sub,tc,<= %r8,%r9,%r10
+ <labelk+1004>: sub,tc,>= %r8,%r9,%r10
+ <labelk+1008>: sub,tc,nsv %r8,%r9,%r10
+ <labelk+1012>: sub,tsv,tc %r8,%r9,%r10
+ <labelk+1016>: sub,tsv,tc,<<= %r8,%r9,%r10
+ <labelk+1020>: sub,tsv,tc,>>= %r8,%r9,%r10
+ <labelk+1024>: sub,tsv,tc,nsv %r8,%r9,%r10
+ <labelk+1028>: sync
+ <labelk+1032>: syncdma
+ <labelu>: uaddcm %r3,%r4,%r5
+ <labelu+4>: uaddcm,tc %r3,%r4,%r5
+ <labelu+8>: uaddcm,tc %r3,%r4,%r5
+ <labelu+12>: uaddcm,tc,shc %r3,%r4,%r5
+ <labelu+16>: uxor %r19,%r3,%r20
+ <labelu+20>: uxor,shz %r19,%r3,%r20
+ <labelu+24>: depw %r7,%sar,3,%r8
+ <labelu+28>: depw,tr %rp,%sar,3,%r8
+ <labelu+32>: depwi 7,%sar,3,%r8
+ <labelu+36>: depwi,= 2,%sar,3,%r8
+ <labelu+40>: extrw,s %r4,%sar,30,%r4
+ <labelu+44>: extrw,s,< %r4,%sar,30,%r4
+ <labelu+48>: extrw,u %r4,%sar,30,%r4
+ <labelu+52>: extrw,u,>= %r4,%sar,30,%r4
+ <labelu+56>: shrpw %r3,%rp,%sar,%r0
+ <labelu+60>: shrpw,< %r3,%rp,%sar,%r0
+ <labelu+64>: xmpyu %fr3,%fr4,%fr5
+ <labelu+68>: xor %r0,%r1,%rp
+ <labelu+72>: xor,tr %r0,%r1,%rp
+ <labelu+76>: xor,>= %r0,%r1,%rp
+ <labelu+80>: depw,z %r18,1,2,%rp
+ <labelu+84>: depw,z,<> %r18,2,3,%rp
+ <labelu+88>: depwi,z 1,1,2,%rp
+ <labelu+92>: depwi,z,ev 3,2,3,%rp
+ <labelu+96>: depw,z %r18,%sar,30,%rp
+ <labelu+100>: depw,z,< %r18,%sar,8,%rp
+ <labelu+104>: depwi,z 0xf,%sar,30,%rp
+ <labelu+108>: depwi,z,od 8,%sar,8,%rp
Binary files ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20 and gdb/testsuite/gdb.disasm/pa20 differ
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-instr.s gdb/testsuite/gdb.disasm/pa20-instr.s
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-instr.s Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20-instr.s Thu Jul 22 17:49:46 1999
***************
*** 0 ****
--- 1,1028 ----
+ ; assemble as "as -o pa2.exe pa20-instr.s"
+ ; or
+ ; cc -g -o +DA2.0N
+ ;
+ ; PA-RISC assembly-language test program for the debugger.
+ ;
+ ; This test is *not* intended to be executed. Rather, this test serves
+ ; as a comprehensive test for the debugger's PA disassembler.
+ ;
+
+ ; Some instructions are PA1.x, some PA2.0
+
+ .level 2.0
+
+ .code
+ .export main,ENTRY
+ .export mainend,ENTRY
+ .space $TEXT$
+ .subspa $CODE$
+
+ main
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+ labela
+ PDC %r5(0,%r6)
+ PDC,M %r5(%r6)
+ FDC %r5(0,%r6)
+ FDC,M %r5(0,%r6)
+ ;;
+ ;; This gets an assembly error--it may be format in the draft manual only
+ ;; FDC 5(0,%r6)
+
+ FIC %r5(0,%r6)
+ FIC,M %r5(0,%r6)
+
+ FCNV,SGL,DBL %fr4,%fr6
+ ;;
+ ;; I don't know the magic to get the truncate flag to work
+ ;; FCNV,T,DBL,SGL %fr4,%fr6
+
+ FNEG %fr4,%fr6
+ FNEG,SGL %fr4,%fr6
+ FNEG,DBL %fr4,%fr6
+ FNEG,QUAD %fr4,%fr6
+
+ FNEGABS %fr4,%fr6
+ FNEGABS,SGL %fr4,%fr6
+ FNEGABS,DBL %fr4,%fr6
+ FNEGABS,QUAD %fr4,%fr6
+
+ FMPYFADD %fr2,%fr4,%fr6,%fr8
+ FMPYFADD,SGL %fr2,%fr4,%fr6,%fr8
+ FMPYFADD,DBL %fr2,%fr4,%fr6,%fr8
+ FMPYFADD,QUAD %fr2,%fr4,%fr6,%fr8
+
+ FMPYNFADD %fr2,%fr4,%fr6,%fr8
+ FMPYNFADD,SGL %fr2,%fr4,%fr6,%fr8
+ FMPYNFADD,DBL %fr2,%fr4,%fr6,%fr8
+ FMPYNFADD,QUAD %fr2,%fr4,%fr6,%fr8
+
+ FCMP,SGL,true %fr2,%fr4,3
+ FTEST 3
+
+ PMENB
+ PMDIS
+ PMDIS,N
+
+ MTSARCM %r5
+ IDTLBT %r5,%r6
+ IITLBT %r5,%r6
+
+ FLDD 512(%r4),%fr5
+ FLDD,MA 512(%r4),%fr5
+ FLDD,O 0(%r4),%fr5
+
+ FLDW 1024(0,%r4),%fr5
+ FLDW,MA 1024(0,%r4),%fr5
+ FLDW,MB 1024(0,%r4),%fr5
+
+ FSTD %fr5,1024(0,%r4)
+ FSTD,O %fr5,0(0,%r4)
+ FSTD,MA %fr5,1024(0,%r4)
+ FSTD,MB %fr5,1024(0,%r4)
+
+ MIXW %r4,%r5,%r6
+ MIXW,L %r4,%r5,%r6
+ MIXW,R %r4,%r5,%r6
+
+ MIXH %r4,%r5,%r6
+ MIXH,L %r4,%r5,%r6
+ MIXH,R %r4,%r5,%r6
+
+ HADD %r1,%r2,%r3
+ HADD,US %r3,%r4,%r5
+ HADD,SS %r6,%r7,%r8
+
+ HSUB %r1,%r2,%r3
+ HSUB,US %r3,%r4,%r5
+ HSUB,SS %r6,%r7,%r8
+
+ HAVG %r6,%r7,%r8
+
+ HSHLADD %r3,3,%r4,%r5
+ HSHRADD %r3,1,%r4,%r5
+
+ HSHL %r3,11,%r4
+ HSHR %r3,11,%r4
+ HSHR,U %r3,11,%r4
+ HSHR,S %r3,11,%r4
+
+ PERMH,1230 %r1,%r3
+
+ DEPDI 12,%cr11,17,%r3
+ DEPDI,Z 12,%cr11,17,%r3
+ DEPDI,Z,= 12,%cr11,17,%r3
+
+ EXTRD,< %r3,12,13,%r4
+ EXTRD,U,= %r3,%cr11,19,%r4
+
+ BB,< %r9,%cr11,labelc
+ BB,>=,N %r9,31,labelc
+
+ SHRPD,>= %r5,%r6,41,%r7
+ SHRPD,= %r1,%r2,%cr11,%r3
+ SHRPD,OD %r6,%r7,%cr11,%r3
+
+ BVE (%r6)
+ BVE,N (%r6)
+ BVE,L (%r5),%r2
+ BVE,L,PUSH (%r5),%r2
+ BVE,POP (%r5)
+
+ PUSHNOM
+ CLRBTS
+ POPBTS 6
+ PUSHBTS %r4
+
+ LDD %r1(0,%r2),%r3
+ LDD,MA 10(0,%r2),%r3
+ LDD,MB 0(0,%r2),%r3
+ LDD,O 0(0,%r2),%r3
+ LDD,MA,SL 4(0,%r2),%r3
+
+ LDDA %r1(%r2),%r3
+ LDDA,MA 8(%r2),%r3
+ LDDA,MB 0(%r2),%r3
+ LDDA,O 0(%r2),%r3
+ LDDA,MA,SL 8(%r2),%r3
+
+ STD %r1,(0,%r2)
+ STD,MA %r1,10(0,%r2)
+ STD,MB %r1,0(0,%r2)
+ STD,O %r1,0(0,%r2)
+ STD,MA,SL %r1,4(0,%r2)
+
+ STDA %r1,(%r2)
+ STDA,MA %r1,10(%r2)
+ STDA,MB %r1,0(%r2)
+ STDA,O %r1,0(%r2)
+ STDA,MA,SL %r1,4(%r2)
+
+ LDCD %r1(0,%r2),%r3
+ LDCD,M %r1(0,%r2),%r3
+ LDCD,MA 10(0,%r2),%r3
+ LDCD,MB 0(0,%r2),%r3
+ LDCD,O 0(0,%r2),%r3
+ LDCD,MA 4(0,%r2),%r3
+
+ STDBY %r1,5(0,%r2)
+ STDBY,B %r1,5(%r2)
+ STDBY,B,M %r1,5(%r2)
+ STDBY,E,M %r1,5(%r2)
+ STDBY,E %r1,5(%r2)
+
+ LDD %r1(0,%r2),%r3
+ LDD 10(0,%r2),%r3
+ ADD %r1,%r2,%r3
+ ADD,C %r0,%r1,%r2
+ ADD,DC %r0,%r1,%r2
+ ADD,L %r1,%r2,%r3
+ ADD,TSV %r3,%r4,%r5
+ ADD,C,TSV %r3,%r4,%r5
+ ADD,DC,TSV %r3,%r4,%r5
+
+ ADDB,= %r25,%r26,labelb
+ ADDB,=,N %r25,%r26,labelb
+ ADDB,SV %r27,%r28,labela
+ ADDB,OD %r27,%r28,labela
+ ADDB,TR %r27,%r28,labela
+ ADDB,NSV %r27,%r28,labela
+ ADDB,EV %r27,%r28,labela
+ ADDB,<> %r27,%r28,labela
+
+ ADDBF,NUV %r1,%r5,labela
+ ADDBF,<=,N %r10,%r6,labelb
+
+ ADDBT,NUV %r1,%r5,labela
+ ADDBT,<=,N %r10,%r6,labelb
+
+ ADDC %r28,%r29,%r30
+ ADDC,UV %r28,%r29,%r30
+
+ ADDCO %r28,%r29,%r30
+ ADDCO,UV %r28,%r29,%r30
+
+ ADDI 0,%r2,%r0
+ ADDI,> 1,%r3,%r0
+ ADDI,< 2,%r4,%r0
+
+ ADDIB,>= -1,%r5,labela
+ ADDIB,<=,N 10,%r6,labelb
+
+ ADDIBF,NUV -1,%r5,labela
+ ADDIBF,<=,N 10,%r6,labelb
+
+ ADDIBT,NUV -1,%r5,labela
+ ADDIBT,<=,N 10,%r6,labelb
+
+ ADDIL -1,%r3
+ ADDIL 70000,%r3
+
+ ADDIO 4,%r22,%r21
+ ADDIO,< 4,%r22,%r21
+
+ ADDIT 4,%r22,%r21
+ ADDIT,TR 4,%r22,%r21
+
+ ADDITO 934,%r25,%r24
+ ADDITO,<> 1023,%r25,%r24
+
+ ADDO %r28,%r29,%r30
+ ADDO,SV %r28,%r29,%r30
+
+ ADDL %r28,%r29,%r30
+ ADDL,NSV %r28,%r29,%r30
+
+ AND %r30,%r31,%r30
+ AND,< %r30,%r31,%r30
+
+ ANDCM %r26,%r27,%r28
+ ANDCM,> %r26,%r27,%r28
+
+ labelb
+ B labelc
+ B,N labelc
+ B,GATE labelc
+ B,L labelb,%r3
+
+ BB,< %r9,%cr11,labelc
+ BB,>=,N %r9,31,labelc
+
+ BE 100(%sr4,%r11)
+ BE,L 0(%sr4,%r11),%sr0,%r31
+
+ BL labelb,%r3
+ BL,N labelb,%r3
+
+ BLE 12345(%sr0,%r3)
+ BLE,N 12345(%sr0,%r3)
+
+ BLR %r31,%r3
+ BLR,N %r0,%r3
+
+ BREAK 0,1
+ BREAK 31,1000
+
+ BV 0(%r1)
+ BV,N (%r20)
+
+ BVB,< %r3,labela
+ BVB,<,N %r3,labela
+
+ BVE (%r5)
+ BVE,POP (%r5)
+ ; PA2.0 opcodes:
+ BVE,L (%r5),%r2
+ BVE,L,PUSH (%r5),%r2
+
+ labelc
+ CLDDS,0 0(%sr2,%r0),0
+ CLDDS,1,MA 1(%sr2,%r1),2
+ CLDDS,2,MB 9(%sr2,%r6),3
+
+ CLDDX,0 %r3(%sr2,%r10),0
+ CLDDX,0,S %r3(%sr2,%r20),1
+ CLDDX,1,M %r3(%sr2,%r30),2
+ CLDDX,2,SM %r3(%sr2,%r0),3
+
+ CLDWS,0 0(%sr2,%r0),0
+ CLDWS,1,MA 3(%sr2,%r0),2
+ CLDWS,2,MB 7(%sr2,%r0),3
+
+ CLDWX,0 %r3(%sr2,%r0),0
+ CLDWX,0,S %r3(%sr2,%r0),1
+ CLDWX,1,M %r3(%sr2,%r0),2
+ CLDWX,2,SM %r3(%sr2,%r0),3
+
+ CMPB,< %r11,%r12,labelc
+ CMPB,>=,N %r11,%r12,main
+
+ CMPCLR,<> %r2,%r3,%r4
+
+ CMPIB,<= 0,%r2,labeld
+ CMPIB,NSV,N -16,%r2,labeld
+
+ CMPICLR,OD 1000,%r0,%r31
+
+ COMBF,<= %r0,%r2,labeld
+ COMBF,<<,N %r16,%r2,labeld
+
+ COMBT,<= %r0,%r2,labeld
+ COMBT,<<,N %r16,%r2,labeld
+
+ COMCLR %r11,%r12,%r13
+ COMCLR,>= %r11,%r12,%r13
+
+ COMIBF,<= 0,%r2,labeld
+ COMIBF,<<=,N -16,%r2,labeld
+
+ COMIBT,<= 0,%r2,labeld
+ COMIBT,<,N -16,%r2,labeld
+
+ COMICLR 1,%r3,%r4
+ COMICLR,EV 157,%r3,%r4
+
+ COPR,0,0
+ COPR,7,0
+ COPR,7,255
+
+ COPY %r3,%r4
+
+ CSTDS,0 8,0(%sr1,%r31)
+ CSTDS,7,MA 11,2(%sr1,%r3)
+ CSTDS,4,MB 14,2(%sr1,%r3)
+
+ CSTWS,0 8,0(%sr1,%r31)
+ CSTWS,7,MA 11,2(%sr1,%r3)
+ CSTWS,4,MB 14,2(%sr1,%r3)
+
+ labeld
+ DCOR %r3,%r4
+ DCOR,I %r3,%r4
+ DCOR,SBZ %r4,%r5
+ DCOR,SHZ %r4,%r6
+ DCOR,SDC %r4,%r7
+ DCOR,SBC %r4,%r8
+ DCOR,SHC %r4,%r9
+ DCOR,NBZ %r4,%r10
+ DCOR,NHZ %r4,%r11
+ DCOR,NDC %r4,%r12
+ DCOR,NBC %r4,%r13
+ DCOR,NHC %r4,%r14
+
+ DEP %r21,14,3,%r22
+ DEP,>= %r21,14,3,%r22
+
+ DEPI 1,14,3,%r22
+ DEPI,>= 2,14,3,%r22
+
+ DEPW %r19,1,2,%r1
+ DEPW,Z %r19,1,2,%r1
+ DEPW,Z %r19,%cr11,31,%r1
+ DEPW,Z,< %r19,30,1,%r1
+
+ DEPWI 15,0,1,%r2
+ DEPWI,Z -16,0,1,%r2
+
+ DIAG 123456
+
+ DS %r1,%r2,%r3
+ DS,<> %r1,%r2,%r3
+
+ labele
+ EXTRS %r1,3,4,%r2
+ EXTRS,OD %r1,3,4,%r2
+
+ EXTRU %r1,3,4,%r2
+ EXTRU,EV %r1,3,4,%r2
+
+ EXTRW %r0,3,4,%r1
+ EXTRW,S %r0,3,4,%r1
+ EXTRW,U %r0,3,4,%r1
+ EXTRW,U,EV %r0,3,4,%r1
+ EXTRW,<> %r0,%cr11,4,%r1
+
+ labelf
+ FABS,SGL %fr2,%fr3
+ FABS,DBL %fr2,%fr6
+
+ FADD,SGL %fr2,%fr4,%fr6
+ FADD,DBL %fr2,%fr4,%fr6
+
+ FCMP,SGL %fr3,%fr2
+ FCMP,DBL,false %fr3,%fr2
+ FCMP,DBL,? %fr3,%fr2
+ FCMP,DBL,!<=> %fr3,%fr2
+ FCMP,DBL,= %fr3,%fr2
+ FCMP,DBL,=T %fr3,%fr2
+ FCMP,DBL,?= %fr3,%fr2
+ FCMP,DBL,!<> %fr3,%fr2
+ FCMP,DBL,!?>= %fr3,%fr2
+ FCMP,DBL,< %fr3,%fr2
+ FCMP,DBL,?< %fr3,%fr2
+ FCMP,DBL,!>= %fr3,%fr2
+ FCMP,DBL,!?> %fr3,%fr2
+ FCMP,DBL,<= %fr3,%fr2
+ FCMP,DBL,?<= %fr3,%fr2
+ FCMP,DBL,!> %fr3,%fr2
+ FCMP,DBL,!?<= %fr3,%fr2
+ FCMP,DBL,> %fr3,%fr2
+ FCMP,DBL,?> %fr3,%fr2
+ FCMP,DBL,!<= %fr3,%fr2
+ FCMP,DBL,!?< %fr3,%fr2
+ FCMP,DBL,>= %fr3,%fr2
+ FCMP,DBL,?>= %fr3,%fr2
+ FCMP,DBL,!< %fr3,%fr2
+ FCMP,DBL,!?= %fr3,%fr2
+ FCMP,DBL,<> %fr3,%fr2
+ FCMP,DBL,!= %fr3,%fr2
+ FCMP,DBL,!=T %fr3,%fr2
+ FCMP,DBL,!? %fr3,%fr2
+ FCMP,DBL,<=> %fr3,%fr2
+ FCMP,DBL,true? %fr3,%fr2
+ FCMP,DBL,true %fr3,%fr2
+
+ FCNV,SGL,DBL %fr2,%fr4
+ FCNV,SGL,W %fr2,%fr4
+ FCNV,SGL,DW %fr2,%fr4
+ FCNV,SGL,QUAD %fr2,%fr4
+ FCNV,SGL,QW %fr2,%fr4
+ FCNV,W,SGL %fr2,%fr4
+ FCNV,W,DBL %fr2,%fr4
+ FCNV,W,QUAD %fr2,%fr4
+ FCNV,DBL,SGL %fr2,%fr4
+ FCNV,DBL,W %fr2,%fr4
+ FCNV,DBL,QUAD %fr2,%fr4
+ FCNV,DBL,QW %fr2,%fr4
+ FCNV,QUAD,SGL %fr2,%fr6
+ FCNV,QUAD,DBL %fr2,%fr6
+ FCNV,QUAD,W %fr2,%fr6
+ FCNV,QUAD,QW %fr2,%fr6
+ FCNV,QW,SGL %fr2,%fr4
+ FCNV,QW,DBL %fr2,%fr4
+ FCNV,QW,QUAD %fr2,%fr4
+
+ FCNVFXT,DBL %fr3,%fr4
+
+ FCPY,SGL %fr5,%fr6
+ FCPY,DBL %fr5,%fr6
+
+ FDC %r3(0,%r3)
+ FDC,M 0(0,%r4)
+
+ FDCE %r0(%sr3,%r7)
+ FDCE,M %r0(%sr3,%r7)
+
+ FDIV,DBL %fr1,%fr0,%fr2
+
+ FIC %r4(0,%r5)
+ FIC,M %r4(%sr2,%r5)
+
+ FICE %r0(%sr1,%r8)
+ FICE,M %r0(%sr1,%r8)
+
+ DIAG 512
+
+ FID
+
+ FLDD 0(0,%r1),%fr1
+ FLDD,MA 10(0,%r1),%fr1
+ FLDD,MB 0(0,%r1),%fr1
+ FLDD,O 0(0,%r1),%fr1
+ FLDD,MA,SL 4(0,%r1),%fr1
+
+ FLDDS 0(0,%r1),%fr1
+ FLDDS,MA 10(0,%r1),%fr1
+ FLDDS,MB 0(0,%r1),%fr1
+
+ FLDDX 0(0,%r1),%fr1
+ FLDDX,S %r10(0,%r1),%fr1
+ FLDDX,M 0(0,%r1),%fr1
+ FLDDX,SM 0(0,%r1),%fr1
+
+ FLDW %r1(0,%r1),%fr1
+ FLDW,MA 10(0,%r1),%fr1
+ FLDW,MB 0(0,%r1),%fr1
+ FLDW,O 0(0,%r1),%fr1
+ FLDW,MA,SL 4(0,%r1),%fr1
+
+ FLDWS %r1(0,%r1),%fr1
+ FLDWS,MA 10(0,%r1),%fr1
+ FLDWS,MB 0(0,%r1),%fr1
+
+ FLDWX %r1(0,%r1),%fr1
+ FLDWX,S %r10(0,%r1),%fr1
+ FLDWX,M 0(0,%r1),%fr1
+ FLDWX,SM 0(0,%r1),%fr1
+
+ FMPY,SGL %fr6,%fr8,%fr10
+ FMPY,DBL %fr6,%fr8,%fr10
+
+ FMPYADD,SGL %fr16,%fr17,%fr18,%fr19,%fr20
+ FMPYADD,DBL %fr4,%fr7,%fr7,%fr5,%fr6
+
+ FMPYFADD,DBL %fr10,%fr11,%fr12,%fr13
+
+ FMPYNFADD,DBL %fr10,%fr11,%fr12,%fr13
+
+ FMPYSUB,SGL %fr16,%fr17,%fr18,%fr19,%fr30
+
+ ; PA2.0 opcodes:
+ FNEG,DBL %fr10,%fr1
+
+ ; PA2.0 opcodes:
+ FNEGABS,SGL %fr1,%fr1
+
+ FRND,DBL %fr2,%fr3
+
+ FSQRT,SGL %fr16,%fr17
+
+ FSTD %fr3,0(0,%r2)
+ FSTD,MA %fr3,8(0,%r2)
+ FSTD,MB %fr3,0(0,%r2)
+ FSTD,O %fr3,0(0,%r2)
+ FSTD,MA,SL %fr3,4(0,%r2)
+
+ FSTDS %fr3,0(0,%r2)
+ FSTDS,MA %fr3,8(0,%r2)
+ FSTDS,MB %fr3,0(0,%r2)
+
+ FSTDX %fr3,0(0,%r2)
+ FSTDX,S %fr3,%r8(0,%r2)
+ FSTDX,M %fr3,0(0,%r2)
+ FSTDX,SM %fr3,0(0,%r2)
+
+ FSTW %fr3,0(0,%r2)
+ FSTW,MA %fr3,8(0,%r2)
+ FSTW,MB %fr3,0(0,%r2)
+ FSTW,O %fr3,0(0,%r2)
+ FSTW,MA,SL %fr3,4(0,%r2)
+
+ FSTWS %fr3,0(0,%r2)
+ FSTWS,MA %fr3,8(0,%r2)
+ FSTWS,MB %fr3,0(0,%r2)
+
+ FSTWX %fr3,0(0,%r2)
+ FSTWX,S %fr3,%r8(0,%r2)
+ FSTWX,M %fr3,0(0,%r2)
+ FSTWX,SM %fr3,0(0,%r2)
+
+ FSUB,DBL %fr5,%fr2,%fr0
+
+ FTEST
+ FTEST,ACC
+ FTEST,ACC8
+ FTEST,ACC6
+ FTEST,ACC4
+ FTEST,ACC2
+ FTEST,REJ
+ FTEST,REJ8
+
+ labelg
+ GATE labelg,%r3
+ GATE,N labelu,%r3
+
+ labelh
+ ; PA2.0 opcodes:
+ HADD %r2,%r3,%r4
+
+ labeli
+ IDCOR %r4,%r17
+ IDCOR,SBZ %r4,%r17
+ IDCOR,SHZ %r4,%r17
+ IDCOR,SDC %r4,%r17
+ IDCOR,SBC %r4,%r17
+ IDCOR,SHC %r4,%r17
+ IDCOR,TR %r4,%r17
+ IDCOR,NBZ %r4,%r17
+ IDCOR,NHZ %r4,%r17
+ IDCOR,NDC %r4,%r17
+ IDCOR,NBC %r4,%r17
+ IDCOR,NHC %r4,%r17
+
+ ; PA2.0 opcodes:
+ IDTLBT %r1,%r2
+
+ ; IDTLBA %r5,(%sr2,%r4)
+
+ ; IDTLBP %r5,(%sr2,%r4)
+
+ ; PA2.0 opcodes:
+ IITLBT %r2,%r3
+
+ ; IITLBA %r5,(%sr2,%r4)
+
+ ; IITLBP %r5,(%sr2,%r4)
+
+ labelj
+ labelk
+ labell
+ LCI %r0(0,%r1),%r2
+
+ LDB %r1(0,%r1),%r1
+ LDB,MA 10(0,%r1),%r1
+ LDB,MB 0(0,%r1),%r1
+ LDB,O 0(0,%r1),%r1
+ LDB,MA,SL 4(0,%r1),%r1
+
+ LDBS %r1(0,%r1),%r1
+ LDBS,MA 10(0,%r1),%r1
+ LDBS,MB 0(0,%r1),%r1
+ LDBS,O 0(0,%r1),%r1
+ LDBS,MA,SL 4(0,%r1),%r1
+
+ LDBX %r1(0,%r1),%r1
+ LDBX,S %r10(0,%r1),%r1
+ LDBX,M 0(0,%r1),%r1
+ LDBX,SM 0(0,%r1),%r1
+
+ ; PA2.0 opcodes:
+ LDCD 0(0,%r1),%r1
+
+ LDCW %r1(0,%r1),%r1
+ LDCW,MA 10(0,%r1),%r1
+ LDCW,MB 0(0,%r1),%r1
+ LDCW,O 0(0,%r1),%r1
+ LDCW,MA,CO 4(0,%r1),%r1
+
+ LDCWS %r1(0,%r1),%r1
+ LDCWS,MA 10(0,%r1),%r1
+ LDCWS,MB 0(0,%r1),%r1
+ LDCWS,O 0(0,%r1),%r1
+ LDCWS,MA,CO 4(0,%r1),%r1
+
+ LDCWX %r1(0,%r1),%r1
+ LDCWX,S %r3(0,%r1),%r1
+ LDCWX,M 0(0,%r1),%r1
+ LDCWX,SM 0(0,%r1),%r1
+
+ LDH %r1(0,%r1),%r1
+ LDH,MA 10(0,%r1),%r1
+ LDH,MB 0(0,%r1),%r1
+ LDH,O 0(0,%r1),%r1
+ LDH,MA,SL 4(0,%r1),%r1
+
+ LDHS %r1(0,%r1),%r1
+ LDHS,MA 10(0,%r1),%r1
+ LDHS,MB 0(0,%r1),%r1
+ LDHS,O 0(0,%r1),%r1
+ LDHS,MA,SL 4(0,%r1),%r1
+
+ LDHX %r1(0,%r1),%r1
+ LDHX,S %r10(0,%r1),%r1
+ LDHX,M 0(0,%r1),%r1
+ LDHX,SM 0(0,%r1),%r1
+
+ LDIL 23456,%r6
+
+ LDO 100(%r3),%r20
+
+ LDSID (0,%r0),%r3
+
+ LDW %r1(0,%r1),%r1
+ LDW,MA 10(0,%r1),%r1
+ LDW,MB 0(0,%r1),%r1
+ LDW,O 0(0,%r1),%r1
+ LDW,MA,SL 4(0,%r1),%r1
+
+ LDWA %r1(%r3),%r2
+ LDWA,MA 8(%r3),%r2
+ LDWA,MB 0(%r3),%r2
+ LDWA,O 0(%r3),%r2
+ LDWA,MA,SL 8(%r3),%r2
+
+ LDWAS %r1(%r3),%r2
+ LDWAS,MA 8(%r3),%r2
+ LDWAS,MB 0(%r3),%r2
+ LDWAS,O 0(%r3),%r2
+ LDWAS,MA,SL 8(%r3),%r2
+
+ LDWAX %r1(%r3),%r2
+ LDWAX,S %r8(%r3),%r2
+ LDWAX,M 0(%r3),%r2
+ LDWAX,SM 0(%r3),%r2
+
+ LDWM 8(%sr1,%r3),%r4
+
+ LDWS %r1(0,%r1),%r1
+ LDWS,MA 10(0,%r1),%r1
+ LDWS,MB 0(0,%r1),%r1
+ LDWS,O 0(0,%r1),%r1
+ LDWS,MA,SL 4(0,%r1),%r1
+
+ LDWX %r1(%r3),%r2
+ LDWX,S %r8(%r3),%r2
+ LDWX,M 0(%r3),%r2
+ LDWX,SM 0(%r3),%r2
+
+ LPA %r0(0,%r3),%r19
+ LPA,M %r0(%sr2,%r3),%r19
+
+ labelm
+ MFCTL %cr0,%r4
+ MFCTL %cr12,%r4
+
+ ; PA2.0 opcodes:
+ MFIA %r25
+
+ MFSP %sr4,%r29
+
+ ; PA2.0 opcodes:
+ MIXH,L %r1,%r2,%r3
+
+ MOVB %r1,%r2,labelk
+ MOVB,N %r1,%r2,labelj
+ MOVB,>=,N %r1,%r2,labela
+
+ MOVIB 15,%r3,main
+ MOVIB,< 15,%r3,main
+ MOVIB,<>,N 15,%r3,main
+
+ MTCTL %r0,%cr17
+
+ MTSAR %r3
+
+ ; PA2.0 opcodes:
+ MTSARCM %r7
+
+ MTSM %r2
+
+ MTSP %r19,%sr3
+
+ labeln
+ NOP
+
+ labelo
+ OR %r1,%r0,%r3
+ OR,EV %r1,%r0,%r3
+
+ labelp
+ PDC %r0(0,%r1)
+ PDC,M %r0(0,%r1)
+
+ PDTLB %r8(%sr2,%r2)
+ PDTLB,M %r8(%sr2,%r2)
+ ; PA2.0 opcodes:
+ PDTLB,L %r8(%sr2,%r2)
+ PDTLB,L,M %r8(%sr2,%r2)
+
+ PDTLBE %r4(%sr1,%r21)
+ PDTLBE,M %r4(%sr1,%r21)
+
+ PITLB %r6(%sr0,%r30)
+ PITLB,M %r6(%sr0,%r30)
+
+ PITLBE %r6(%sr0,%r30)
+ PITLBE,M %r6(%sr0,%r30)
+
+ PROBE,R (%sr0,%r26),%r0,%r30
+ PROBE,W (%sr0,%r26),%r0,%r30
+
+ PROBEI,R (%sr0,%r26),10,%r30
+ PROBEI,W (%sr0,%r26),7,%r30
+
+ labelq
+ labelr
+ RFI
+ RFI,R
+
+ RFIR
+
+ RSM 31,%r24
+
+ labels
+ SH1ADD %r14,%r15,%r16
+ SH1ADD,NUV %r14,%r15,%r16
+ SH1ADD,ZNV %r14,%r15,%r16
+ SH1ADD,SV %r14,%r15,%r16
+ SH1ADD,UV %r14,%r15,%r16
+ SH1ADD,VNZ %r14,%r15,%r16
+ SH1ADD,NSV %r14,%r15,%r16
+
+ SH1ADDL %r14,%r15,%r16
+ SH1ADDL,NUV %r14,%r15,%r16
+ SH1ADDL,ZNV %r14,%r15,%r16
+ SH1ADDL,SV %r14,%r15,%r16
+ SH1ADDL,UV %r14,%r15,%r16
+ SH1ADDL,VNZ %r14,%r15,%r16
+ SH1ADDL,NSV %r14,%r15,%r16
+
+ SH1ADDO %r14,%r15,%r16
+ SH1ADDO,NUV %r14,%r15,%r16
+ SH1ADDO,ZNV %r14,%r15,%r16
+ SH1ADDO,SV %r14,%r15,%r16
+ SH1ADDO,UV %r14,%r15,%r16
+ SH1ADDO,VNZ %r14,%r15,%r16
+ SH1ADDO,NSV %r14,%r15,%r16
+
+ SH2ADD %r14,%r15,%r16
+ SH2ADD,NUV %r14,%r15,%r16
+ SH2ADD,ZNV %r14,%r15,%r16
+ SH2ADD,SV %r14,%r15,%r16
+ SH2ADD,UV %r14,%r15,%r16
+ SH2ADD,VNZ %r14,%r15,%r16
+ SH2ADD,NSV %r14,%r15,%r16
+
+ SH2ADDL %r14,%r15,%r16
+ SH2ADDL,NUV %r14,%r15,%r16
+ SH2ADDL,ZNV %r14,%r15,%r16
+ SH2ADDL,SV %r14,%r15,%r16
+ SH2ADDL,UV %r14,%r15,%r16
+ SH2ADDL,VNZ %r14,%r15,%r16
+ SH2ADDL,NSV %r14,%r15,%r16
+
+ SH2ADDO %r14,%r15,%r16
+ SH2ADDO,NUV %r14,%r15,%r16
+ SH2ADDO,ZNV %r14,%r15,%r16
+ SH2ADDO,SV %r14,%r15,%r16
+ SH2ADDO,UV %r14,%r15,%r16
+ SH2ADDO,VNZ %r14,%r15,%r16
+ SH2ADDO,NSV %r14,%r15,%r16
+
+ SH3ADD %r14,%r15,%r16
+ SH3ADD,NUV %r14,%r15,%r16
+ SH3ADD,ZNV %r14,%r15,%r16
+ SH3ADD,SV %r14,%r15,%r16
+ SH3ADD,UV %r14,%r15,%r16
+ SH3ADD,VNZ %r14,%r15,%r16
+ SH3ADD,NSV %r14,%r15,%r16
+
+ SH3ADDL %r14,%r15,%r16
+ SH3ADDL,NUV %r14,%r15,%r16
+ SH3ADDL,ZNV %r14,%r15,%r16
+ SH3ADDL,SV %r14,%r15,%r16
+ SH3ADDL,UV %r14,%r15,%r16
+ SH3ADDL,VNZ %r14,%r15,%r16
+ SH3ADDL,NSV %r14,%r15,%r16
+
+ SH3ADDO %r14,%r15,%r16
+ SH3ADDO,NUV %r14,%r15,%r16
+ SH3ADDO,ZNV %r14,%r15,%r16
+ SH3ADDO,SV %r14,%r15,%r16
+ SH3ADDO,UV %r14,%r15,%r16
+ SH3ADDO,VNZ %r14,%r15,%r16
+ SH3ADDO,NSV %r14,%r15,%r16
+
+ SHD %r3,%r2,15,%r0
+ SHD,<> %r3,%r2,15,%r0
+
+ SHLADD %r1,2,%r3,%r6
+ SHLADD,TSV %r1,2,%r3,%r6
+ SHLADD,L %r1,2,%r3,%r6
+ SHLADD,= %r1,2,%r3,%r6
+ SHLADD,< %r1,2,%r3,%r6
+ SHLADD,<= %r1,2,%r3,%r6
+ SHLADD,NUV %r1,2,%r3,%r6
+ SHLADD,ZNV %r1,2,%r3,%r6
+ SHLADD,SV %r1,2,%r3,%r6
+ SHLADD,OD %r1,2,%r3,%r6
+ SHLADD,TR %r1,2,%r3,%r6
+ SHLADD,<> %r1,2,%r3,%r6
+ SHLADD,>= %r1,2,%r3,%r6
+ SHLADD,> %r1,2,%r3,%r6
+ SHLADD,UV %r1,2,%r3,%r6
+ SHLADD,VNZ %r1,2,%r3,%r6
+ SHLADD,NSV %r1,2,%r3,%r6
+ SHLADD,EV %r1,2,%r3,%r6
+
+ SHRPW %r1,%r2,1,%r3
+
+ SPOP0,0,35
+
+ SPOP1,3,35 %r6
+
+ SPOP2,3,35 %r6
+
+ SPOP3,3,35 %r6,%r7
+
+ SSM 127,%r1
+
+ STB %r0,8(%sr1,%r3)
+ STB,BC %r0,8(%sr1,%r3)
+ STB,SL %r0,8(%sr1,%r3)
+
+ STBS %r0,8(%sr1,%r3)
+ STBS,BC %r0,8(%sr1,%r3)
+ STBS,SL %r0,8(%sr1,%r3)
+
+ STBY %r7,6(%sr1,%r30)
+ STBY,B %r7,6(%sr1,%r30)
+ STBY,E %r7,6(%sr1,%r30)
+ STBY,M %r7,6(%sr1,%r30)
+ STBY,B,BC %r7,6(%sr1,%r30)
+ STBY,E,SL %r7,6(%sr1,%r30)
+
+ STBYS %r7,6(%sr1,%r30)
+ STBYS,B,M %r7,6(%sr1,%r30)
+ STBYS,E,M %r7,6(%sr1,%r30)
+ STBYS,M %r7,6(%sr1,%r30)
+ STBYS,B,BC %r7,6(%sr1,%r30)
+ STBYS,E,SL %r7,6(%sr1,%r30)
+
+ ; PA2.0 opcodes:
+ STD %r18,0(%sr3,%r29)
+
+ STH %r18,0(%sr3,%r29)
+
+ STHS %r18,0(%sr3,%r29)
+
+ STW %r17,3(0,%r1)
+
+ STWA %r16,0(%r6)
+
+ STWM %r16,0(%sr3,%r6)
+
+ STWAS,MA %r16,2(%r6)
+
+ STWS %r16,0(%r6)
+
+ SUB %r1,%r0,%r3
+ SUB,B %r1,%r0,%r3
+ SUB,DB %r1,%r0,%r3
+ SUB,TC %r1,%r0,%r3
+ SUB,TSV %r1,%r0,%r3
+ SUB,TSV,TC %r1,%r0,%r3
+ SUB,B,TSV %r1,%r0,%r3
+ SUB,B,TSV,< %r1,%r0,%r3
+
+ SUBB %r8,%r9,%r10
+ SUBB,<<= %r8,%r9,%r10
+ SUBB,>>= %r8,%r9,%r10
+ SUBB,NSV %r8,%r9,%r10
+
+ SUBBO %r8,%r9,%r10
+ SUBBO,<<= %r8,%r9,%r10
+ SUBBO,>>= %r8,%r9,%r10
+ SUBBO,NSV %r8,%r9,%r10
+
+ SUBI 9,%r3,%r5
+ SUBI,TSV 2,%r3,%r5
+
+ SUBIO 5,%r27,%r26
+ SUBIO,< 5,%r27,%r26
+
+ SUBO %r8,%r9,%r10
+ SUBO,<<= %r8,%r9,%r10
+ SUBO,>>= %r8,%r9,%r10
+ SUBO,NSV %r8,%r9,%r10
+
+ SUBT %r8,%r9,%r10
+ SUBT,<= %r8,%r9,%r10
+ SUBT,>= %r8,%r9,%r10
+ SUBT,NSV %r8,%r9,%r10
+
+ SUBTO %r8,%r9,%r10
+ SUBTO,<<= %r8,%r9,%r10
+ SUBTO,>>= %r8,%r9,%r10
+ SUBTO,NSV %r8,%r9,%r10
+
+ SYNC
+
+ SYNCDMA
+
+ labelt
+ labelu
+ UADDCM %r3,%r4,%r5
+ UADDCM,TC %r3,%r4,%r5
+
+ UADDCMT %r3,%r4,%r5
+ UADDCMT,SHC %r3,%r4,%r5
+
+ UXOR %r19,%r3,%r20
+ UXOR,SHZ %r19,%r3,%r20
+
+ labelv
+ VDEP %r7,3,%r8
+ VDEP,TR %r2,3,%r8
+
+ VDEPI 7,3,%r8
+ VDEPI,= 2,3,%r8
+
+ VEXTRS %r4,30,%r4
+ VEXTRS,< %r4,30,%r4
+
+ VEXTRU %r4,30,%r4
+ VEXTRU,>= %r4,30,%r4
+
+ VSHD %r3,%r2,%r0
+ VSHD,< %r3,%r2,%r0
+
+ labelw
+ labelx
+ XMPYU %fr3,%fr4,%fr5
+
+ XOR %r0,%r1,%r2
+ XOR,TR %r0,%r1,%r2
+ XOR,>= %r0,%r1,%r2
+
+ labely
+ labelz
+ ZDEP %r18,1,2,%r2
+ ZDEP,<> %r18,2,3,%r2
+
+ ZDEPI 1,1,2,%r2
+ ZDEPI,EV 3,2,3,%r2
+
+ ZVDEP %r18,30,%r2
+ ZVDEP,< %r18,8,%r2
+
+ ZVDEPI 15,30,%r2
+ ZVDEPI,OD 8,8,%r2
+
+ .exit
+ .procend
+
+ mainend
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+ NOP
+
+ .exit
+ .procend
+
+ .end
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-long.c gdb/testsuite/gdb.disasm/pa20-long.c
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-long.c Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20-long.c Thu Jul 22 17:49:46 1999
***************
*** 0 ****
--- 1,18 ----
+
+ #include <stdlib.h>
+
+ int sub1()
+ {
+ return 8;
+ }
+
+ main()
+ {
+ int i;
+
+ i = sub1();
+ if (i)
+ i = sub1();
+
+ return i;
+ }
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-long.exp gdb/testsuite/gdb.disasm/pa20-long.exp
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-long.exp Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20-long.exp Thu Jul 22 17:49:46 1999
***************
*** 0 ****
--- 1,42 ----
+ # pa20-long.exp Test that addresses longer than 32 bits are printed
+ # This test exposes a particular problem where addresses
+ # larger than 32 bits were not being printed correctly.
+ #
+ if ![istarget "hppa2.0w*-*-*"] {
+ verbose "Tests ignored for all but hppa2.0w based targets."
+ return
+ }
+
+ if $tracelevel {
+ strace $tracelevel
+ }
+
+ set prms_id 0
+ set bug_id 0
+
+ # use this to debug:
+ #log_user 1
+
+ set testfile pa20-long
+ set srcfile ${srcdir}/${subdir}/pa20-long.c
+ set binfile ${objdir}/${subdir}/${testfile}
+
+ set comp_output [gdb_compile "${srcfile}" "${binfile}" executable ""];
+ if { $comp_output != "" } {
+ if [ regexp "Opcode not defined - DIAG" $comp_output] {
+ warning "HP assembler in use--skipping disasm tests"
+ return
+ } else {
+ perror "Couldn't compile ${srcfile}"
+ return -1
+ }
+ }
+
+ gdb_exit
+ gdb_start
+ gdb_reinitialize_dir $srcdir/$subdir
+ gdb_load ${binfile}
+
+ gdb_test "disassemble main" ".*b,l 0x4............... <sub1>,%r2.*"
+
+ return 0
Binary files ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2 and gdb/testsuite/gdb.disasm/pa20-t2 differ
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.com gdb/testsuite/gdb.disasm/pa20-t2.com
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.com Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20-t2.com Thu Jul 22 17:49:47 1999
***************
*** 0 ****
--- 1,3 ----
+ set height 0
+ set width 0
+ x/1213i main
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.exp gdb/testsuite/gdb.disasm/pa20-t2.exp
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.exp Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20-t2.exp Thu Jul 22 17:49:47 1999
***************
*** 0 ****
--- 1,104 ----
+ # pa20-t2.exp Tests gdb disassembly operations for PA2.0 code
+ #
+ if ![istarget "hppa*-*-*"] {
+ verbose "Tests ignored for all but hppa based targets."
+ return
+ }
+ if [istarget "hppa2.0w-*-*"] {
+ verbose "Tests ignored for hppa2.0w*."
+ return
+ }
+
+ if $tracelevel {
+ strace $tracelevel
+ }
+
+ gdb_exit
+
+ set prms_id 0
+ set bug_id 0
+
+ #
+ # use this to debug:
+ #log_user 1
+
+ set testfile pa20-t2
+ set srcfile ${srcdir}/${subdir}/pa20-t2.s
+ set binfile ${srcdir}/${subdir}/${testfile}
+ set outfile ${srcdir}/${subdir}/${testfile}.out
+ set comfile ${srcdir}/${subdir}/${testfile}.com
+ set tmpfile ${objdir}/${subdir}/${testfile}.tmp
+ set tmp2file ${objdir}/${subdir}/${testfile}.tmp2
+ set diffile ${objdir}/${subdir}/${testfile}.dif
+ set sedfile ${srcdir}/${subdir}/pa-sed.cmd
+
+ # To build a pa 2.0 executable
+ #
+ # as -o pa20 pa20-t2.s
+ # or
+ # cc -g -o pa20 pa20-t2.s
+ #
+ # The +DA2.0N flag doesn't seem to be needed.
+ #
+ # Don't reject if there are warnings, as we expect this warning:
+ #
+ # (Warning) At least one PA 2.0 object file (pa20-t2.o) was detected.
+ # The linked output may not run on a PA 1.x system.
+ #
+ # and this one:
+ #
+ # /CLO/BUILD_ENV/usr/ccs/bin/ld: Unsatisfied symbols:
+ # test (code)
+ # Short (code)
+ #
+ # It's ok, we don't care. However, since we don't want addresses
+ # and the like to change, unless the binary file is deleted, we want
+ # to use the old one. So it's an element.
+ #
+ # if ![file exists $binfile] then {
+ # compile "${srcfile} -g -o ${binfile}"
+ # }
+
+ remote_exec build "rm -f ${tmpfile} ${tmp2file} ${diffile}"
+
+
+ # This non-standard start-up sequence is taken from that for
+ # the standard "gdb_start" in
+ # /CLO/Components/WDB/Src/gdb/gdb/testsuite/lib/gdb.exp
+ #
+ # We use a non-standard form because we want to pass a command file.
+ # Incidentially, this causes passing a command file to be tested
+ # by implication.
+ #
+ global GDB
+ if { [which $GDB] == 0 } {
+ perror "$GDB does not exist."
+ exit 1
+ }
+
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmpfile} $GDB -n -batch -silent -se ${binfile} -x ${comfile}"
+
+ # Remove actual addresses, which may vary.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmp2file} sed -f ${sedfile} ${tmpfile} "
+
+ # Should be no differences.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${diffile} diff ${outfile} ${tmp2file} "
+ set exec_output [remote_exec build "wc -l ${diffile}"]
+ remote_exec build "echo exec_output is ${exec_output}"
+
+ if [ regexp "^0 \{0 ${diffile}.*" ${exec_output} ] {
+ pass "Disassembly"
+ } else {
+ if [ regexp "^26 ${diffile}" ${exec_output} ] {
+ setup_xfail hppa*-*-* CHFts23204
+ fail "Disassembly"
+ } else {
+ fail "Disassembly"
+ }
+ }
+
+ remote_exec build "rm -f ${binfile}.ci"
+
+ return 0
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.out gdb/testsuite/gdb.disasm/pa20-t2.out
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.out Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20-t2.out Thu Jul 22 17:49:48 1999
***************
*** 0 ****
--- 1,1213 ----
+ <main>: ssm 1,%r1
+ <main+4>: rsm 2,%r1
+ <main+8>: ssm 4,%r1
+ <main+12>: rsm 8,%r1
+ <main+16>: ssm 0x10,%r1
+ <main+20>: rsm 0x20,%r1
+ <main+24>: ssm 0x40,%r1
+ <main+28>: rsm 0x80,%r1
+ <main+32>: ssm 0x100,%r1
+ <main+36>: rsm 0x200,%r1
+ <main+40>: ssm 0x3ff,%r1
+ <main+44>: rsm 0,%r1
+ <main+48>: depw,<> %r14,%sar,20,%r7
+ <main+52>: depw %r14,%sar,20,%r7
+ <main+56>: depwi,<> 0xe,%sar,20,%r7
+ <main+60>: depwi 0xe,%sar,20,%r7
+ <main+64>: extrw,s,<> %r14,%sar,20,%r7
+ <main+68>: extrw,s %r14,%sar,20,%r7
+ <main+72>: extrd,s,<> %r14,%sar,20,%r7
+ <main+76>: extrd,s,<> %r14,%sar,20,%r7
+ <main+80>: extrd,s %r14,%sar,20,%r7
+ <CLDST>: b <CLDST>
+ <CLDST+4>: fldd,s,sl %r5(%sr2,%r6),%fr6
+ <CLDST+8>: cldd,1,ma,sl 8(%sr2,%r7),7
+ <CLDST+12>: cldd,2,m %r8(%sr3,%r9),8
+ <CLDST+16>: cldd,3,mb -8(%sr0,%r10),9
+ <CLDST+20>: cldd,4,sl %r11(%sr0,%r12),10
+ <CLDST+24>: cldd,5,sl 0(%sr0,%r13),11
+ <CLDST+28>: cldd,6 %r14(%sr0,%r15),12
+ <CLDST+32>: cldd,7 8(%sr0,%r15),13
+ <CLDST+36>: fldw,s,sl %r5(%sr2,%r6),%fr14
+ <CLDST+40>: fldw,ma,sl 8(%sr2,%r7),%fr15R
+ <CLDST+44>: cldw,2,m %r8(%sr3,%r9),16
+ <CLDST+48>: cldw,3,mb -8(%sr0,%r10),17
+ <CLDST+52>: cldw,4,sl %r11(%sr0,%r12),18
+ <CLDST+56>: cldw,5,sl 0(%sr0,%r13),19
+ <CLDST+60>: cldw,6 %r14(%sr0,%r15),20
+ <CLDST+64>: cldw,7 8(%sr0,%r15),21
+ <CLDST+68>: fstd,s,sl %fr6,%r5(%sr2,%r6)
+ <CLDST+72>: cstd,1,ma,sl 7,8(%sr2,%r7)
+ <CLDST+76>: cstd,2,m 8,%r8(%sr3,%r9)
+ <CLDST+80>: cstd,3,mb 9,-8(%sr0,%r10)
+ <CLDST+84>: cstd,4,bc 10,%r11(%sr0,%r12)
+ <CLDST+88>: cstd,5,sl 11,0(%sr0,%r13)
+ <CLDST+92>: cstd,6 12,%r14(%sr0,%r15)
+ <CLDST+96>: cstd,7 13,8(%sr0,%r15)
+ <CLDST+100>: fstw,s,sl %fr14,%r5(%sr2,%r6)
+ <CLDST+104>: fstw,ma,sl %fr15R,8(%sr2,%r7)
+ <CLDST+108>: cstw,2,m 16,%r8(%sr3,%r9)
+ <CLDST+112>: cstw,3,mb 17,-8(%sr0,%r10)
+ <CLDST+116>: cstw,4,sl 18,%r11(%sr0,%r12)
+ <CLDST+120>: cstw,5,bc 19,0(%sr0,%r13)
+ <CLDST+124>: cstw,6 20,%r14(%sr0,%r15)
+ <CLDST+128>: cstw,7 21,8(%sr0,%r15)
+ <LDtest>: b <LDtest>
+ <LDtest+4>: ldd -0x18(%sr0,%r12),%r31
+ <LDtest+8>: ldd -0x10(%sr0,%r12),%r31
+ <LDtest+12>: ldd -8(%sr0,%r12),%r31
+ <LDtest+16>: ldd 0(%sr0,%r12),%r31
+ <LDtest+20>: ldd 0(%sr0,%r12),%r31
+ <LDtest+24>: ldd %r6(%sr0,%r12),%r31
+ <LDtest+28>: ldd 8(%sr0,%r12),%r31
+ <LDtest+32>: ldd 0x10(%sr0,%r12),%r31
+ <LDtest+36>: ldd 0x18(%sr0,%r12),%r31
+ <LDtest+40>: ldw -0x18(%sr0,%r12),%r31
+ <LDtest+44>: ldw -0x10(%sr0,%r12),%r31
+ <LDtest+48>: ldw -8(%sr0,%r12),%r31
+ <LDtest+52>: ldw 0(%sr0,%r12),%r31
+ <LDtest+56>: ldw 0(%sr0,%r12),%r31
+ <LDtest+60>: ldw %r6(%sr0,%r12),%r31
+ <LDtest+64>: ldw 8(%sr0,%r12),%r31
+ <LDtest+68>: ldw 0x10(%sr0,%r12),%r31
+ <LDtest+72>: ldw 0x18(%sr0,%r12),%r31
+ <LDtest+76>: ldh -0x18(%sr0,%r12),%r31
+ <LDtest+80>: ldh -0x10(%sr0,%r12),%r31
+ <LDtest+84>: ldh -8(%sr0,%r12),%r31
+ <LDtest+88>: ldh 0(%sr0,%r12),%r31
+ <LDtest+92>: ldh 0(%sr0,%r12),%r31
+ <LDtest+96>: ldh %r6(%sr0,%r12),%r31
+ <LDtest+100>: ldh 8(%sr0,%r12),%r31
+ <LDtest+104>: ldh 0x10(%sr0,%r12),%r31
+ <LDtest+108>: ldh 0x18(%sr0,%r12),%r31
+ <LDtest+112>: ldb -0x18(%sr0,%r12),%r31
+ <LDtest+116>: ldb -0x10(%sr0,%r12),%r31
+ <LDtest+120>: ldb -8(%sr0,%r12),%r31
+ <LDtest+124>: ldb 0(%sr0,%r12),%r31
+ <LDtest+128>: ldb 0(%sr0,%r12),%r31
+ <LDtest+132>: ldb %r6(%sr0,%r12),%r31
+ <LDtest+136>: ldb 8(%sr0,%r12),%r31
+ <LDtest+140>: ldb 0x10(%sr0,%r12),%r31
+ <LDtest+144>: ldb 0x18(%sr0,%r12),%r31
+ <LDtest+148>: ldda -0x10(%r12),%r31
+ <LDtest+152>: ldda -8(%r12),%r31
+ <LDtest+156>: ldda 0(%r12),%r31
+ <LDtest+160>: ldda 0(%r12),%r31
+ <LDtest+164>: ldda %r6(%r12),%r31
+ <LDtest+168>: ldda 8(%r12),%r31
+ <LDtest+172>: ldwa -0x10(%r12),%r31
+ <LDtest+176>: ldwa -8(%r12),%r31
+ <LDtest+180>: ldwa 0(%r12),%r31
+ <LDtest+184>: ldwa 0(%r12),%r31
+ <LDtest+188>: ldwa %r6(%r12),%r31
+ <LDtest+192>: ldwa 8(%r12),%r31
+ <LDtest+196>: ldcd -0x10(%sr0,%r12),%r31
+ <LDtest+200>: ldcd -8(%sr0,%r12),%r31
+ <LDtest+204>: ldcd 0(%sr0,%r12),%r31
+ <LDtest+208>: ldcd 0(%sr0,%r12),%r31
+ <LDtest+212>: ldcd %r6(%sr0,%r12),%r31
+ <LDtest+216>: ldcd 8(%sr0,%r12),%r31
+ <LDtest+220>: ldcw -0x10(%sr0,%r12),%r31
+ <LDtest+224>: ldcw -8(%sr0,%r12),%r31
+ <LDtest+228>: ldcw 0(%sr0,%r12),%r31
+ <LDtest+232>: ldcw 0(%sr0,%r12),%r31
+ <LDtest+236>: ldcw %r6(%sr0,%r12),%r31
+ <LDtest+240>: ldcw 8(%sr0,%r12),%r31
+ <LDtest_with_MA>: b <LDtest_with_MA>
+ <LDtest_with_MA+4>: ldd,ma -0x18(%sr0,%r12),%r31
+ <LDtest_with_MA+8>: ldd,ma -0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+12>: ldd,ma -8(%sr0,%r12),%r31
+ <LDtest_with_MA+16>: ldd,ma 8(%sr0,%r12),%r31
+ <LDtest_with_MA+20>: ldd,ma 0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+24>: ldd,ma 0x18(%sr0,%r12),%r31
+ <LDtest_with_MA+28>: ldw -0x18(%sr0,%r12),%r31
+ <LDtest_with_MA+32>: ldw,ma -0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+36>: ldw,ma -8(%sr0,%r12),%r31
+ <LDtest_with_MA+40>: ldw,ma 8(%sr0,%r12),%r31
+ <LDtest_with_MA+44>: ldw,ma 0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+48>: ldw,ma 0x18(%sr0,%r12),%r31
+ <LDtest_with_MA+52>: ldh,ma -0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+56>: ldh,ma -8(%sr0,%r12),%r31
+ <LDtest_with_MA+60>: ldh,ma 8(%sr0,%r12),%r31
+ <LDtest_with_MA+64>: ldb,ma -0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+68>: ldb,ma -8(%sr0,%r12),%r31
+ <LDtest_with_MA+72>: ldb,ma 8(%sr0,%r12),%r31
+ <LDtest_with_MA+76>: ldda,ma -0x10(%r12),%r31
+ <LDtest_with_MA+80>: ldda,ma -8(%r12),%r31
+ <LDtest_with_MA+84>: ldda,ma 8(%r12),%r31
+ <LDtest_with_MA+88>: ldwa,ma -0x10(%r12),%r31
+ <LDtest_with_MA+92>: ldwa,ma -8(%r12),%r31
+ <LDtest_with_MA+96>: ldwa,ma 8(%r12),%r31
+ <LDtest_with_MA+100>: ldcd,ma -0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+104>: ldcd,ma -8(%sr0,%r12),%r31
+ <LDtest_with_MA+108>: ldcd,ma 8(%sr0,%r12),%r31
+ <LDtest_with_MA+112>: ldcw,ma -0x10(%sr0,%r12),%r31
+ <LDtest_with_MA+116>: ldcw,ma -8(%sr0,%r12),%r31
+ <LDtest_with_MA+120>: ldcw,ma 8(%sr0,%r12),%r31
+ <LDtest_with_MB>: b <LDtest_with_MB>
+ <LDtest_with_MB+4>: ldd,mb -0x18(%sr0,%r12),%r31
+ <LDtest_with_MB+8>: ldd,mb -0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+12>: ldd,mb -8(%sr0,%r12),%r31
+ <LDtest_with_MB+16>: ldd,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+20>: ldd,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+24>: ldd,mb 8(%sr0,%r12),%r31
+ <LDtest_with_MB+28>: ldd,mb 0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+32>: ldd,mb 0x18(%sr0,%r12),%r31
+ <LDtest_with_MB+36>: ldw,ma -0x18(%sr0,%r12),%r31
+ <LDtest_with_MB+40>: ldw,mb -0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+44>: ldw,mb -8(%sr0,%r12),%r31
+ <LDtest_with_MB+48>: ldw,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+52>: ldw,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+56>: ldw,mb 8(%sr0,%r12),%r31
+ <LDtest_with_MB+60>: ldw 0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+64>: ldw 0x18(%sr0,%r12),%r31
+ <LDtest_with_MB+68>: ldh,mb -0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+72>: ldh,mb -8(%sr0,%r12),%r31
+ <LDtest_with_MB+76>: ldh,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+80>: ldh,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+84>: ldh,mb 8(%sr0,%r12),%r31
+ <LDtest_with_MB+88>: ldb,mb -0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+92>: ldb,mb -8(%sr0,%r12),%r31
+ <LDtest_with_MB+96>: ldb,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+100>: ldb,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+104>: ldb,mb 8(%sr0,%r12),%r31
+ <LDtest_with_MB+108>: ldda,mb -0x10(%r12),%r31
+ <LDtest_with_MB+112>: ldda,mb -8(%r12),%r31
+ <LDtest_with_MB+116>: ldda,mb 0(%r12),%r31
+ <LDtest_with_MB+120>: ldda,mb 0(%r12),%r31
+ <LDtest_with_MB+124>: ldda,mb 8(%r12),%r31
+ <LDtest_with_MB+128>: ldwa,mb -0x10(%r12),%r31
+ <LDtest_with_MB+132>: ldwa,mb -8(%r12),%r31
+ <LDtest_with_MB+136>: ldwa,mb 0(%r12),%r31
+ <LDtest_with_MB+140>: ldwa,mb 0(%r12),%r31
+ <LDtest_with_MB+144>: ldwa,mb 8(%r12),%r31
+ <LDtest_with_MB+148>: ldcd,mb -0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+152>: ldcd,mb -8(%sr0,%r12),%r31
+ <LDtest_with_MB+156>: ldcd,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+160>: ldcd,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+164>: ldcd,mb 8(%sr0,%r12),%r31
+ <LDtest_with_MB+168>: ldcw,mb -0x10(%sr0,%r12),%r31
+ <LDtest_with_MB+172>: ldcw,mb -8(%sr0,%r12),%r31
+ <LDtest_with_MB+176>: ldcw,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+180>: ldcw,mb 0(%sr0,%r12),%r31
+ <LDtest_with_MB+184>: ldcw,mb 8(%sr0,%r12),%r31
+ <LDtest_with_O>: b <LDtest_with_O>
+ <LDtest_with_O+4>: ldd,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+8>: ldd,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+12>: ldw,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+16>: ldw,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+20>: ldh,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+24>: ldh,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+28>: ldb,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+32>: ldb,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+36>: ldda,o 0(%r12),%r31
+ <LDtest_with_O+40>: ldda,o 0(%r12),%r31
+ <LDtest_with_O+44>: ldwa,o 0(%r12),%r31
+ <LDtest_with_O+48>: ldwa,o 0(%r12),%r31
+ <LDtest_with_O+52>: ldcd,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+56>: ldcd,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+60>: ldcw,o 0(%sr0,%r12),%r31
+ <LDtest_with_O+64>: ldcw,o 0(%sr0,%r12),%r31
+ <STtest>: b <STtest>
+ <STtest+4>: std %r31,-0x18(%sr0,%r12)
+ <STtest+8>: std %r31,-0x10(%sr0,%r12)
+ <STtest+12>: std %r31,-8(%sr0,%r12)
+ <STtest+16>: std %r31,0(%sr0,%r12)
+ <STtest+20>: std %r31,0(%sr0,%r12)
+ <STtest+24>: std %r31,8(%sr0,%r12)
+ <STtest+28>: std %r31,0x10(%sr0,%r12)
+ <STtest+32>: std %r31,0x18(%sr0,%r12)
+ <STtest+36>: stw %r31,-0x18(%sr0,%r12)
+ <STtest+40>: stw %r31,-0x10(%sr0,%r12)
+ <STtest+44>: stw %r31,-8(%sr0,%r12)
+ <STtest+48>: stw %r31,0(%sr0,%r12)
+ <STtest+52>: stw %r31,0(%sr0,%r12)
+ <STtest+56>: stw %r31,8(%sr0,%r12)
+ <STtest+60>: stw %r31,0x10(%sr0,%r12)
+ <STtest+64>: stw %r31,0x18(%sr0,%r12)
+ <STtest+68>: sth %r31,-0x18(%sr0,%r12)
+ <STtest+72>: sth %r31,-0x10(%sr0,%r12)
+ <STtest+76>: sth %r31,-8(%sr0,%r12)
+ <STtest+80>: sth %r31,0(%sr0,%r12)
+ <STtest+84>: sth %r31,0(%sr0,%r12)
+ <STtest+88>: sth %r31,8(%sr0,%r12)
+ <STtest+92>: sth %r31,0x10(%sr0,%r12)
+ <STtest+96>: sth %r31,0x18(%sr0,%r12)
+ <STtest+100>: stb %r31,-0x18(%sr0,%r12)
+ <STtest+104>: stb %r31,-0x10(%sr0,%r12)
+ <STtest+108>: stb %r31,-8(%sr0,%r12)
+ <STtest+112>: stb %r31,0(%sr0,%r12)
+ <STtest+116>: stb %r31,0(%sr0,%r12)
+ <STtest+120>: stb %r31,8(%sr0,%r12)
+ <STtest+124>: stb %r31,0x10(%sr0,%r12)
+ <STtest+128>: stb %r31,0x18(%sr0,%r12)
+ <STtest+132>: stda %r31,-0x10(%r12)
+ <STtest+136>: stda %r31,-8(%r12)
+ <STtest+140>: stda %r31,0(%r12)
+ <STtest+144>: stda %r31,0(%r12)
+ <STtest+148>: stda %r31,8(%r12)
+ <STtest+152>: stwa %r31,-0x10(%r12)
+ <STtest+156>: stwa %r31,-8(%r12)
+ <STtest+160>: stwa %r31,0(%r12)
+ <STtest+164>: stwa %r31,0(%r12)
+ <STtest+168>: stwa %r31,8(%r12)
+ <STtest+172>: stdby,b %r31,-0x10(%sr0,%r12)
+ <STtest+176>: stdby,b %r31,-8(%sr0,%r12)
+ <STtest+180>: stdby,b %r31,0(%sr0,%r12)
+ <STtest+184>: stdby,b %r31,0(%sr0,%r12)
+ <STtest+188>: stdby,b %r31,8(%sr0,%r12)
+ <STtest+192>: stby,b %r31,-0x10(%sr0,%r12)
+ <STtest+196>: stby,b %r31,-8(%sr0,%r12)
+ <STtest+200>: stby,b %r31,0(%sr0,%r12)
+ <STtest+204>: stby,b %r31,0(%sr0,%r12)
+ <STtest+208>: stby,b %r31,8(%sr0,%r12)
+ <STtest_with_MA>: b <STtest_with_MA>
+ <STtest_with_MA+4>: std,ma %r31,-0x18(%sr0,%r12)
+ <STtest_with_MA+8>: std,ma %r31,-0x10(%sr0,%r12)
+ <STtest_with_MA+12>: std,ma %r31,-8(%sr0,%r12)
+ <STtest_with_MA+16>: std,ma %r31,8(%sr0,%r12)
+ <STtest_with_MA+20>: std,ma %r31,0x10(%sr0,%r12)
+ <STtest_with_MA+24>: std,ma %r31,0x18(%sr0,%r12)
+ <STtest_with_MA+28>: stw -0x18(%sr0,%r12),%r31
+ <STtest_with_MA+32>: stw,ma %r31,-0x10(%sr0,%r12)
+ <STtest_with_MA+36>: stw,ma %r31,-8(%sr0,%r12)
+ <STtest_with_MA+40>: stw,ma %r31,8(%sr0,%r12)
+ <STtest_with_MA+44>: stw,ma %r31,0x10(%sr0,%r12)
+ <STtest_with_MA+48>: stw,ma %r31,0x18(%sr0,%r12)
+ <STtest_with_MA+52>: sth,ma %r31,-0x10(%sr0,%r12)
+ <STtest_with_MA+56>: sth,ma %r31,-8(%sr0,%r12)
+ <STtest_with_MA+60>: sth,ma %r31,8(%sr0,%r12)
+ <STtest_with_MA+64>: stb,ma %r31,-0x10(%sr0,%r12)
+ <STtest_with_MA+68>: stb,ma %r31,-8(%sr0,%r12)
+ <STtest_with_MA+72>: stb,ma %r31,8(%sr0,%r12)
+ <STtest_with_MA+76>: stda,ma %r31,-0x10(%r12)
+ <STtest_with_MA+80>: stda,ma %r31,-8(%r12)
+ <STtest_with_MA+84>: stda,ma %r31,8(%r12)
+ <STtest_with_MA+88>: stwa,ma %r31,-0x10(%r12)
+ <STtest_with_MA+92>: stwa,ma %r31,-8(%r12)
+ <STtest_with_MA+96>: stwa,ma %r31,8(%r12)
+ <STtest_with_MB>: b <STtest_with_MB>
+ <STtest_with_MB+4>: std,mb %r31,-0x18(%sr0,%r12)
+ <STtest_with_MB+8>: std,mb %r31,-0x10(%sr0,%r12)
+ <STtest_with_MB+12>: std,mb %r31,-8(%sr0,%r12)
+ <STtest_with_MB+16>: std,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+20>: std,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+24>: std,mb %r31,8(%sr0,%r12)
+ <STtest_with_MB+28>: std,mb %r31,0x10(%sr0,%r12)
+ <STtest_with_MB+32>: std,mb %r31,0x18(%sr0,%r12)
+ <STtest_with_MB+36>: stw,ma %r31,-0x18(%sr0,%r12)
+ <STtest_with_MB+40>: stw,mb %r31,-0x10(%sr0,%r12)
+ <STtest_with_MB+44>: stw,mb %r31,-8(%sr0,%r12)
+ <STtest_with_MB+48>: stw,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+52>: stw,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+56>: stw,mb %r31,8(%sr0,%r12)
+ <STtest_with_MB+60>: stw 0x10(%sr0,%r12),%r31
+ <STtest_with_MB+64>: stw 0x18(%sr0,%r12),%r31
+ <STtest_with_MB+68>: sth,mb %r31,-0x10(%sr0,%r12)
+ <STtest_with_MB+72>: sth,mb %r31,-8(%sr0,%r12)
+ <STtest_with_MB+76>: sth,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+80>: sth,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+84>: sth,mb %r31,8(%sr0,%r12)
+ <STtest_with_MB+88>: stb,mb %r31,-0x10(%sr0,%r12)
+ <STtest_with_MB+92>: stb,mb %r31,-8(%sr0,%r12)
+ <STtest_with_MB+96>: stb,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+100>: stb,mb %r31,0(%sr0,%r12)
+ <STtest_with_MB+104>: stb,mb %r31,8(%sr0,%r12)
+ <STtest_with_MB+108>: stda,mb %r31,-0x10(%r12)
+ <STtest_with_MB+112>: stda,mb %r31,-8(%r12)
+ <STtest_with_MB+116>: stda,mb %r31,0(%r12)
+ <STtest_with_MB+120>: stda,mb %r31,0(%r12)
+ <STtest_with_MB+124>: stda,mb %r31,8(%r12)
+ <STtest_with_MB+128>: stwa,mb %r31,-0x10(%r12)
+ <STtest_with_MB+132>: stwa,mb %r31,-8(%r12)
+ <STtest_with_MB+136>: stwa,mb %r31,0(%r12)
+ <STtest_with_MB+140>: stwa,mb %r31,0(%r12)
+ <STtest_with_MB+144>: stwa,mb %r31,8(%r12)
+ <STtest_with_O>: b <STtest_with_O>
+ <STtest_with_O+4>: std,o %r31,0(%sr0,%r12)
+ <STtest_with_O+8>: std,o %r31,0(%sr0,%r12)
+ <STtest_with_O+12>: stw,o %r31,0(%sr0,%r12)
+ <STtest_with_O+16>: stw,o %r31,0(%sr0,%r12)
+ <STtest_with_O+20>: sth,o %r31,0(%sr0,%r12)
+ <STtest_with_O+24>: sth,o %r31,0(%sr0,%r12)
+ <STtest_with_O+28>: stb,o %r31,0(%sr0,%r12)
+ <STtest_with_O+32>: stb,o %r31,0(%sr0,%r12)
+ <STtest_with_O+36>: stda,o %r31,0(%r12)
+ <STtest_with_O+40>: stda,o %r31,0(%r12)
+ <STtest_with_O+44>: stwa,o %r31,0(%r12)
+ <STtest_with_O+48>: stwa,o %r31,0(%r12)
+ <FLDtest>: b <FLDtest>
+ <FLDtest+4>: fldd -0x18(%sr0,%r12),%fr8
+ <FLDtest+8>: fldd -0x10(%sr0,%r12),%fr8
+ <FLDtest+12>: fldd -8(%sr0,%r12),%fr8
+ <FLDtest+16>: fldd 0(%sr0,%r12),%fr8
+ <FLDtest+20>: fldd 0(%sr0,%r12),%fr8
+ <FLDtest+24>: fldd %r6(%sr0,%r12),%fr8
+ <FLDtest+28>: fldd 8(%sr0,%r12),%fr8
+ <FLDtest+32>: fldd 0x10(%sr0,%r12),%fr8
+ <FLDtest+36>: fldd 0x18(%sr0,%r12),%fr8
+ <FLDtest+40>: fldw -0x18(%sr0,%r12),%fr8
+ <FLDtest+44>: fldw -0x10(%sr0,%r12),%fr8
+ <FLDtest+48>: fldw -8(%sr0,%r12),%fr8
+ <FLDtest+52>: fldw 0(%sr0,%r12),%fr8
+ <FLDtest+56>: fldw 0(%sr0,%r12),%fr8
+ <FLDtest+60>: fldw %r6(%sr0,%r12),%fr8
+ <FLDtest+64>: fldw 8(%sr0,%r12),%fr8
+ <FLDtest+68>: fldw 0x10(%sr0,%r12),%fr8
+ <FLDtest+72>: fldw 0x18(%sr0,%r12),%fr8
+ <FLDtest+76>: b <FLDtest>
+ <FLDtest+80>: fldd,ma -0x18(%sr0,%r12),%fr8
+ <FLDtest+84>: fldd,ma -0x10(%sr0,%r12),%fr8
+ <FLDtest+88>: fldd,ma -8(%sr0,%r12),%fr8
+ <FLDtest+92>: fldd,ma 8(%sr0,%r12),%fr8
+ <FLDtest+96>: fldd,ma 0x10(%sr0,%r12),%fr8
+ <FLDtest+100>: fldd,ma 0x18(%sr0,%r12),%fr8
+ <FLDtest+104>: fldw,ma -0x18(%sr0,%r12),%fr8
+ <FLDtest+108>: fldw,ma -0x10(%sr0,%r12),%fr8
+ <FLDtest+112>: fldw,ma -8(%sr0,%r12),%fr8
+ <FLDtest+116>: fldw,ma 8(%sr0,%r12),%fr8
+ <FLDtest+120>: fldw,ma 0x10(%sr0,%r12),%fr8
+ <FLDtest+124>: fldw,ma 0x18(%sr0,%r12),%fr8
+ <FLDtest+128>: b <FLDtest>
+ <FLDtest+132>: fldd,mb -0x18(%sr0,%r12),%fr8
+ <FLDtest+136>: fldd,mb -0x10(%sr0,%r12),%fr8
+ <FLDtest+140>: fldd,mb -8(%sr0,%r12),%fr8
+ <FLDtest+144>: fldd,mb 0(%sr0,%r12),%fr8
+ <FLDtest+148>: fldd,mb 0(%sr0,%r12),%fr8
+ <FLDtest+152>: fldd,mb 8(%sr0,%r12),%fr8
+ <FLDtest+156>: fldd,mb 0x10(%sr0,%r12),%fr8
+ <FLDtest+160>: fldd,mb 0x18(%sr0,%r12),%fr8
+ <FLDtest+164>: fldw,mb -0x18(%sr0,%r12),%fr8
+ <FLDtest+168>: fldw,mb -0x10(%sr0,%r12),%fr8
+ <FLDtest+172>: fldw,mb -8(%sr0,%r12),%fr8
+ <FLDtest+176>: fldw,mb 0(%sr0,%r12),%fr8
+ <FLDtest+180>: fldw,mb 0(%sr0,%r12),%fr8
+ <FLDtest+184>: fldw,mb 8(%sr0,%r12),%fr8
+ <FLDtest+188>: fldw,mb 0x10(%sr0,%r12),%fr8
+ <FLDtest+192>: fldw,mb 0x18(%sr0,%r12),%fr8
+ <FLDtest_with_O>: b <FLDtest_with_O>
+ <FLDtest_with_O+4>: fldd,o 0(%sr0,%r12),%fr8
+ <FLDtest_with_O+8>: fldd,o 0(%sr0,%r12),%fr8
+ <FLDtest_with_O+12>: fldw,o 0(%sr0,%r12),%fr8
+ <FLDtest_with_O+16>: fldw,o 0(%sr0,%r12),%fr8
+ <FSTtest>: b <FSTtest>
+ <FSTtest+4>: fstd %fr8,-0x18(%sr0,%r12)
+ <FSTtest+8>: fstd %fr8,-0x10(%sr0,%r12)
+ <FSTtest+12>: fstd %fr8,-8(%sr0,%r12)
+ <FSTtest+16>: fstd %fr8,0(%sr0,%r12)
+ <FSTtest+20>: fstd %fr8,0(%sr0,%r12)
+ <FSTtest+24>: fstd %fr8,%r6(%sr0,%r12)
+ <FSTtest+28>: fstd %fr8,8(%sr0,%r12)
+ <FSTtest+32>: fstd %fr8,0x10(%sr0,%r12)
+ <FSTtest+36>: fstd %fr8,0x18(%sr0,%r12)
+ <FSTtest+40>: fstw %fr8,-0x18(%sr0,%r12)
+ <FSTtest+44>: fstw %fr8,-0x10(%sr0,%r12)
+ <FSTtest+48>: fstw %fr8,-8(%sr0,%r12)
+ <FSTtest+52>: fstw %fr8,0(%sr0,%r12)
+ <FSTtest+56>: fstw %fr8,0(%sr0,%r12)
+ <FSTtest+60>: fstw %fr8,%r6(%sr0,%r12)
+ <FSTtest+64>: fstw %fr8,8(%sr0,%r12)
+ <FSTtest+68>: fstw %fr8,0x10(%sr0,%r12)
+ <FSTtest+72>: fstw %fr8,0x18(%sr0,%r12)
+ <FSTtest_with_MA>: b <FSTtest_with_MA>
+ <FSTtest_with_MA+4>: fstd,ma %fr8,-0x18(%sr0,%r12)
+ <FSTtest_with_MA+8>: fstd,ma %fr8,-0x10(%sr0,%r12)
+ <FSTtest_with_MA+12>: fstd,ma %fr8,-8(%sr0,%r12)
+ <FSTtest_with_MA+16>: fstd,ma %fr8,8(%sr0,%r12)
+ <FSTtest_with_MA+20>: fstd,ma %fr8,0x10(%sr0,%r12)
+ <FSTtest_with_MA+24>: fstd,ma %fr8,0x18(%sr0,%r12)
+ <FSTtest_with_MA+28>: fstw,ma %fr8,-0x18(%sr0,%r12)
+ <FSTtest_with_MA+32>: fstw,ma %fr8,-0x10(%sr0,%r12)
+ <FSTtest_with_MA+36>: fstw,ma %fr8,-8(%sr0,%r12)
+ <FSTtest_with_MA+40>: fstw,ma %fr8,8(%sr0,%r12)
+ <FSTtest_with_MA+44>: fstw,ma %fr8,0x10(%sr0,%r12)
+ <FSTtest_with_MA+48>: fstw,ma %fr8,0x18(%sr0,%r12)
+ <FSTtest_with_MB>: b <FSTtest_with_MB>
+ <FSTtest_with_MB+4>: fstd,mb %fr8,-0x18(%sr0,%r12)
+ <FSTtest_with_MB+8>: fstd,mb %fr8,-0x10(%sr0,%r12)
+ <FSTtest_with_MB+12>: fstd,mb %fr8,-8(%sr0,%r12)
+ <FSTtest_with_MB+16>: fstd,mb %fr8,0(%sr0,%r12)
+ <FSTtest_with_MB+20>: fstd,mb %fr8,0(%sr0,%r12)
+ <FSTtest_with_MB+24>: fstd,mb %fr8,8(%sr0,%r12)
+ <FSTtest_with_MB+28>: fstd,mb %fr8,0x10(%sr0,%r12)
+ <FSTtest_with_MB+32>: fstd,mb %fr8,0x18(%sr0,%r12)
+ <FSTtest_with_MB+36>: fstw,mb %fr8,-0x18(%sr0,%r12)
+ <FSTtest_with_MB+40>: fstw,mb %fr8,-0x10(%sr0,%r12)
+ <FSTtest_with_MB+44>: fstw,mb %fr8,-8(%sr0,%r12)
+ <FSTtest_with_MB+48>: fstw,mb %fr8,0(%sr0,%r12)
+ <FSTtest_with_MB+52>: fstw,mb %fr8,0(%sr0,%r12)
+ <FSTtest_with_MB+56>: fstw,mb %fr8,8(%sr0,%r12)
+ <FSTtest_with_MB+60>: fstw,mb %fr8,0x10(%sr0,%r12)
+ <FSTtest_with_MB+64>: fstw,mb %fr8,0x18(%sr0,%r12)
+ <FSTtest_with_O>: b <FSTtest_with_O>
+ <FSTtest_with_O+4>: fstd,o %fr8,0(%sr0,%r12)
+ <FSTtest_with_O+8>: fstd,o %fr8,0(%sr0,%r12)
+ <FSTtest_with_O+12>: fstw,o %fr8,0(%sr0,%r12)
+ <FSTtest_with_O+16>: fstw,o %fr8,0(%sr0,%r12)
+ <FSTtest_with_O+20>: b <FCNVtest>
+ <FCNVtest>: fcnv,sgl,w %fr4,%fr5
+ <FCNVtest+4>: fcnv,sgl,w %fr4,%fr5R
+ <FCNVtest+8>: fcnv,sgl,w %fr4R,%fr5
+ <FCNVtest+12>: fcnv,sgl,w %fr4R,%fr5R
+ <FCNVtest+16>: fcnv,sgl,uw %fr4,%fr5
+ <FCNVtest+20>: fcnv,sgl,uw %fr4,%fr5R
+ <FCNVtest+24>: fcnv,sgl,uw %fr4R,%fr5
+ <FCNVtest+28>: fcnv,sgl,uw %fr4R,%fr5R
+ <FCNVtest+32>: fcnv,sgl,dbl %fr4,%fr5
+ <FCNVtest+36>: fcnv,sgl,dbl %fr4R,%fr5
+ <FCNVtest+40>: fcnv,sgl,dw %fr4,%fr5
+ <FCNVtest+44>: fcnv,sgl,dw %fr4R,%fr5
+ <FCNVtest+48>: fcnv,sgl,udw %fr4,%fr5
+ <FCNVtest+52>: fcnv,sgl,udw %fr4R,%fr5
+ <FCNVtest+56>: fcnv,sgl,quad %fr4,%fr5
+ <FCNVtest+60>: fcnv,sgl,qw %fr4,%fr5
+ <FCNVtest+64>: fcnv,sgl,uqw %fr4,%fr5
+ <FCNVtest+68>: fcnv,w,sgl %fr4,%fr5
+ <FCNVtest+72>: fcnv,w,sgl %fr4,%fr5R
+ <FCNVtest+76>: fcnv,w,sgl %fr4R,%fr5
+ <FCNVtest+80>: fcnv,w,sgl %fr4R,%fr5R
+ <FCNVtest+84>: fcnv,w,dbl %fr4,%fr5
+ <FCNVtest+88>: fcnv,w,dbl %fr4R,%fr5
+ <FCNVtest+92>: fcnv,w,quad %fr4,%fr5
+ <FCNVtest+96>: fcnv,uw,sgl %fr4,%fr5
+ <FCNVtest+100>: fcnv,uw,sgl %fr4,%fr5R
+ <FCNVtest+104>: fcnv,uw,sgl %fr4R,%fr5
+ <FCNVtest+108>: fcnv,uw,sgl %fr4R,%fr5R
+ <FCNVtest+112>: fcnv,uw,dbl %fr4,%fr5
+ <FCNVtest+116>: fcnv,uw,dbl %fr4R,%fr5
+ <FCNVtest+120>: fcnv,uw,quad %fr4,%fr5
+ <FCNVtest+124>: fcnv,dbl,sgl %fr4,%fr5
+ <FCNVtest+128>: fcnv,dlb,sgl %fr4,%fr5R
+ <FCNVtest+132>: fcnv,dbl,w %fr4,%fr5
+ <FCNVtest+136>: fcnv,dbl,w %fr4,%fr5R
+ <FCNVtest+140>: fcnv,dbl,uw %fr4,%fr5
+ <FCNVtest+144>: fcnv,dbl,uw %fr4,%fr5R
+ <FCNVtest+148>: fcnv,dbl,dw %fr4,%fr5
+ <FCNVtest+152>: fcnv,dbl,udw %fr4,%fr5
+ <FCNVtest+156>: fcnv,dbl,quad %fr4,%fr5
+ <FCNVtest+160>: fcnv,dbl,qw %fr4,%fr5
+ <FCNVtest+164>: fcnv,dbl,uqw %fr4,%fr5
+ <FCNVtest+168>: fcnv,dw,sgl %fr4,%fr5
+ <FCNVtest+172>: fcnv,dw,sgl %fr4,%fr5R
+ <FCNVtest+176>: fcnv,dw,dbl %fr4,%fr5
+ <FCNVtest+180>: fcnv,dw,quad %fr4,%fr5
+ <FCNVtest+184>: fcnv,udw,sgl %fr4,%fr5
+ <FCNVtest+188>: fcnv,udw,sgl %fr4,%fr5R
+ <FCNVtest+192>: fcnv,udw,dbl %fr4,%fr5
+ <FCNVtest+196>: fcnv,udw,quad %fr4,%fr5
+ <FCNVtest+200>: fcnv,quad,sgl %fr4,%fr5
+ <FCNVtest+204>: fcnv,quad,w %fr4,%fr5
+ <FCNVtest+208>: fcnv,quad,uw %fr4,%fr5
+ <FCNVtest+212>: fcnv,quad,dbl %fr4,%fr5
+ <FCNVtest+216>: fcnv,quad,dw %fr4,%fr5
+ <FCNVtest+220>: fcnv,quad,udw %fr4,%fr5
+ <FCNVtest+224>: fcnv,quad,qw %fr4,%fr5
+ <FCNVtest+228>: fcnv,quad,uqw %fr4,%fr5
+ <FCNVtest+232>: fcnv,qw,sgl %fr4,%fr5
+ <FCNVtest+236>: fcnv,qw,dbl %fr4,%fr5
+ <FCNVtest+240>: fcnv,qw,quad %fr4,%fr5
+ <FCNVtest+244>: fcnv,uqw,sgl %fr4,%fr5
+ <FCNVtest+248>: fcnv,uqw,dbl %fr4,%fr5
+ <FCNVtest+252>: fcnv,uqw,quad %fr4,%fr5
+ <FCNVtest+256>: b <FCNV_with_T>
+ <FCNV_with_T>: fcnv,t,sgl,w %fr4,%fr5
+ <FCNV_with_T+4>: fcnv,t,sgl,w %fr4,%fr5R
+ <FCNV_with_T+8>: fcnv,t,sgl,w %fr4R,%fr5
+ <FCNV_with_T+12>: fcnv,t,sgl,w %fr4R,%fr5R
+ <FCNV_with_T+16>: fcnv,t,sgl,uw %fr4,%fr5
+ <FCNV_with_T+20>: fcnv,t,sgl,uw %fr4,%fr5R
+ <FCNV_with_T+24>: fcnv,t,sgl,uw %fr4R,%fr5
+ <FCNV_with_T+28>: fcnv,t,sgl,uw %fr4R,%fr5R
+ <FCNV_with_T+32>: fcnv,t,sgl,dw %fr4,%fr5
+ <FCNV_with_T+36>: fcnv,t,sgl,dw %fr4R,%fr5
+ <FCNV_with_T+40>: fcnv,t,sgl,udw %fr4,%fr5
+ <FCNV_with_T+44>: fcnv,t,sgl,udw %fr4R,%fr5
+ <FCNV_with_T+48>: fcnv,t,sgl,qw %fr4,%fr5
+ <FCNV_with_T+52>: fcnv,t,sgl,uqw %fr4,%fr5
+ <FCNV_with_T+56>: fcnv,t,dbl,w %fr4,%fr5
+ <FCNV_with_T+60>: fcnv,t,dbl,w %fr4,%fr5R
+ <FCNV_with_T+64>: fcnv,t,dbl,uw %fr4,%fr5
+ <FCNV_with_T+68>: fcnv,t,dbl,uw %fr4,%fr5R
+ <FCNV_with_T+72>: fcnv,t,dbl,dw %fr4,%fr5
+ <FCNV_with_T+76>: fcnv,t,dbl,udw %fr4,%fr5
+ <FCNV_with_T+80>: fcnv,t,dbl,qw %fr4,%fr5
+ <FCNV_with_T+84>: fcnv,t,dbl,uqw %fr4,%fr5
+ <FCNV_with_T+88>: fcnv,t,quad,w %fr4,%fr5
+ <FCNV_with_T+92>: fcnv,t,quad,uw %fr4,%fr5
+ <FCNV_with_T+96>: fcnv,t,quad,dw %fr4,%fr5
+ <FCNV_with_T+100>: fcnv,t,quad,udw %fr4,%fr5
+ <FCNV_with_T+104>: fcnv,t,quad,qw %fr4,%fr5
+ <FCNV_with_T+108>: fcnv,t,quad,uqw %fr4,%fr5
+ <FCNV_with_T+112>: b <BBWtest>
+ <BBWtest>: bb,< %r8,0,<BBWtest>
+ <BBWtest+4>: bb,< %r8,1,<BBWtest>
+ <BBWtest+8>: bb,<,n %r8,0x1e,<BBWtest>
+ <BBWtest+12>: bb,>=,n %r8,0x1f,<BBWtest>
+ <BBWtest+16>: bb,< %r8,%sar,<BBWtest>
+ <BBWtest+20>: bb,>= %r8,%sar,<BBWtest>
+ <BBWtest+24>: bb,<,n %r8,%sar,<BBWtest>
+ <BBWtest+28>: bb,>=,n %r8,%sar,<BBWtest>
+ <BBWtest+32>: b <BBWtest>
+ <BBDtest>: bb,od %r8,0,<BBDtest>
+ <BBDtest+4>: bb,ev %r8,1,<BBDtest>
+ <BBDtest+8>: bb,od,n %r8,0x1e,<BBDtest>
+ <BBDtest+12>: bb,od,n %r8,0x1f,<BBDtest>
+ <BBDtest+16>: bb,>=,n %r8,0,<BBDtest>
+ <BBDtest+20>: bb,>=,n %r8,1,<BBDtest>
+ <BBDtest+24>: bb,<,n %rp,0x1c,<BBDtest>
+ <BBDtest+28>: bb,<,n %r8,0x1e,<BBDtest>
+ <BBDtest+32>: bb,>=,n %r8,0x1f,<BBDtest>
+ <BBDtest+36>: bb,od %r8,%sar,<BBDtest>
+ <BBDtest+40>: bb,ev %r8,%sar,<BBDtest>
+ <BBDtest+44>: bb,od,n %r8,%sar,<BBDtest>
+ <BBDtest+48>: bb,ev,n %r8,%sar,<BBDtest>
+ <BBDtest+52>: b <systst>
+ <systst>: rfi
+ <systst+4>: rfi,r
+ <systst+8>: probe,r (%sr2,%r9),%r8,%r7
+ <systst+12>: probe,w (%sr2,%r9),%r8,%r7
+ <systst+16>: probei,r (%sr2,%r9),0xa,%r7
+ <systst+20>: probei,w (%sr2,%r9),0xa,%r7
+ <systst+24>: lpa %r3(%sr0,%r31),%r8
+ <systst+28>: lpa,m %r3(%sr0,%r31),%r8
+ <systst+32>: pdtlb %r5(%sr2,%r9)
+ <systst+36>: pdtlb,l %r5(%sr2,%r9)
+ <systst+40>: pitlb %r5(%sr2,%r9)
+ <systst+44>: pitlb,l %r5(%sr2,%r9)
+ <systst+48>: pdtlb,m %r5(%sr2,%r9)
+ <systst+52>: pdtlb,l,m %r5(%sr2,%r9)
+ <systst+56>: pdtlb,l,m %r5(%sr2,%r9)
+ <systst+60>: pitlb,m %r5(%sr2,%r9)
+ <systst+64>: pitlb,l,m %r5(%sr2,%r9)
+ <systst+68>: pitlb,l,m %r5(%sr2,%r9)
+ <systst+72>: pdtlbe %r5(%sr0,%r9)
+ <systst+76>: pdtlbe,m %r5(%sr0,%r9)
+ <systst+80>: fic %r5(%sr0,%r9)
+ <systst+84>: fic %r5(%sr2,%r9)
+ <systst+88>: fic %r5(%sr2,%r9)
+ <systst+92>: idtlbt %r5,%r9
+ <systst+96>: iitlbt %r5,%r9
+ <systst+100>: b <DShifts>
+ <DShifts>: shrpd %r9,%r10,4,%r10
+ <DShifts+4>: shrpd %r9,%r10,%sar,%r10
+ <DShifts+8>: extrd,s %r9,8,4,%r10
+ <DShifts+12>: extrd,u %r9,8,4,%r10
+ <DShifts+16>: extrd,s %r9,8,4,%r10
+ <DShifts+20>: extrd,s %r9,%sar,8,%r10
+ <DShifts+24>: extrd,u %r9,%sar,8,%r10
+ <DShifts+28>: extrd,s %r9,%sar,8,%r10
+ <DShifts+32>: depd %r9,8,4,%r10
+ <DShifts+36>: depd,z %r9,8,4,%r10
+ <DShifts+40>: depd %r9,%sar,8,%r10
+ <DShifts+44>: depd,z %r9,%sar,8,%r10
+ <DShifts+48>: depdi 4,8,4,%r10
+ <DShifts+52>: depdi,z 4,8,4,%r10
+ <DShifts+56>: depdi 4,%sar,8,%r10
+ <DShifts+60>: depdi,z 4,%sar,8,%r10
+ <DShifts+64>: b <WShifts>
+ <WShifts>: shrpw %r9,%r10,4,%r10
+ <WShifts+4>: shrpw %r9,%r10,%sar,%r10
+ <WShifts+8>: extrw,s %r9,8,4,%r10
+ <WShifts+12>: extrw,u %r9,8,4,%r10
+ <WShifts+16>: extrw,s %r9,8,4,%r10
+ <WShifts+20>: extrw,s %r9,%sar,8,%r10
+ <WShifts+24>: extrw,u %r9,%sar,8,%r10
+ <WShifts+28>: extrw,s %r9,%sar,8,%r10
+ <WShifts+32>: depw %r9,8,4,%r10
+ <WShifts+36>: depw,z %r9,8,4,%r10
+ <WShifts+40>: depw %r9,%sar,8,%r10
+ <WShifts+44>: depw,z %r9,%sar,8,%r10
+ <WShifts+48>: depwi 4,8,4,%r10
+ <WShifts+52>: depwi,z 4,8,4,%r10
+ <WShifts+56>: depwi 4,%sar,8,%r10
+ <WShifts+60>: depwi,z 4,%sar,8,%r10
+ <WShifts+64>: b <dcortst>
+ <dcortst>: dcor %r5,%r6
+ <dcortst+4>: dcor,shz %r5,%r6
+ <dcortst+8>: dcor,i %r5,%r6
+ <dcortst+12>: dcor,i,shz %r5,%r6
+ <dcortst+16>: dcor,i,shz %r5,%r6
+ <dcortst+20>: b <uaddtst>
+ <uaddtst>: uaddcm %r4,%r5,%r6
+ <uaddtst+4>: uaddcm,sdc %r4,%r5,%r6
+ <uaddtst+8>: uaddcm,tc %r4,%r5,%r6
+ <uaddtst+12>: uaddcm,tc,sdc %r4,%r5,%r6
+ <uaddtst+16>: b <cmpbtst>
+ <cmpbtst>: cmpb %r4,%r5,<cmpbtst>
+ <cmpbtst+4>: cmpb,= %r4,%r5,<cmpbtst>
+ <cmpbtst+8>: cmpb,< %r4,%r5,<cmpbtst>
+ <cmpbtst+12>: cmpb,<= %r4,%r5,<cmpbtst>
+ <cmpbtst+16>: cmpb,<< %r4,%r5,<cmpbtst>
+ <cmpbtst+20>: cmpb,<<= %r4,%r5,<cmpbtst>
+ <cmpbtst+24>: cmpb,sv %r4,%r5,<cmpbtst>
+ <cmpbtst+28>: cmpb,od %r4,%r5,<cmpbtst>
+ <cmpbtst+32>: cmpb,tr %r4,%r5,<cmpbtst>
+ <cmpbtst+36>: cmpb,<> %r4,%r5,<cmpbtst>
+ <cmpbtst+40>: cmpb,>= %r4,%r5,<cmpbtst>
+ <cmpbtst+44>: cmpb,> %r4,%r5,<cmpbtst>
+ <cmpbtst+48>: cmpb,>>= %r4,%r5,<cmpbtst>
+ <cmpbtst+52>: cmpb,>> %r4,%r5,<cmpbtst>
+ <cmpbtst+56>: cmpb,nsv %r4,%r5,<cmpbtst>
+ <cmpbtst+60>: cmpb,ev %r4,%r5,<cmpbtst>
+ <cmpbtst+64>: cmpb* %r4,%r5,<cmpbtst>
+ <cmpbtst+68>: cmpb,*= %r4,%r5,<cmpbtst>
+ <cmpbtst+72>: cmpb,*< %r4,%r5,<cmpbtst>
+ <cmpbtst+76>: cmpb,*<= %r4,%r5,<cmpbtst>
+ <cmpbtst+80>: cmpb,*<< %r4,%r5,<cmpbtst>
+ <cmpbtst+84>: cmpb,*<<= %r4,%r5,<cmpbtst>
+ <cmpbtst+88>: cmpb,*sv %r4,%r5,<cmpbtst>
+ <cmpbtst+92>: cmpb,*od %r4,%r5,<cmpbtst>
+ <cmpbtst+96>: cmpb,*tr %r4,%r5,<cmpbtst>
+ <cmpbtst+100>: cmpb,*<> %r4,%r5,<cmpbtst>
+ <cmpbtst+104>: cmpb,*>= %r4,%r5,<cmpbtst>
+ <cmpbtst+108>: cmpb,*> %r4,%r5,<cmpbtst>
+ <cmpbtst+112>: cmpb,*>>= %r4,%r5,<cmpbtst>
+ <cmpbtst+116>: cmpb,*>> %r4,%r5,<cmpbtst>
+ <cmpbtst+120>: cmpb,*nsv %r4,%r5,<cmpbtst>
+ <cmpbtst+124>: cmpb,*ev %r4,%r5,<cmpbtst>
+ <cmpbtst+128>: b <cmpibtst>
+ <cmpibtst>: cmpib 4,%r5,<cmpibtst>
+ <cmpibtst+4>: cmpib,= 4,%r5,<cmpibtst>
+ <cmpibtst+8>: cmpib,< 4,%r5,<cmpibtst>
+ <cmpibtst+12>: cmpib,<= 4,%r5,<cmpibtst>
+ <cmpibtst+16>: cmpib,<< 4,%r5,<cmpibtst>
+ <cmpibtst+20>: cmpib,<<= 4,%r5,<cmpibtst>
+ <cmpibtst+24>: cmpib,sv 4,%r5,<cmpibtst>
+ <cmpibtst+28>: cmpib,od 4,%r5,<cmpibtst>
+ <cmpibtst+32>: cmpib,tr 4,%r5,<cmpibtst>
+ <cmpibtst+36>: cmpib,<> 4,%r5,<cmpibtst>
+ <cmpibtst+40>: cmpib,>= 4,%r5,<cmpibtst>
+ <cmpibtst+44>: cmpib,> 4,%r5,<cmpibtst>
+ <cmpibtst+48>: cmpib,>>= 4,%r5,<cmpibtst>
+ <cmpibtst+52>: cmpib,>> 4,%r5,<cmpibtst>
+ <cmpibtst+56>: cmpib,nsv 4,%r5,<cmpibtst>
+ <cmpibtst+60>: cmpib,ev 4,%r5,<cmpibtst>
+ <cmpibtst+64>: cmpib ,*<<%r8,%r5,<cmpibtst>
+ <cmpibtst+68>: cmpib ,*=%r8,%r5,<cmpibtst>
+ <cmpibtst+72>: cmpib ,*<%r8,%r5,<cmpibtst>
+ <cmpibtst+76>: cmpib ,*<=%r8,%r5,<cmpibtst>
+ <cmpibtst+80>: cmpib ,*>>=%r8,%r5,<cmpibtst>
+ <cmpibtst+84>: cmpib ,*<>%r8,%r5,<cmpibtst>
+ <cmpibtst+88>: cmpib ,*>=%r8,%r5,<cmpibtst>
+ <cmpibtst+92>: cmpib ,*>%r8,%r5,<cmpibtst>
+ <cmpibtst+96>: b <cmpclrtst>
+ <cmpclrtst>: cmpclr %r4,%r5,%r6
+ <cmpclrtst+4>: cmpclr,= %r4,%r5,%r6
+ <cmpclrtst+8>: cmpclr,< %r4,%r5,%r6
+ <cmpclrtst+12>: cmpclr,<= %r4,%r5,%r6
+ <cmpclrtst+16>: cmpclr,<< %r4,%r5,%r6
+ <cmpclrtst+20>: cmpclr,<<= %r4,%r5,%r6
+ <cmpclrtst+24>: cmpclr,sv %r4,%r5,%r6
+ <cmpclrtst+28>: cmpclr,od %r4,%r5,%r6
+ <cmpclrtst+32>: cmpclr,tr %r4,%r5,%r6
+ <cmpclrtst+36>: cmpclr,<> %r4,%r5,%r6
+ <cmpclrtst+40>: cmpclr,>= %r4,%r5,%r6
+ <cmpclrtst+44>: cmpclr,> %r4,%r5,%r6
+ <cmpclrtst+48>: cmpclr,>>= %r4,%r5,%r6
+ <cmpclrtst+52>: cmpclr,>> %r4,%r5,%r6
+ <cmpclrtst+56>: cmpclr,nsv %r4,%r5,%r6
+ <cmpclrtst+60>: cmpclr,ev %r4,%r5,%r6
+ <cmpclrtst+64>: comclr* %r4,%r5,%r6
+ <cmpclrtst+68>: comclr,*= %r4,%r5,%r6
+ <cmpclrtst+72>: comclr,*< %r4,%r5,%r6
+ <cmpclrtst+76>: comclr,*<= %r4,%r5,%r6
+ <cmpclrtst+80>: comclr,*<< %r4,%r5,%r6
+ <cmpclrtst+84>: comclr,*<<= %r4,%r5,%r6
+ <cmpclrtst+88>: comclr,*sv %r4,%r5,%r6
+ <cmpclrtst+92>: comclr,*od %r4,%r5,%r6
+ <cmpclrtst+96>: comclr,*tr %r4,%r5,%r6
+ <cmpclrtst+100>: comclr,*<> %r4,%r5,%r6
+ <cmpclrtst+104>: comclr,*>= %r4,%r5,%r6
+ <cmpclrtst+108>: comclr,*> %r4,%r5,%r6
+ <cmpclrtst+112>: comclr,*>>= %r4,%r5,%r6
+ <cmpclrtst+116>: comclr,*>> %r4,%r5,%r6
+ <cmpclrtst+120>: comclr,*nsv %r4,%r5,%r6
+ <cmpclrtst+124>: comclr,*ev %r4,%r5,%r6
+ <cmpclrtst+128>: b <cmpiclrtst>
+ <cmpiclrtst>: cmpiclr 4,%r5,%r6
+ <cmpiclrtst+4>: cmpiclr,= 4,%r5,%r6
+ <cmpiclrtst+8>: cmpiclr,< 4,%r5,%r6
+ <cmpiclrtst+12>: cmpiclr,<= 4,%r5,%r6
+ <cmpiclrtst+16>: cmpiclr,<< 4,%r5,%r6
+ <cmpiclrtst+20>: cmpiclr,<<= 4,%r5,%r6
+ <cmpiclrtst+24>: cmpiclr,sv 4,%r5,%r6
+ <cmpiclrtst+28>: cmpiclr,od 4,%r5,%r6
+ <cmpiclrtst+32>: cmpiclr,tr 4,%r5,%r6
+ <cmpiclrtst+36>: cmpiclr,<> 4,%r5,%r6
+ <cmpiclrtst+40>: cmpiclr,>= 4,%r5,%r6
+ <cmpiclrtst+44>: cmpiclr,> 4,%r5,%r6
+ <cmpiclrtst+48>: cmpiclr,>>= 4,%r5,%r6
+ <cmpiclrtst+52>: cmpiclr,>> 4,%r5,%r6
+ <cmpiclrtst+56>: cmpiclr,nsv 4,%r5,%r6
+ <cmpiclrtst+60>: cmpiclr,ev 4,%r5,%r6
+ <cmpiclrtst+64>: comiclr* 4,%r5,%r6
+ <cmpiclrtst+68>: comiclr,*= 4,%r5,%r6
+ <cmpiclrtst+72>: comiclr,*< 4,%r5,%r6
+ <cmpiclrtst+76>: comiclr,*<= 4,%r5,%r6
+ <cmpiclrtst+80>: comiclr,*<< 4,%r5,%r6
+ <cmpiclrtst+84>: comiclr,*<<= 4,%r5,%r6
+ <cmpiclrtst+88>: comiclr,*sv 4,%r5,%r6
+ <cmpiclrtst+92>: comiclr,*od 4,%r5,%r6
+ <cmpiclrtst+96>: comiclr,*tr 4,%r5,%r6
+ <cmpiclrtst+100>: comiclr,*<> 4,%r5,%r6
+ <cmpiclrtst+104>: comiclr,*>= 4,%r5,%r6
+ <cmpiclrtst+108>: comiclr,*> 4,%r5,%r6
+ <cmpiclrtst+112>: comiclr,*>>= 4,%r5,%r6
+ <cmpiclrtst+116>: comiclr,*>> 4,%r5,%r6
+ <cmpiclrtst+120>: comiclr,*nsv 4,%r5,%r6
+ <cmpiclrtst+124>: comiclr,*ev 4,%r5,%r6
+ <cmpiclrtst+128>: b <coprtst>
+ <coprtst>: fid
+ <coprtst+4>: fid
+ <coprtst+8>: copr,7,0,n
+ <coprtst+12>: copr,1,0
+ <coprtst+16>: copr,7,0x1f
+ <coprtst+20>: copr,7,0x20
+ <coprtst+24>: copr,7,0x40
+ <coprtst+28>: copr,7,0x80
+ <coprtst+32>: copr,7,0x100
+ <coprtst+36>: copr,7,0x200
+ <coprtst+40>: copr,7,0x400
+ <coprtst+44>: copr,7,0x800
+ <coprtst+48>: copr,7,0x1000
+ <coprtst+52>: copr,7,0x2000
+ <coprtst+56>: copr,7,0x4000
+ <coprtst+60>: copr,7,0x8000
+ <coprtst+64>: copr,7,0x10000
+ <coprtst+68>: copr,7,0x20000
+ <coprtst+72>: copr,7,0x40000
+ <coprtst+76>: copr,7,0x80000
+ <coprtst+80>: copr,7,0x100000
+ <coprtst+84>: copr,7,0x200000
+ <coprtst+88>: b <spop0tst>
+ <spop0tst>: spop0,7,0
+ <spop0tst+4>: spop0,7,0,n
+ <spop0tst+8>: spop0,1,0
+ <spop0tst+12>: spop0,7,0x1f
+ <spop0tst+16>: spop0,7,0x20
+ <spop0tst+20>: spop0,7,0x40
+ <spop0tst+24>: spop0,7,0x80
+ <spop0tst+28>: spop0,7,0x100
+ <spop0tst+32>: spop0,7,0x200
+ <spop0tst+36>: spop0,7,0x400
+ <spop0tst+40>: spop0,7,0x800
+ <spop0tst+44>: spop0,7,0x1000
+ <spop0tst+48>: spop0,7,0x2000
+ <spop0tst+52>: spop0,7,0x4000
+ <spop0tst+56>: spop0,7,0x8000
+ <spop0tst+60>: spop0,7,0x10000
+ <spop0tst+64>: spop0,7,0x20000
+ <spop0tst+68>: spop0,7,0x40000
+ <spop0tst+72>: spop0,7,0x80000
+ <spop0tst+76>: b <spop1tst>
+ <spop1tst>: spop1,7,0 %r5
+ <spop1tst+4>: spop1,7,0,n %r5
+ <spop1tst+8>: spop1,1,0 %r5
+ <spop1tst+12>: spop1,7,0x1f %r5
+ <spop1tst+16>: spop1,7,0x20 %r5
+ <spop1tst+20>: spop1,7,0x40 %r5
+ <spop1tst+24>: spop1,7,0x80 %r5
+ <spop1tst+28>: spop1,7,0x100 %r5
+ <spop1tst+32>: spop1,7,0x200 %r5
+ <spop1tst+36>: spop1,7,0x400 %r5
+ <spop1tst+40>: spop1,7,0x800 %r5
+ <spop1tst+44>: spop1,7,0x1000 %r5
+ <spop1tst+48>: spop1,7,0x2000 %r5
+ <spop1tst+52>: spop1,7,0x4000 %r5
+ <spop1tst+56>: b <spop2tst>
+ <spop2tst>: spop2,7,0 %r5
+ <spop2tst+4>: spop2,7,0,n %r5
+ <spop2tst+8>: spop2,1,0 %r5
+ <spop2tst+12>: spop2,7,0x1f %r5
+ <spop2tst+16>: spop2,7,0x20 %r5
+ <spop2tst+20>: spop2,7,0x40 %r5
+ <spop2tst+24>: spop2,7,0x80 %r5
+ <spop2tst+28>: spop2,7,0x100 %r5
+ <spop2tst+32>: spop2,7,0x200 %r5
+ <spop2tst+36>: spop2,7,0x400 %r5
+ <spop2tst+40>: spop2,7,0x800 %r5
+ <spop2tst+44>: spop2,7,0x1000 %r5
+ <spop2tst+48>: spop2,7,0x2000 %r5
+ <spop2tst+52>: spop2,7,0x4000 %r5
+ <spop2tst+56>: b <spop3tst>
+ <spop3tst>: spop3,7,0 %r5,%r8
+ <spop3tst+4>: spop3,7,0,n %r5,%r8
+ <spop3tst+8>: spop3,1,0 %r5,%r8
+ <spop3tst+12>: spop3,7,0x1f %r5,%r8
+ <spop3tst+16>: spop3,7,0x20 %r5,%r8
+ <spop3tst+20>: spop3,7,0x40 %r5,%r8
+ <spop3tst+24>: spop3,7,0x80 %r5,%r8
+ <spop3tst+28>: spop3,7,0x100 %r5,%r8
+ <spop3tst+32>: spop3,7,0x200 %r5,%r8
+ <spop3tst+36>: b <additst>
+ <additst>: addi 4,%r5,%r6
+ <additst+4>: addi,tsv 4,%r5,%r6
+ <additst+8>: addi,tc 4,%r5,%r6
+ <additst+12>: addi,tsv,tc 4,%r5,%r6
+ <additst+16>: addi,= 4,%r5,%r6
+ <additst+20>: addi,tsv,= 4,%r5,%r6
+ <additst+24>: addi,tc,= 4,%r5,%r6
+ <additst+28>: addi,tsv,tc,= 4,%r5,%r6
+ <additst+32>: b <subitst>
+ <subitst>: subi 4,%r5,%r6
+ <subitst+4>: subio 4,%r5,%r6
+ <subitst+8>: subi,= 4,%r5,%r6
+ <subitst+12>: subio,= 4,%r5,%r6
+ <subitst+16>: b <addtst>
+ <addtst>: add %r4,%r5,%r6
+ <addtst+4>: add,c %r4,%r5,%r6
+ <addtst+8>: add,dc %r4,%r5,%r6
+ <addtst+12>: add,l %r4,%r5,%r6
+ <addtst+16>: add,tsv %r4,%r5,%r6
+ <addtst+20>: add,tsv,c %r4,%r5,%r6
+ <addtst+24>: add,tsv,dc %r4,%r5,%r6
+ <addtst+28>: add,tsv,c %r4,%r5,%r6
+ <addtst+32>: add,tsv,dc %r4,%r5,%r6
+ <addtst+36>: add,= %r4,%r5,%r6
+ <addtst+40>: add,c,= %r4,%r5,%r6
+ <addtst+44>: add,dc,= %r4,%r5,%r6
+ <addtst+48>: add,l,= %r4,%r5,%r6
+ <addtst+52>: add,tsv,= %r4,%r5,%r6
+ <addtst+56>: add,tsv,c,= %r4,%r5,%r6
+ <addtst+60>: add,tsv,dc,= %r4,%r5,%r6
+ <addtst+64>: add,tsv,c,= %r4,%r5,%r6
+ <addtst+68>: add,tsv,dc,= %r4,%r5,%r6
+ <addtst+72>: b <shladdtst>
+ <shladdtst>: shladd %r4,1,%r5,%r6
+ <shladdtst+4>: shladd,l %r4,2,%r5,%r6
+ <shladdtst+8>: shladd,tsv %r4,3,%r5,%r6
+ <shladdtst+12>: shladd,= %r4,1,%r5,%r6
+ <shladdtst+16>: shladd,l,= %r4,2,%r5,%r6
+ <shladdtst+20>: shladd,tsv,= %r4,3,%r5,%r6
+ <shladdtst+24>: b <subtst>
+ <subtst>: sub %r4,%r5,%r6
+ <subtst+4>: sub,b %r4,%r5,%r6
+ <subtst+8>: sub,db* %r4,%r5,%r6
+ <subtst+12>: sub,tc %r4,%r5,%r6
+ <subtst+16>: sub,tsv %r4,%r5,%r6
+ <subtst+20>: sub,tsv,b %r4,%r5,%r6
+ <subtst+24>: sub,tsv,db* %r4,%r5,%r6
+ <subtst+28>: sub,tsv,tc %r4,%r5,%r6
+ <subtst+32>: sub,tsv,b %r4,%r5,%r6
+ <subtst+36>: sub,tsv,db* %r4,%r5,%r6
+ <subtst+40>: sub,tsv,tc %r4,%r5,%r6
+ <subtst+44>: sub,= %r4,%r5,%r6
+ <subtst+48>: sub,b,= %r4,%r5,%r6
+ <subtst+52>: sub,db,*= %r4,%r5,%r6
+ <subtst+56>: sub,tc,= %r4,%r5,%r6
+ <subtst+60>: sub,tsv,= %r4,%r5,%r6
+ <subtst+64>: sub,tsv,b,= %r4,%r5,%r6
+ <subtst+68>: sub,tsv,db,*= %r4,%r5,%r6
+ <subtst+72>: sub,tsv,tc,= %r4,%r5,%r6
+ <subtst+76>: sub,tsv,b,= %r4,%r5,%r6
+ <subtst+80>: sub,tsv,db,*= %r4,%r5,%r6
+ <subtst+84>: sub,tsv,tc,= %r4,%r5,%r6
+ <subtst+88>: b <gate>
+ <gate>: b,gate <test>,%r0
+ <gate+4>: b,gate <test>,%r1
+ <gate+8>: b,gate <test>,%rp
+ <gate+12>: b,gate <test>,%r31
+ <gate+16>: b <btst>
+ <btst>: b <test>
+ <btst+4>: b,l <test>,%r1
+ <btst+8>: b,l <test>,%r2
+ <btst+12>: b,push 0xff8420d0
+ <btst+16>: b,push 0xff8420d0
+ <btst+20>: b,push 0xff8420d0
+ <btst+24>: b,push 0xff8420d0
+ <btst+28>: b <betst>
+ <betst>: be 0x20d0(%sr0,%r8)
+ <betst+4>: be,l 0x20d0(%sr0,%r8)
+ <betst+8>: be,l 0x20d0(%sr0,%r8)
+ <betst+12>: b <bvetst>
+ <bvetst>: bve (%r8)
+ <bvetst+4>: bve,l (%r8),%r2
+ <bvetst+8>: bve,pop (%r8)
+ <bvetst+12>: bve,l (%r8),%r2
+ <bvetst+16>: bve,l,push (%r8),%r2
+ <bvetst+20>: bve,l,push (%r8),%r2
+ <bvetst+24>: bve,l,push (%r8),%r2
+ <bvetst+28>: bve,l,push (%r8),%r2
+ <bvetst+32>: b <bts_tst>
+ <bts_tst>: pushnom
+ <bts_tst+4>: clrbts
+ <bts_tst+8>: popbts 1
+ <bts_tst+12>: popbts 255
+ <bts_tst+16>: popbts 256
+ <bts_tst+20>: popbts 511
+ <bts_tst+24>: pushnom
+ <bts_tst+28>: pushbts %r1
+ <bts_tst+32>: pushbts %r31
+ <bts_tst+36>: b <hsh>
+ <hsh>: hshladd %r4,1,%r5,%r6
+ <hsh+4>: hshladd %r4,2,%r5,%r6
+ <hsh+8>: hshladd %r4,3,%r5,%r6
+ <hsh+12>: hshradd %r4,1,%r5,%r6
+ <hsh+16>: hshradd %r4,2,%r5,%r6
+ <hsh+20>: hshradd %r4,3,%r5,%r6
+ <hsh+24>: b <sh>
+ <sh>: shladd %r4,1,%r5,%r6
+ <sh+4>: shladd %r4,2,%r5,%r6
+ <sh+8>: shladd %r4,3,%r5,%r6
+ <sh+12>: b <mixs>
+ <mixs>: mixh,l %r1,%rp,%r3
+ <mixs+4>: mixh,r %r1,%rp,%r3
+ <mixs+8>: mixw,l %r1,%rp,%r3
+ <mixs+12>: mixw,r %r1,%rp,%r3
+ <mixs+16>: b <hw_shifts>
+ <hw_shifts>: hshl %r4,0,%r6
+ <hw_shifts+4>: hshr,u %r4,1,%r6
+ <hw_shifts+8>: hshr,s %r4,2,%r6
+ <hw_shifts+12>: hshl %r4,3,%r6
+ <hw_shifts+16>: hshr,u %r4,4,%r6
+ <hw_shifts+20>: hshr,s %r4,5,%r6
+ <hw_shifts+24>: hshl %r4,6,%r6
+ <hw_shifts+28>: hshr,u %r4,7,%r6
+ <hw_shifts+32>: hshr,s %r4,8,%r6
+ <hw_shifts+36>: hshl %r4,9,%r6
+ <hw_shifts+40>: hshr,u %r4,10,%r6
+ <hw_shifts+44>: hshr,s %r4,11,%r6
+ <hw_shifts+48>: hshl %r4,12,%r6
+ <hw_shifts+52>: hshr,u %r4,13,%r6
+ <hw_shifts+56>: hshr,s %r4,14,%r6
+ <hw_shifts+60>: hshl %r4,15,%r6
+ <hw_shifts+64>: b <fcmp3>
+ <fcmp3>: fcmp,sgl,= %fr4,%fr5R,0
+ <fcmp3+4>: fcmp,dbl,< %fr5,%fr6,1
+ <fcmp3+8>: fcmp,sgl,<= %fr6R,%fr7,2
+ <fcmp3+12>: fcmp,dbl,> %fr7,%fr8,3
+ <fcmp3+16>: fcmp,sgl,>= %fr8,%fr9R,4
+ <fcmp3+20>: fcmp,dbl,<> %fr9,%fr10,5
+ <fcmp3+24>: b <fcmp2>
+ <fcmp2>: fcmp,sgl,= %fr4,%fr5R
+ <fcmp2+4>: fcmp,sgl,< %fr5,%fr6,6
+ <fcmp2+8>: fcmp,sgl,<= %fr6R,%fr7
+ <fcmp2+12>: fcmp,dbl,false? %fr7,%fr8,0
+ <fcmp2+16>: fcmp,sgl,>= %fr8,%fr9R,1
+ <fcmp2+20>: fcmp,dbl,false? %fr9,%fr10,2
+ <fcmp2+24>: b <fcmp1>
+ <fcmp1>: fcmp,sgl,< %fr5,%fr6
+ <fcmp1+4>: fcmp,dbl,false? %fr7,%fr8
+ <fcmp1+8>: fcmp,sgl,false? %fr9,%fr10,3
+ <fcmp1+12>: b <fcmp0>
+ <fcmp0>: fcmp,sgl,false? %fr4,%fr5R
+ <fcmp0+4>: b <ftest2>
+ <ftest2>: ftest 0
+ <ftest2+4>: b <ftest1a>
+ <ftest1a>: ftest,acc
+ <ftest1a+4>: ftest,acc8
+ <ftest1a+8>: ftest,acc6
+ <ftest1a+12>: ftest,acc4
+ <ftest1a+16>: ftest,acc2
+ <ftest1a+20>: ftest,rej
+ <ftest1a+24>: ftest,rej8
+ <ftest1a+28>: b <ftest1b>
+ <ftest1b>: ftest 0
+ <ftest1b+4>: ftest 1
+ <ftest1b+8>: ftest 2
+ <ftest1b+12>: ftest 3
+ <ftest1b+16>: ftest 4
+ <ftest1b+20>: ftest 5
+ <ftest1b+24>: ftest 6
+ <ftest1b+28>: b <ftest0>
+ <ftest0>: ftest
+ <ftest0+4>: b <fpin>
+ <fpin>: fneg,sgl %fr5R,%fr6
+ <fpin+4>: fnegabs,sgl %fr5R,%fr6
+ <fpin+8>: fmpyfadd,sgl %fr6R,%fr12,%fr18R,%fr24
+ <fpin+12>: fmpynfadd,sgl %fr6,%fr12R,%fr18,%fr24R
+ <fpin+16>: fneg,dbl %fr5,%fr6
+ <fpin+20>: fnegabs,dbl %fr5,%fr6
+ <fpin+24>: fmpyfadd,dbl %fr6,%fr12,%fr18,%fr24
+ <fpin+28>: fmpynfadd,dbl %fr7,%fr13,%fr19,%fr25
+ <fpin+32>: b <mmin>
+ <mmin>: fic %r5(%sr0,%r9)
+ <mmin+4>: fic %r5(%sr2,%r9)
+ <mmin+8>: fic %r5(%sr2,%r9)
+ <mmin+12>: idtlbt %r5,%r9
+ <mmin+16>: iitlbt %r5,%r9
+ <mmin+20>: pdtlb %r5(%sr2,%r9)
+ <mmin+24>: pdtlb,l %r5(%sr2,%r9)
+ <mmin+28>: pitlb %r5(%sr2,%r9)
+ <mmin+32>: pitlb,l %r5(%sr2,%r9)
+ <mmin+36>: b <sysin>
+ <sysin>: sync
+ <sysin+4>: syncdma
+ <sysin+8>: mfia %r10
+ <sysin+12>: mtsarcm %r10
+ <sysin+16>: b <compl64>
+ <compl64>: add,d %r5,%r6,%r7
+ <compl64+4>: add,d,= %r5,%r6,%r7
+ <compl64+8>: add,d,< %r5,%r6,%r7
+ <compl64+12>: add,d,<= %r5,%r6,%r7
+ <compl64+16>: sub,d,*<< %r5,%r6,%r7
+ <compl64+20>: sub,d,*<<= %r5,%r6,%r7
+ <compl64+24>: add,d,sv %r5,%r6,%r7
+ <compl64+28>: add,d,od %r5,%r6,%r7
+ <compl64+32>: add,d,<> %r5,%r6,%r7
+ <compl64+36>: add,d,>= %r5,%r6,%r7
+ <compl64+40>: add,d,> %r5,%r6,%r7
+ <compl64+44>: sub,d,*>>= %r5,%r6,%r7
+ <compl64+48>: sub,d,*>> %r5,%r6,%r7
+ <compl64+52>: add,d,nsv %r5,%r6,%r7
+ <compl64+56>: add,d,ev %r5,%r6,%r7
+ <compl64+60>: add,d,tr %r5,%r6,%r7
+ <compl64+64>: add,d,nuv %r5,%r6,%r7
+ <compl64+68>: add,d,znv %r5,%r6,%r7
+ <compl64+72>: add,d,uv %r5,%r6,%r7
+ <compl64+76>: add,d,vnz %r5,%r6,%r7
+ <compl64+80>: uaddcm* %r5,%r6,%r7
+ <compl64+84>: uaddcm*,sbz %r5,%r6,%r7
+ <compl64+88>: uaddcm*,shz %r5,%r6,%r7
+ <compl64+92>: uaddcm*,sdc %r5,%r6,%r7
+ <compl64+96>: uaddcm* %r5,%r6,%r7
+ <compl64+100>: uaddcm*,sbc %r5,%r6,%r7
+ <compl64+104>: uaddcm*,shc %r5,%r6,%r7
+ <compl64+108>: uaddcm* %r5,%r6,%r7
+ <compl64+112>: uaddcm*,nbz %r5,%r6,%r7
+ <compl64+116>: uaddcm*,nhz %r5,%r6,%r7
+ <compl64+120>: uaddcm*,ndc %r5,%r6,%r7
+ <compl64+124>: uaddcm* %r5,%r6,%r7
+ <compl64+128>: uaddcm*,nbc %r5,%r6,%r7
+ <compl64+132>: uaddcm*,nhc %r5,%r6,%r7
+ <compl64+136>: b <WordUnit>
+ <WordUnit>: uaddcm %r5,%r6,%r7
+ <WordUnit+4>: uaddcm,sbz %r5,%r6,%r7
+ <WordUnit+8>: uaddcm,shz %r5,%r6,%r7
+ <WordUnit+12>: uaddcm,sdc %r5,%r6,%r7
+ <WordUnit+16>: uaddcm,sbc %r5,%r6,%r7
+ <WordUnit+20>: uaddcm,shc %r5,%r6,%r7
+ <WordUnit+24>: uaddcm,tr %r5,%r6,%r7
+ <WordUnit+28>: uaddcm,nbz %r5,%r6,%r7
+ <WordUnit+32>: uaddcm,nhz %r5,%r6,%r7
+ <WordUnit+36>: uaddcm,ndc %r5,%r6,%r7
+ <WordUnit+40>: uaddcm,nbc %r5,%r6,%r7
+ <WordUnit+44>: uaddcm,nhc %r5,%r6,%r7
+ <Back>: b,l <Back>,%r2
+ <Back+4>: b,l <Short>,%r2
+ <Back+8>: be,l 0x31e4(%sr1,%r8)
+ <Back+12>: be 0x31e4(%sr0,%r0)
+ <Back+16>: be,l 0x20e0(%sr0,%r0)
+ <Back+20>: bv %r5(%r8)
+ <Back+24>: bve (%r8)
+ <Back+28>: bve,n (%r8)
+ <mainend>: nop
+ <__d_eh_notify_callback>: b,l <__d_eh_notify_callback>,%r2
+ <__d_eh_notify_callback+4>: nop
+ <__d_eh_notify_callback+8>: ldw -0x18(%sr0,%sp),%rp
+ <__d_eh_notify_callback+12>: bve,n (%rp)
+ <__d_shl_get>: stw %rp,-0x14(%sr0,%sp)
+ <__d_shl_get+4>: ldo 0x40(%sp),%sp
+ <__d_shl_get+8>: stw %r26,-0x64(%sr0,%sp)
+ <__d_shl_get+12>: stw %r25,-0x68(%sr0,%sp)
+ <__d_shl_get+16>: stw %r24,-0x6c(%sr0,%sp)
+ <__d_shl_get+20>: stw %r23,-0x70(%sr0,%sp)
+ <__d_shl_get+24>: addil L'0,%dp,%r1
+ <__d_shl_get+28>: ldw 0(%sr0,%r1),%r1
+ <__d_shl_get+32>: ldw -0x64(%sr0,%sp),%r31
+ <__d_shl_get+36>: add %r1,%r31,%r19
+ <__d_shl_get+40>: ldw 0(%sr0,%r19),%r22
+ <__d_shl_get+44>: ldw -0x68(%sr0,%sp),%r26
+ <__d_shl_get+48>: ldw -0x6c(%sr0,%sp),%r25
+ <__d_shl_get+52>: ldw -0x70(%sr0,%sp),%r24
+ <__d_shl_get+56>: ldw -0x74(%sr0,%sp),%r23
+ <__d_shl_get+60>: ldw -0x78(%sr0,%sp),%r20
+ <__d_shl_get+64>: stw %r20,-0x34(%sr0,%sp)
+ <__d_shl_get+68>: ldil L'0x1000,%r31
+ <__d_shl_get+72>: be,l 0x7fc(%sr4,%r31)
+ <__d_shl_get+76>: or %r31,%r0,%rp
+ <__d_shl_get+80>: ldw -0x54(%sr0,%sp),%rp
+ <__d_shl_get+84>: bv %r0(%rp)
+ <__d_shl_get+88>: ldo -0x40(%sp),%sp
+ <__d_plt_call>: stw %rp,-0x14(%sr0,%sp)
+ <__d_plt_call+4>: ldo 0x40(%sp),%sp
+ <__d_plt_call+8>: addil L'0,%dp,%r1
+ <__d_plt_call+12>: ldw 0x208(%sr0,%r1),%r22
+ <__d_plt_call+16>: ldil L'0x1000,%r31
+ <__d_plt_call+20>: be,l 0x7fc(%sr4,%r31)
+ <__d_plt_call+24>: or %r31,%r0,%rp
+ <__d_plt_call+28>: ldw -0x54(%sr0,%sp),%rp
+ <__d_plt_call+32>: bv %r0(%rp)
+ <__d_plt_call+36>: ldo -0x40(%sp),%sp
+ <__d_eh_break>: stw %r26,-0x24(%sr0,%sp)
+ <__d_eh_break+4>: stw %r25,-0x28(%sr0,%sp)
+ <__d_eh_break+8>: stw %r24,-0x2c(%sr0,%sp)
+ <__d_eh_break+12>: bv %r0(%rp)
+ <__d_eh_break+16>: nop
+ <__d_eh_notify_callback>: stw %rp,-0x14(%sr0,%sp)
+ <__d_eh_notify_callback+4>: ldo 0x40(%sp),%sp
+ <__d_eh_notify_callback+8>: stw %r26,-0x64(%sr0,%sp)
+ <__d_eh_notify_callback+12>: stw %r25,-0x68(%sr0,%sp)
+ <__d_eh_notify_callback+16>: stw %r24,-0x6c(%sr0,%sp)
+ <__d_eh_notify_callback+20>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+24>: ldw 0x7a0(%sr0,%r1),%r21
+ <__d_eh_notify_callback+28>: cmpib,<>,n 0,%r21,<__d_eh_notify_callback+44>
+ <__d_eh_notify_callback+32>: b <__d_eh_notify_callback+200>
+ <__d_eh_notify_callback+36>: or %r0,%r0,%ret0
+ <__d_eh_notify_callback+40>: b,n <__d_eh_notify_callback+192>
+ <__d_eh_notify_callback+44>: ldil L'0x3000,%r31
+ <__d_eh_notify_callback+48>: be,l 0x3ac(%sr4,%r31)
+ <__d_eh_notify_callback+52>: or %r31,%r0,%rp
+ <__d_eh_notify_callback+56>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+60>: ldw 0x7a0(%sr0,%r1),%r22
+ <__d_eh_notify_callback+64>: cmpb,=,n %ret0,%r22,<__d_eh_notify_callback+88>
+ <__d_eh_notify_callback+68>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+72>: stw %r0,0x7a0(%sr0,%r1)
+ <__d_eh_notify_callback+76>: b <__d_eh_notify_callback+200>
+ <__d_eh_notify_callback+80>: or %r0,%r0,%ret0
+ <__d_eh_notify_callback+84>: b,n <__d_eh_notify_callback+192>
+ <__d_eh_notify_callback+88>: ldw -0x64(%sr0,%sp),%r1
+ <__d_eh_notify_callback+92>: cmpib,=,n 1,%r1,<__d_eh_notify_callback+144>
+ <__d_eh_notify_callback+96>: cmpib,=,n 0,%r1,<__d_eh_notify_callback+104>
+ <__d_eh_notify_callback+100>: b,n <__d_eh_notify_callback+184>
+ <__d_eh_notify_callback+104>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+108>: ldw 0x7b0(%sr0,%r1),%r31
+ <__d_eh_notify_callback+112>: cmpib,=,n 0,%r31,<__d_eh_notify_callback+140>
+ <__d_eh_notify_callback+116>: ldw -0x64(%sr0,%sp),%r26
+ <__d_eh_notify_callback+120>: ldw -0x68(%sr0,%sp),%r25
+ <__d_eh_notify_callback+124>: ldw -0x6c(%sr0,%sp),%r24
+ <__d_eh_notify_callback+128>: ldil L'0x3000,%r31
+ <__d_eh_notify_callback+132>: be,l 0x29c(%sr4,%r31)
+ <__d_eh_notify_callback+136>: or %r31,%r0,%rp
+ <__d_eh_notify_callback+140>: b,n <__d_eh_notify_callback+192>
+ <__d_eh_notify_callback+144>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+148>: ldw 0x7ac(%sr0,%r1),%r19
+ <__d_eh_notify_callback+152>: cmpib,=,n 0,%r19,<__d_eh_notify_callback+180>
+ <__d_eh_notify_callback+156>: ldw -0x64(%sr0,%sp),%r26
+ <__d_eh_notify_callback+160>: ldw -0x68(%sr0,%sp),%r25
+ <__d_eh_notify_callback+164>: ldw -0x6c(%sr0,%sp),%r24
+ <__d_eh_notify_callback+168>: ldil L'0x3000,%r31
+ <__d_eh_notify_callback+172>: be,l 0x29c(%sr4,%r31)
+ <__d_eh_notify_callback+176>: or %r31,%r0,%rp
+ <__d_eh_notify_callback+180>: b,n <__d_eh_notify_callback+192>
+ <__d_eh_notify_callback+184>: b <__d_eh_notify_callback+192>
+ <__d_eh_notify_callback+188>: nop
+ <__d_eh_notify_callback+192>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+196>: ldw 0x7a8(%sr0,%r1),%ret0
+ <__d_eh_notify_callback+200>: ldw -0x54(%sr0,%sp),%rp
+ <__d_eh_notify_callback+204>: bv %r0(%rp)
+ <__d_eh_notify_callback+208>: ldo -0x40(%sp),%sp
+ <_end_>: ldo 0x40(%sp),%sp
+ <_end_+4>: ldi 1,%r20
+ <_end_+8>: stw %r20,-0x28(%sr0,%sp)
+ <_end_+12>: bv %r0(%rp)
+ <_end_+16>: ldo -0x40(%sp),%sp
+ <__d_ldsp>: ldsid (%sr0,%rp),%r1
+ <__d_ldsp+4>: mtsp %r1,%sr0
+ <__d_ldsp+8>: be,n 0(%sr0,%rp)
+ <__d_ldsp+12>: nop
+ <__d_ldsp+16>: break 4,8
+ <__d_getpid>: ldil L'-0x40000000,%r1
+ <__d_getpid+4>: be,l 4(%sr7,%r1)
+ <__d_getpid+8>: ldi 0x14,%r22
+ <__d_getpid+12>: or,= %r0,%r22,%r0
+ <__d_getpid+16>: b,n <__d_syserror>
+ <__d_getpid+20>: nop
+ <__d_getpid+24>: bv,n %r0(%rp)
+ <__d_getpid+28>: nop
+ <__d_syserror>: ldw -0x18(%sr0,%dp),%r1
+ <__d_syserror+4>: copy %r1,%r1
+ <__d_syserror+8>: stw %ret0,0(%sr0,%r1)
+ <__d_syserror+12>: ldi -1,%ret0
+ <__d_syserror+16>: bv,n %r0(%rp)
+ <__d_syserror+20>: nop
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.s gdb/testsuite/gdb.disasm/pa20-t2.s
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20-t2.s Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20-t2.s Thu Jul 22 17:49:48 1999
***************
*** 0 ****
--- 1,1447 ----
+ .level 2.0N
+
+ .export main,ENTRY
+ .export mainend,ENTRY
+ .space $TEXT$
+ .subspa $CODE$
+
+ .import word0,data
+ .import word1,data
+ .import test,code
+
+ .data
+
+ .double 0.1234
+ .dword 0x0123456789abcdef
+ .dword 0xfedcba9876543210
+
+ .code
+
+ main
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+
+ MASK10
+ SSM 0x001,%r1
+ RSM 0x002,%r1
+ SSM 0x004,%r1
+ RSM 0x008,%r1
+ SSM 0x010,%r1
+ RSM 0x020,%r1
+ SSM 0x040,%r1
+ RSM 0x080,%r1
+ SSM 0x100,%r1
+ RSM 0x200,%r1
+ SSM 0x3ff,%r1
+ RSM 0x000,%r1
+
+ VM_bug
+ DEPW,<> %r14,%cr11,20,%r7
+ DEPW %r14,%cr11,20,%r7
+ DEPWI,<> 14,%cr11,20,%r7
+ DEPWI 14,%cr11,20,%r7
+ EXTRW,<> %r14,%cr11,20,%r7
+ EXTRW %r14,%cr11,20,%r7
+ EXTRD,*<> %r14,%cr11,20,%r7
+ EXTRD,<> %r14,%cr11,20,%r7
+ EXTRD %r14,%cr11,20,%r7
+ CLDST
+ b CLDST
+ CLDD,0,S,SL %r5(%sr2,%r6),6
+ CLDD,1,MA,SL 8(%sr2,%r7),7
+ CLDD,2,M %r8(%sr3,%r9),8
+ CLDD,3,MB -8(%r10),9
+ CLDD,4,SL %r11(%r12),10
+ CLDD,5,SL 0(%r13),11
+ CLDD,6 %r14(%r15),12
+ CLDD,7 8(%r15),13
+
+ CLDW,0,S,SL %r5(%sr2,%r6),14
+ CLDW,1,MA,SL 8(%sr2,%r7),15
+ CLDW,2,M %r8(%sr3,%r9),16
+ CLDW,3,MB -8(%r10),17
+ CLDW,4,SL %r11(%r12),18
+ CLDW,5,SL 0(%r13),19
+ CLDW,6 %r14(%r15),20
+ CLDW,7 8(%r15),21
+
+ CSTD,0,S,SL 6,%r5(%sr2,%r6)
+ CSTD,1,MA,SL 7,8(%sr2,%r7)
+ CSTD,2,M 8,%r8(%sr3,%r9)
+ CSTD,3,MB 9,-8(%r10)
+ CSTD,4,BC 10,%r11(%r12)
+ CSTD,5,SL 11,0(%r13)
+ CSTD,6 12,%r14(%r15)
+ CSTD,7 13,8(%r15)
+
+ CSTW,0,S,SL 14,%r5(%sr2,%r6)
+ CSTW,1,MA,SL 15,8(%sr2,%r7)
+ CSTW,2,M 16,%r8(%sr3,%r9)
+ CSTW,3,MB 17,-8(%r10)
+ CSTW,4,SL 18,%r11(%r12)
+ CSTW,5,BC 19,0(%r13)
+ CSTW,6 20,%r14(%r15)
+ CSTW,7 21,8(%r15)
+ LDtest
+ b LDtest
+ LDD -24(%r12),%r31
+ LDD -16(%r12),%r31
+ LDD -8(%r12),%r31
+ LDD 0(%r12),%r31
+ LDD (%r12),%r31
+ LDD %r6(%r12),%r31
+ LDD 8(%r12),%r31
+ LDD 16(%r12),%r31
+ LDD 24(%r12),%r31
+ ;
+ LDW -24(%r12),%r31
+ LDW -16(%r12),%r31
+ LDW -8(%r12),%r31
+ LDW 0(%r12),%r31
+ LDW (%r12),%r31
+ LDW %r6(%r12),%r31
+ LDW 8(%r12),%r31
+ LDW 16(%r12),%r31
+ LDW 24(%r12),%r31
+ ;
+ LDH -24(%r12),%r31
+ LDH -16(%r12),%r31
+ LDH -8(%r12),%r31
+ LDH 0(%r12),%r31
+ LDH (%r12),%r31
+ LDH %r6(%r12),%r31
+ LDH 8(%r12),%r31
+ LDH 16(%r12),%r31
+ LDH 24(%r12),%r31
+ ;
+ LDB -24(%r12),%r31
+ LDB -16(%r12),%r31
+ LDB -8(%r12),%r31
+ LDB 0(%r12),%r31
+ LDB (%r12),%r31
+ LDB %r6(%r12),%r31
+ LDB 8(%r12),%r31
+ LDB 16(%r12),%r31
+ LDB 24(%r12),%r31
+ ;
+ ; LDDA -24(%r12),%r31 ; Error
+ LDDA -16(%r12),%r31
+ LDDA -8(%r12),%r31
+ LDDA 0(%r12),%r31
+ LDDA (%r12),%r31
+ LDDA %r6(%r12),%r31
+ LDDA 8(%r12),%r31
+ ; LDDA 16(%r12),%r31 ; Error
+ ; LDDA 24(%r12),%r31 ; Error
+ ;
+ ; LDWA -24(%r12),%r31 ; Error
+ LDWA -16(%r12),%r31
+ LDWA -8(%r12),%r31
+ LDWA 0(%r12),%r31
+ LDWA (%r12),%r31
+ LDWA %r6(%r12),%r31
+ LDWA 8(%r12),%r31
+ ; LDWA 16(%r12),%r31 ; Error
+ ; LDWA 24(%r12),%r31 ; Error
+ ;
+ ; LDCD -24(%r12),%r31 ; Error
+ LDCD -16(%r12),%r31
+ LDCD -8(%r12),%r31
+ LDCD 0(%r12),%r31
+ LDCD (%r12),%r31
+ LDCD %r6(%r12),%r31
+ LDCD 8(%r12),%r31
+ ; LDCD 16(%r12),%r31 ; Error
+ ; LDCD 24(%r12),%r31 ; Error
+ ;
+ ; LDCW -24(%r12),%r31 ; Error
+ LDCW -16(%r12),%r31
+ LDCW -8(%r12),%r31
+ LDCW 0(%r12),%r31
+ LDCW (%r12),%r31
+ LDCW %r6(%r12),%r31
+ LDCW 8(%r12),%r31
+ ; LDCW 16(%r12),%r31 ; Error
+ ; LDCW 24(%r12),%r31 ; Error
+ ;
+ LDtest_with_MA
+ B LDtest_with_MA
+ ;
+ LDD,MA -24(%r12),%r31
+ LDD,MA -16(%r12),%r31
+ LDD,MA -8(%r12),%r31
+ ; LDD,MA 0(%r12),%r31
+ ; LDD,MA (%r12),%r31 ; Error
+ ; LDD,MA %r6(%r12),%r31 ; Error
+ LDD,MA 8(%r12),%r31
+ LDD,MA 16(%r12),%r31
+ LDD,MA 24(%r12),%r31
+ ;
+ LDW,MA -24(%r12),%r31
+ LDW,MA -16(%r12),%r31
+ LDW,MA -8(%r12),%r31
+ ; LDW,MA 0(%r12),%r31 ; Error
+ ; LDW,MA (%r12),%r31 ; Error
+ ; LDW,MA %r6(%r12),%r31 ; Error
+ LDW,MA 8(%r12),%r31
+ LDW,MA 16(%r12),%r31
+ LDW,MA 24(%r12),%r31
+ ;
+ ; LDH,MA -24(%r12),%r31 ; error
+ LDH,MA -16(%r12),%r31
+ LDH,MA -8(%r12),%r31
+ ; LDH,MA 0(%r12),%r31 ; Error
+ ; LDH,MA (%r12),%r31 ; Error
+ ; LDH,MA %r6(%r12),%r31 ; Error
+ LDH,MA 8(%r12),%r31
+ ; LDH,MA 16(%r12),%r31 ; error
+ ; LDH,MA 24(%r12),%r31 ; error
+ ;
+ ; LDB,MA -24(%r12),%r31 ; error
+ LDB,MA -16(%r12),%r31
+ LDB,MA -8(%r12),%r31
+ ; LDB,MA 0(%r12),%r31 ; Error
+ ; LDB,MA (%r12),%r31 ; Error
+ ; LDB,MA %r6(%r12),%r31 ; Error
+ LDB,MA 8(%r12),%r31
+ ; LDB,MA 16(%r12),%r31 ; error
+ ; LDB,MA 24(%r12),%r31 ; error
+ ;
+ ; LDDA,MA -24(%r12),%r31 ; Error
+ LDDA,MA -16(%r12),%r31
+ LDDA,MA -8(%r12),%r31
+ ; LDDA,MA 0(%r12),%r31 ; Error
+ ; LDDA,MA (%r12),%r31 ; Error
+ ; LDDA,MA %r6(%r12),%r31 ; Error
+ LDDA,MA 8(%r12),%r31
+ ; LDDA,MA 16(%r12),%r31 ; Error
+ ; LDDA,MA 24(%r12),%r31 ; Error
+ ;
+ ; LDWA,MA -24(%r12),%r31 ; Error
+ LDWA,MA -16(%r12),%r31
+ LDWA,MA -8(%r12),%r31
+ ; LDWA,MA 0(%r12),%r31 ; Error
+ ; LDWA,MA (%r12),%r31 ; Error
+ ; LDWA,MA %r6(%r12),%r31 ; Error
+ LDWA,MA 8(%r12),%r31
+ ; LDWA,MA 16(%r12),%r31 ; Error
+ ; LDWA,MA 24(%r12),%r31 ; Error
+ ;
+ ; LDCD,MA -24(%r12),%r31 ; Error
+ LDCD,MA -16(%r12),%r31
+ LDCD,MA -8(%r12),%r31
+ ; LDCD,MA 0(%r12),%r31 ; Error
+ ; LDCD,MA (%r12),%r31 ; Error
+ ; LDCD,MA %r6(%r12),%r31 ; Error
+ LDCD,MA 8(%r12),%r31
+ ; LDCD,MA 16(%r12),%r31 ; Error
+ ; LDCD,MA 24(%r12),%r31 ; Error
+ ;
+ ; LDCW,MA -24(%r12),%r31 ; Error
+ LDCW,MA -16(%r12),%r31
+ LDCW,MA -8(%r12),%r31
+ ; LDCW,MA 0(%r12),%r31 ; Error
+ ; LDCW,MA (%r12),%r31 ; Error
+ ; LDCW,MA %r6(%r12),%r31 ; Error
+ LDCW,MA 8(%r12),%r31
+ ; LDCW,MA 16(%r12),%r31 ; Error
+ ; LDCW,MA 24(%r12),%r31 ; Error
+ ;
+ LDtest_with_MB
+ B LDtest_with_MB
+ ;
+ LDD,MB -24(%r12),%r31
+ LDD,MB -16(%r12),%r31
+ LDD,MB -8(%r12),%r31
+ LDD,MB 0(%r12),%r31
+ LDD,MB (%r12),%r31
+ ; LDD,MB %r6(%r12),%r31 ; Error
+ LDD,MB 8(%r12),%r31
+ LDD,MB 16(%r12),%r31
+ LDD,MB 24(%r12),%r31
+ ;
+ LDW,MB -24(%r12),%r31
+ LDW,MB -16(%r12),%r31
+ LDW,MB -8(%r12),%r31
+ LDW,MB 0(%r12),%r31
+ LDW,MB (%r12),%r31
+ ; LDW,MB %r6(%r12),%r31 ; Error
+ LDW,MB 8(%r12),%r31
+ LDW,MB 16(%r12),%r31
+ LDW,MB 24(%r12),%r31
+ ;
+ ; LDH,MB -24(%r12),%r31 ; error
+ LDH,MB -16(%r12),%r31
+ LDH,MB -8(%r12),%r31
+ LDH,MB 0(%r12),%r31
+ LDH,MB (%r12),%r31
+ ; LDH,MB %r6(%r12),%r31 ; Error
+ LDH,MB 8(%r12),%r31
+ ; LDH,MB 16(%r12),%r31 ; error
+ ; LDH,MB 24(%r12),%r31 ; error
+ ;
+ ; LDB,MB -24(%r12),%r31 ; error
+ LDB,MB -16(%r12),%r31
+ LDB,MB -8(%r12),%r31
+ LDB,MB 0(%r12),%r31
+ LDB,MB (%r12),%r31
+ ; LDB,MB %r6(%r12),%r31 ; Error
+ LDB,MB 8(%r12),%r31
+ ; LDB,MB 16(%r12),%r31 ; error
+ ; LDB,MB 24(%r12),%r31 ; error
+ ;
+ ; LDDA,MB -24(%r12),%r31 ; Error
+ LDDA,MB -16(%r12),%r31
+ LDDA,MB -8(%r12),%r31
+ LDDA,MB 0(%r12),%r31
+ LDDA,MB (%r12),%r31
+ ; LDDA,MB %r6(%r12),%r31 ; Error
+ LDDA,MB 8(%r12),%r31
+ ; LDDA,MB 16(%r12),%r31 ; Error
+ ; LDDA,MB 24(%r12),%r31 ; Error
+ ;
+ ; LDWA,MB -24(%r12),%r31 ; Error
+ LDWA,MB -16(%r12),%r31
+ LDWA,MB -8(%r12),%r31
+ LDWA,MB 0(%r12),%r31
+ LDWA,MB (%r12),%r31
+ ; LDWA,MB %r6(%r12),%r31 ; Error
+ LDWA,MB 8(%r12),%r31
+ ; LDWA,MB 16(%r12),%r31 ; Error
+ ; LDWA,MB 24(%r12),%r31 ; Error
+ ;
+ ; LDCD,MB -24(%r12),%r31 ; Error
+ LDCD,MB -16(%r12),%r31
+ LDCD,MB -8(%r12),%r31
+ LDCD,MB 0(%r12),%r31
+ LDCD,MB (%r12),%r31
+ ; LDCD,MB %r6(%r12),%r31 ; Error
+ LDCD,MB 8(%r12),%r31
+ ; LDCD,MB 16(%r12),%r31 ; Error
+ ; LDCD,MB 24(%r12),%r31 ; Error
+ ;
+ ; LDCW,MB -24(%r12),%r31 ; Error
+ LDCW,MB -16(%r12),%r31
+ LDCW,MB -8(%r12),%r31
+ LDCW,MB 0(%r12),%r31
+ LDCW,MB (%r12),%r31
+ ; LDCW,MB %r6(%r12),%r31 ; Error
+ LDCW,MB 8(%r12),%r31
+ ; LDCW,MB 16(%r12),%r31 ; Error
+ ; LDCW,MB 24(%r12),%r31 ; Error
+ ;
+ LDtest_with_O
+ B LDtest_with_O
+ ;
+ LDD,O 0(%r12),%r31
+ LDD,O (%r12),%r31
+ LDW,O 0(%r12),%r31
+ LDW,O (%r12),%r31
+ LDH,O 0(%r12),%r31
+ LDH,O (%r12),%r31
+ LDB,O 0(%r12),%r31
+ LDB,O (%r12),%r31
+ LDDA,O 0(%r12),%r31
+ LDDA,O (%r12),%r31
+ LDWA,O 0(%r12),%r31
+ LDWA,O (%r12),%r31
+ LDCD,O 0(%r12),%r31
+ LDCD,O (%r12),%r31
+ LDCW,O 0(%r12),%r31
+ LDCW,O (%r12),%r31
+ ;
+ STtest
+ b STtest
+ STD %r31,-24(%r12)
+ STD %r31,-16(%r12)
+ STD %r31,-8(%r12)
+ STD %r31,0(%r12)
+ STD %r31,(%r12)
+ STD %r31,8(%r12)
+ STD %r31,16(%r12)
+ STD %r31,24(%r12)
+ ;
+ STW %r31,-24(%r12)
+ STW %r31,-16(%r12)
+ STW %r31,-8(%r12)
+ STW %r31,0(%r12)
+ STW %r31,(%r12)
+ STW %r31,8(%r12)
+ STW %r31,16(%r12)
+ STW %r31,24(%r12)
+ ;
+ STH %r31,-24(%r12)
+ STH %r31,-16(%r12)
+ STH %r31,-8(%r12)
+ STH %r31,0(%r12)
+ STH %r31,(%r12)
+ STH %r31,8(%r12)
+ STH %r31,16(%r12)
+ STH %r31,24(%r12)
+ ;
+ STB %r31,-24(%r12)
+ STB %r31,-16(%r12)
+ STB %r31,-8(%r12)
+ STB %r31,0(%r12)
+ STB %r31,(%r12)
+ STB %r31,8(%r12)
+ STB %r31,16(%r12)
+ STB %r31,24(%r12)
+ ;
+ ; STDA %r31,-24(%r12) ; Error
+ STDA %r31,-16(%r12)
+ STDA %r31,-8(%r12)
+ STDA %r31,0(%r12)
+ STDA %r31,(%r12)
+ STDA %r31,8(%r12)
+ ; STDA %r31,16(%r12) ; Error
+ ; STDA %r31,24(%r12) ; Error
+ ;
+ ; STWA %r31,-24(%r12) ; Error
+ STWA %r31,-16(%r12)
+ STWA %r31,-8(%r12)
+ STWA %r31,0(%r12)
+ STWA %r31,(%r12)
+ STWA %r31,8(%r12)
+ ; STWA %r31,16(%r12) ; Error
+ ; STWA %r31,24(%r12) ; Error
+ ;
+ ; STDBY %r31,-24(%r12) ; Error
+ STDBY %r31,-16(%r12)
+ STDBY %r31,-8(%r12)
+ STDBY %r31,0(%r12)
+ STDBY %r31,(%r12)
+ STDBY %r31,8(%r12)
+ ; STDBY %r31,16(%r12) ; Error
+ ; STDBY %r31,24(%r12) ; Error
+ ;
+ ; STBY %r31,-24(%r12) ; Error
+ STBY %r31,-16(%r12)
+ STBY %r31,-8(%r12)
+ STBY %r31,0(%r12)
+ STBY %r31,(%r12)
+ STBY %r31,8(%r12)
+ ; STBY %r31,16(%r12) ; Error
+ ; STBY %r31,24(%r12) ; Error
+ ;
+ STtest_with_MA
+ b STtest_with_MA
+ STD,MA %r31,-24(%r12)
+ STD,MA %r31,-16(%r12)
+ STD,MA %r31,-8(%r12)
+ ; STD,MA %r31,0(%r12) ; Error
+ ; STD,MA %r31,(%r12) ; Error
+ STD,MA %r31,8(%r12)
+ STD,MA %r31,16(%r12)
+ STD,MA %r31,24(%r12)
+ ;
+ STW,MA %r31,-24(%r12)
+ STW,MA %r31,-16(%r12)
+ STW,MA %r31,-8(%r12)
+ ; STW,MA %r31,0(%r12) ; Error
+ ; STW,MA %r31,(%r12) ; Error
+ STW,MA %r31,8(%r12)
+ STW,MA %r31,16(%r12)
+ STW,MA %r31,24(%r12)
+ ;
+ ; STH,MA %r31,-24(%r12) ; Error
+ STH,MA %r31,-16(%r12)
+ STH,MA %r31,-8(%r12)
+ ; STH,MA %r31,0(%r12) ; Error
+ ; STH,MA %r31,(%r12) ; Error
+ STH,MA %r31,8(%r12)
+ ; STH,MA %r31,16(%r12) ; Error
+ ; STH,MA %r31,24(%r12) ; Error
+ ;
+ ; STB,MA %r31,-24(%r12) ; Error
+ STB,MA %r31,-16(%r12)
+ STB,MA %r31,-8(%r12)
+ ; STB,MA %r31,0(%r12) ; Error
+ ; STB,MA %r31,(%r12) ; Error
+ STB,MA %r31,8(%r12)
+ ; STB,MA %r31,16(%r12) ; Error
+ ; STB,MA %r31,24(%r12) ; Error
+ ;
+ ; STDA,MA %r31,-24(%r12) ; Error
+ STDA,MA %r31,-16(%r12)
+ STDA,MA %r31,-8(%r12)
+ ; STDA,MA %r31,0(%r12) ; Error
+ ; STDA,MA %r31,(%r12) ; Error
+ STDA,MA %r31,8(%r12)
+ ; STDA,MA %r31,16(%r12) ; Error
+ ; STDA,MA %r31,24(%r12) ; Error
+ ;
+ ; STWA,MA %r31,-24(%r12) ; Error
+ STWA,MA %r31,-16(%r12)
+ STWA,MA %r31,-8(%r12)
+ ; STWA,MA %r31,0(%r12) ; Error
+ ; STWA,MA %r31,(%r12) ; Error
+ STWA,MA %r31,8(%r12)
+ ; STWA,MA %r31,16(%r12) ; Error
+ ; STWA,MA %r31,24(%r12) ; Error
+ ;
+ STtest_with_MB
+ b STtest_with_MB
+ STD,MB %r31,-24(%r12)
+ STD,MB %r31,-16(%r12)
+ STD,MB %r31,-8(%r12)
+ STD,MB %r31,0(%r12)
+ STD,MB %r31,(%r12)
+ STD,MB %r31,8(%r12)
+ STD,MB %r31,16(%r12)
+ STD,MB %r31,24(%r12)
+ ;
+ STW,MB %r31,-24(%r12)
+ STW,MB %r31,-16(%r12)
+ STW,MB %r31,-8(%r12)
+ STW,MB %r31,0(%r12)
+ STW,MB %r31,(%r12)
+ STW,MB %r31,8(%r12)
+ STW,MB %r31,16(%r12)
+ STW,MB %r31,24(%r12)
+ ;
+ ; STH,MB %r31,-24(%r12) ; Error
+ STH,MB %r31,-16(%r12)
+ STH,MB %r31,-8(%r12)
+ STH,MB %r31,0(%r12)
+ STH,MB %r31,(%r12)
+ STH,MB %r31,8(%r12)
+ ; STH,MB %r31,16(%r12) ; Error
+ ; STH,MB %r31,24(%r12) ; Error
+ ;
+ ; STB,MB %r31,-24(%r12) ; Error
+ STB,MB %r31,-16(%r12)
+ STB,MB %r31,-8(%r12)
+ STB,MB %r31,0(%r12)
+ STB,MB %r31,(%r12)
+ STB,MB %r31,8(%r12)
+ ; STB,MB %r31,16(%r12) ; Error
+ ; STB,MB %r31,24(%r12) ; Error
+ ;
+ ; STDA,MB %r31,-24(%r12) ; Error
+ STDA,MB %r31,-16(%r12)
+ STDA,MB %r31,-8(%r12)
+ STDA,MB %r31,0(%r12)
+ STDA,MB %r31,(%r12)
+ STDA,MB %r31,8(%r12)
+ ; STDA,MB %r31,16(%r12) ; Error
+ ; STDA,MB %r31,24(%r12) ; Error
+ ;
+ ; STWA,MB %r31,-24(%r12) ; Error
+ STWA,MB %r31,-16(%r12)
+ STWA,MB %r31,-8(%r12)
+ STWA,MB %r31,0(%r12)
+ STWA,MB %r31,(%r12)
+ STWA,MB %r31,8(%r12)
+ ; STWA,MB %r31,16(%r12) ; Error
+ ; STWA,MB %r31,24(%r12) ; Error
+ ;
+ STtest_with_O
+ b STtest_with_O
+ STD,O %r31,0(%r12)
+ STD,O %r31,(%r12)
+ STW,O %r31,0(%r12)
+ STW,O %r31,(%r12)
+ STH,O %r31,0(%r12)
+ STH,O %r31,(%r12)
+ STB,O %r31,0(%r12)
+ STB,O %r31,(%r12)
+ STDA,O %r31,0(%r12)
+ STDA,O %r31,(%r12)
+ STWA,O %r31,0(%r12)
+ STWA,O %r31,(%r12)
+ ;
+ FLDtest
+ b FLDtest
+ FLDD -24(%r12),%fr8
+ FLDD -16(%r12),%fr8
+ FLDD -8(%r12),%fr8
+ FLDD 0(%r12),%fr8
+ FLDD (%r12),%fr8
+ FLDD %r6(%r12),%fr8
+ FLDD 8(%r12),%fr8
+ FLDD 16(%r12),%fr8
+ FLDD 24(%r12),%fr8
+ ;
+ FLDW -24(%r12),%fr8
+ FLDW -16(%r12),%fr8
+ FLDW -8(%r12),%fr8
+ FLDW 0(%r12),%fr8
+ FLDW (%r12),%fr8
+ FLDW %r6(%r12),%fr8
+ FLDW 8(%r12),%fr8
+ FLDW 16(%r12),%fr8
+ FLDW 24(%r12),%fr8
+ ;
+ FLDtest_with_MA
+ b FLDtest
+ FLDD,MA -24(%r12),%fr8
+ FLDD,MA -16(%r12),%fr8
+ FLDD,MA -8(%r12),%fr8
+ ; FLDD,MA 0(%r12),%fr8 ; Error
+ ; FLDD,MA (%r12),%fr8 ; Error
+ FLDD,MA 8(%r12),%fr8
+ FLDD,MA 16(%r12),%fr8
+ FLDD,MA 24(%r12),%fr8
+ ;
+ FLDW,MA -24(%r12),%fr8
+ FLDW,MA -16(%r12),%fr8
+ FLDW,MA -8(%r12),%fr8
+ ; FLDW,MA 0(%r12),%fr8 ; Error
+ ; FLDW,MA (%r12),%fr8 ; Error
+ FLDW,MA 8(%r12),%fr8
+ FLDW,MA 16(%r12),%fr8
+ FLDW,MA 24(%r12),%fr8
+ ;
+ FLDtest_with_MB
+ b FLDtest
+ FLDD,MB -24(%r12),%fr8
+ FLDD,MB -16(%r12),%fr8
+ FLDD,MB -8(%r12),%fr8
+ FLDD,MB 0(%r12),%fr8
+ FLDD,MB (%r12),%fr8
+ FLDD,MB 8(%r12),%fr8
+ FLDD,MB 16(%r12),%fr8
+ FLDD,MB 24(%r12),%fr8
+ ;
+ FLDW,MB -24(%r12),%fr8
+ FLDW,MB -16(%r12),%fr8
+ FLDW,MB -8(%r12),%fr8
+ FLDW,MB 0(%r12),%fr8
+ FLDW,MB (%r12),%fr8
+ FLDW,MB 8(%r12),%fr8
+ FLDW,MB 16(%r12),%fr8
+ FLDW,MB 24(%r12),%fr8
+ ;
+ FLDtest_with_O
+ b FLDtest_with_O
+ FLDD,O 0(%r12),%fr8
+ FLDD,O (%r12),%fr8
+ FLDW,O 0(%r12),%fr8
+ FLDW,O (%r12),%fr8
+ ;
+ FSTtest
+ b FSTtest
+ FSTD %fr8,-24(%r12)
+ FSTD %fr8,-16(%r12)
+ FSTD %fr8,-8(%r12)
+ FSTD %fr8,0(%r12)
+ FSTD %fr8,(%r12)
+ FSTD %fr8,%r6(%r12)
+ FSTD %fr8,8(%r12)
+ FSTD %fr8,16(%r12)
+ FSTD %fr8,24(%r12)
+ ;
+ FSTW %fr8,-24(%r12)
+ FSTW %fr8,-16(%r12)
+ FSTW %fr8,-8(%r12)
+ FSTW %fr8,0(%r12)
+ FSTW %fr8,(%r12)
+ FSTW %fr8,%r6(%r12)
+ FSTW %fr8,8(%r12)
+ FSTW %fr8,16(%r12)
+ FSTW %fr8,24(%r12)
+ ;
+ FSTtest_with_MA
+ b FSTtest_with_MA
+ FSTD,MA %fr8,-24(%r12)
+ FSTD,MA %fr8,-16(%r12)
+ FSTD,MA %fr8,-8(%r12)
+ ; FSTD,MA %fr8,0(%r12) ; Error
+ ; FSTD,MA %fr8,(%r12) ; Error
+ FSTD,MA %fr8,8(%r12)
+ FSTD,MA %fr8,16(%r12)
+ FSTD,MA %fr8,24(%r12)
+ ;
+ FSTW,MA %fr8,-24(%r12)
+ FSTW,MA %fr8,-16(%r12)
+ FSTW,MA %fr8,-8(%r12)
+ ; FSTW,MA %fr8,0(%r12) ; Error
+ ; FSTW,MA %fr8,(%r12) ; Error
+ FSTW,MA %fr8,8(%r12)
+ FSTW,MA %fr8,16(%r12)
+ FSTW,MA %fr8,24(%r12)
+ ;
+ FSTtest_with_MB
+ b FSTtest_with_MB
+ FSTD,MB %fr8,-24(%r12)
+ FSTD,MB %fr8,-16(%r12)
+ FSTD,MB %fr8,-8(%r12)
+ FSTD,MB %fr8,0(%r12)
+ FSTD,MB %fr8,(%r12)
+ FSTD,MB %fr8,8(%r12)
+ FSTD,MB %fr8,16(%r12)
+ FSTD,MB %fr8,24(%r12)
+ ;
+ FSTW,MB %fr8,-24(%r12)
+ FSTW,MB %fr8,-16(%r12)
+ FSTW,MB %fr8,-8(%r12)
+ FSTW,MB %fr8,0(%r12)
+ FSTW,MB %fr8,(%r12)
+ FSTW,MB %fr8,8(%r12)
+ FSTW,MB %fr8,16(%r12)
+ FSTW,MB %fr8,24(%r12)
+ ;
+ FSTtest_with_O
+ b FSTtest_with_O
+ FSTD,O %fr8,0(%r12)
+ FSTD,O %fr8,(%r12)
+ FSTW,O %fr8,0(%r12)
+ FSTW,O %fr8,(%r12)
+ ;
+ b FCNVtest
+ FCNVtest
+ FCNV,SGL,W %fr4L,%fr5L
+ FCNV,SGL,W %fr4L,%fr5R
+ FCNV,SGL,W %fr4R,%fr5L
+ FCNV,SGL,W %fr4R,%fr5R
+ FCNV,SGL,UW %fr4L,%fr5L
+ FCNV,SGL,UW %fr4L,%fr5R
+ FCNV,SGL,UW %fr4R,%fr5L
+ FCNV,SGL,UW %fr4R,%fr5R
+ FCNV,SGL,DBL %fr4L,%fr5
+ FCNV,SGL,DBL %fr4R,%fr5
+ FCNV,SGL,DW %fr4L,%fr5
+ FCNV,SGL,DW %fr4R,%fr5
+ FCNV,SGL,UDW %fr4L,%fr5
+ FCNV,SGL,UDW %fr4R,%fr5
+ FCNV,SGL,QUAD %fr4L,%fr5
+ FCNV,SGL,QW %fr4L,%fr5
+ FCNV,SGL,UQW %fr4L,%fr5
+ FCNV,W,SGL %fr4L,%fr5L
+ FCNV,W,SGL %fr4L,%fr5R
+ FCNV,W,SGL %fr4R,%fr5L
+ FCNV,W,SGL %fr4R,%fr5R
+ FCNV,W,DBL %fr4L,%fr5
+ FCNV,W,DBL %fr4R,%fr5
+ FCNV,W,QUAD %fr4L,%fr5
+ FCNV,UW,SGL %fr4L,%fr5L
+ FCNV,UW,SGL %fr4L,%fr5R
+ FCNV,UW,SGL %fr4R,%fr5L
+ FCNV,UW,SGL %fr4R,%fr5R
+ FCNV,UW,DBL %fr4L,%fr5
+ FCNV,UW,DBL %fr4R,%fr5
+ FCNV,UW,QUAD %fr4L,%fr5
+ FCNV,DBL,SGL %fr4,%fr5L
+ FCNV,DBL,SGL %fr4,%fr5R
+ FCNV,DBL,W %fr4,%fr5L
+ FCNV,DBL,W %fr4,%fr5R
+ FCNV,DBL,UW %fr4,%fr5L
+ FCNV,DBL,UW %fr4,%fr5R
+ FCNV,DBL,DW %fr4,%fr5
+ FCNV,DBL,UDW %fr4,%fr5
+ FCNV,DBL,QUAD %fr4,%fr5
+ FCNV,DBL,QW %fr4,%fr5
+ FCNV,DBL,UQW %fr4,%fr5
+ FCNV,DW,SGL %fr4,%fr5L
+ FCNV,DW,SGL %fr4,%fr5R
+ FCNV,DW,DBL %fr4,%fr5
+ FCNV,DW,QUAD %fr4,%fr5
+ FCNV,UDW,SGL %fr4,%fr5L
+ FCNV,UDW,SGL %fr4,%fr5R
+ FCNV,UDW,DBL %fr4,%fr5
+ FCNV,UDW,QUAD %fr4,%fr5
+ FCNV,QUAD,SGL %fr4,%fr5L
+ FCNV,QUAD,W %fr4,%fr5L
+ FCNV,QUAD,UW %fr4,%fr5L
+ FCNV,QUAD,DBL %fr4,%fr5
+ FCNV,QUAD,DW %fr4,%fr5
+ FCNV,QUAD,UDW %fr4,%fr5
+ FCNV,QUAD,QW %fr4,%fr5
+ FCNV,QUAD,UQW %fr4,%fr5
+ FCNV,QW,SGL %fr4,%fr5L
+ FCNV,QW,DBL %fr4,%fr5
+ FCNV,QW,QUAD %fr4,%fr5
+ FCNV,UQW,SGL %fr4,%fr5L
+ FCNV,UQW,DBL %fr4,%fr5
+ FCNV,UQW,QUAD %fr4,%fr5
+
+ b FCNV_with_T
+ FCNV_with_T
+
+ FCNV,SGL,T,W %fr4L,%fr5L
+ FCNV,SGL,W,T %fr4L,%fr5R
+ FCNV,T,SGL,W %fr4R,%fr5L
+ FCNV,SGL,T,W %fr4R,%fr5R
+ FCNV,SGL,UW,T %fr4L,%fr5L
+ FCNV,T,SGL,UW %fr4L,%fr5R
+ FCNV,SGL,T,UW %fr4R,%fr5L
+ FCNV,SGL,UW,T %fr4R,%fr5R
+ FCNV,SGL,DW,T %fr4L,%fr5
+ FCNV,T,SGL,DW %fr4R,%fr5
+ FCNV,SGL,T,UDW %fr4L,%fr5
+ FCNV,SGL,UDW,T %fr4R,%fr5
+ FCNV,SGL,QW,T %fr4L,%fr5
+ FCNV,SGL,T,UQW %fr4L,%fr5
+ FCNV,T,DBL,W %fr4,%fr5L
+ FCNV,DBL,T,W %fr4,%fr5R
+ FCNV,DBL,UW,T %fr4,%fr5L
+ FCNV,T,DBL,UW %fr4,%fr5R
+ FCNV,DBL,DW,T %fr4,%fr5
+ FCNV,T,DBL,UDW %fr4,%fr5
+ FCNV,DBL,QW,T %fr4,%fr5
+ FCNV,T,DBL,UQW %fr4,%fr5
+ FCNV,QUAD,W,T %fr4,%fr5L
+ FCNV,QUAD,T,UW %fr4,%fr5L
+ FCNV,QUAD,T,DW %fr4,%fr5
+ FCNV,QUAD,UDW,T %fr4,%fr5
+ FCNV,QUAD,T,QW %fr4,%fr5
+ FCNV,QUAD,UQW,T %fr4,%fr5
+
+ b BBWtest
+ BBWtest
+ BB,< %r8,0,BBWtest
+ BB,< %r8,1,BBWtest
+ BB,<,N %r8,30,BBWtest
+ BB,>=,N %r8,31,BBWtest
+ BB,< %r8,%sar,BBWtest
+ BB,>= %r8,%sar,BBWtest
+ BB,<,N %r8,%sar,BBWtest
+ BB,>=,N %r8,%sar,BBWtest
+ b BBWtest
+ BBDtest
+ BB,*< %r8,0,BBDtest
+ BB,*>= %r8,1,BBDtest
+ BB,*<,N %r8,30,BBDtest
+ BB,*<,N %r8,31,BBDtest
+ BB,*>=,N %r8,32,BBDtest
+ BB,*>=,N %r8,33,BBDtest
+ bb,*<,n %r2,60,BBDtest
+ BB,*<,N %r8,62,BBDtest
+ BB,*>=,N %r8,63,BBDtest
+ BB,*< %r8,%sar,BBDtest
+ BB,*>= %r8,%sar,BBDtest
+ BB,*<,N %r8,%sar,BBDtest
+ BB,*>=,N %r8,%sar,BBDtest
+
+ b systst
+ systst
+ RFI
+ RFI,R
+ PROBE,R (%sr2,%r9),%r8,%r7
+ PROBE,W (%sr2,%r9),%r8,%r7
+ PROBEI,R (%sr2,%r9),10,%r7
+ PROBEI,W (%sr2,%r9),10,%r7
+ LPA %r3(%r31),%r8
+ LPA,M %r3(%r31),%r8
+ PDTLB %r5(%sr2,%r9)
+ PDTLB,L %r5(%sr2,%r9)
+ PITLB %r5(%sr2,%r9)
+ PITLB,L %r5(%sr2,%r9)
+ PDTLB,M %r5(%sr2,%r9)
+ PDTLB,L,M %r5(%sr2,%r9)
+ PDTLB,M,L %r5(%sr2,%r9)
+ PITLB,M %r5(%sr2,%r9)
+ PITLB,L,M %r5(%sr2,%r9)
+ PITLB,M,L %r5(%sr2,%r9)
+ PDTLBE %r5(%r9)
+ PDTLBE,M %r5(%r9)
+ FIC %r5(%r9)
+ FIC %r5(%sr2,%r9)
+ FIC %r5(%sr6,%r9)
+ IDTLBT %r5,%r9
+ IITLBT %r5,%r9
+
+ b DShifts
+ DShifts
+ SHRPD %r9,%r10,4,%r10
+ SHRPD %r9,%r10,%sar,%r10
+ EXTRD,S %r9,8,4,%r10
+ EXTRD,U %r9,8,4,%r10
+ EXTRD %r9,8,4,%r10
+ EXTRD,S %r9,%sar,8,%r10
+ EXTRD,U %r9,%sar,8,%r10
+ EXTRD %r9,%sar,8,%r10
+ DEPD %r9,8,4,%r10
+ DEPD,Z %r9,8,4,%r10
+ DEPD %r9,%sar,8,%r10
+ DEPD,Z %r9,%sar,8,%r10
+ DEPDI 4,8,4,%r10
+ DEPDI,Z 4,8,4,%r10
+ DEPDI 4,%sar,8,%r10
+ DEPDI,Z 4,%sar,8,%r10
+ ;
+ b WShifts
+ WShifts
+ SHRPW %r9,%r10,4,%r10
+ SHRPW %r9,%r10,%sar,%r10
+ EXTRW,S %r9,8,4,%r10
+ EXTRW,U %r9,8,4,%r10
+ EXTRW %r9,8,4,%r10
+ EXTRW,S %r9,%sar,8,%r10
+ EXTRW,U %r9,%sar,8,%r10
+ EXTRW %r9,%sar,8,%r10
+ DEPW %r9,8,4,%r10
+ DEPW,Z %r9,8,4,%r10
+ DEPW %r9,%sar,8,%r10
+ DEPW,Z %r9,%sar,8,%r10
+ DEPWI 4,8,4,%r10
+ DEPWI,Z 4,8,4,%r10
+ DEPWI 4,%sar,8,%r10
+ DEPWI,Z 4,%sar,8,%r10
+
+ b dcortst
+ dcortst
+ DCOR %r5,%r6
+ DCOR,SHZ %r5,%r6
+ DCOR,I %r5,%r6
+ DCOR,I,SHZ %r5,%r6
+ DCOR,SHZ,I %r5,%r6
+ b uaddtst
+ uaddtst
+ UADDCM %r4,%r5,%r6
+ UADDCM,SDC %r4,%r5,%r6
+ UADDCM,TC %r4,%r5,%r6
+ UADDCM,SDC,TC %r4,%r5,%r6
+ b cmpbtst
+ cmpbtst
+ CMPB %r4,%r5,cmpbtst
+ CMPB,= %r4,%r5,cmpbtst
+ CMPB,< %r4,%r5,cmpbtst
+ CMPB,<= %r4,%r5,cmpbtst
+ CMPB,<< %r4,%r5,cmpbtst
+ CMPB,<<= %r4,%r5,cmpbtst
+ CMPB,SV %r4,%r5,cmpbtst
+ CMPB,OD %r4,%r5,cmpbtst
+ CMPB,TR %r4,%r5,cmpbtst
+ CMPB,<> %r4,%r5,cmpbtst
+ CMPB,>= %r4,%r5,cmpbtst
+ CMPB,> %r4,%r5,cmpbtst
+ CMPB,>>= %r4,%r5,cmpbtst
+ CMPB,>> %r4,%r5,cmpbtst
+ CMPB,NSV %r4,%r5,cmpbtst
+ CMPB,EV %r4,%r5,cmpbtst
+ CMPB,* %r4,%r5,cmpbtst
+ CMPB,*= %r4,%r5,cmpbtst
+ CMPB,*< %r4,%r5,cmpbtst
+ CMPB,*<= %r4,%r5,cmpbtst
+ CMPB,*<< %r4,%r5,cmpbtst
+ CMPB,*<<= %r4,%r5,cmpbtst
+ CMPB,*SV %r4,%r5,cmpbtst
+ CMPB,*OD %r4,%r5,cmpbtst
+ CMPB,*TR %r4,%r5,cmpbtst
+ CMPB,*<> %r4,%r5,cmpbtst
+ CMPB,*>= %r4,%r5,cmpbtst
+ CMPB,*> %r4,%r5,cmpbtst
+ CMPB,*>>= %r4,%r5,cmpbtst
+ CMPB,*>> %r4,%r5,cmpbtst
+ CMPB,*NSV %r4,%r5,cmpbtst
+ CMPB,*EV %r4,%r5,cmpbtst
+ b cmpibtst
+ cmpibtst
+ CMPIB 4,%r5,cmpibtst
+ CMPIB,= 4,%r5,cmpibtst
+ CMPIB,< 4,%r5,cmpibtst
+ CMPIB,<= 4,%r5,cmpibtst
+ CMPIB,<< 4,%r5,cmpibtst
+ CMPIB,<<= 4,%r5,cmpibtst
+ CMPIB,SV 4,%r5,cmpibtst
+ CMPIB,OD 4,%r5,cmpibtst
+ CMPIB,TR 4,%r5,cmpibtst
+ CMPIB,<> 4,%r5,cmpibtst
+ CMPIB,>= 4,%r5,cmpibtst
+ CMPIB,> 4,%r5,cmpibtst
+ CMPIB,>>= 4,%r5,cmpibtst
+ CMPIB,>> 4,%r5,cmpibtst
+ CMPIB,NSV 4,%r5,cmpibtst
+ CMPIB,EV 4,%r5,cmpibtst
+ CMPIB,*<< 4,%r5,cmpibtst
+ CMPIB,*= 4,%r5,cmpibtst
+ CMPIB,*< 4,%r5,cmpibtst
+ CMPIB,*<= 4,%r5,cmpibtst
+ CMPIB,*>>= 4,%r5,cmpibtst
+ CMPIB,*<> 4,%r5,cmpibtst
+ CMPIB,*>= 4,%r5,cmpibtst
+ CMPIB,*> 4,%r5,cmpibtst
+ b cmpclrtst
+ cmpclrtst
+ CMPCLR %r4,%r5,%r6
+ CMPCLR,= %r4,%r5,%r6
+ CMPCLR,< %r4,%r5,%r6
+ CMPCLR,<= %r4,%r5,%r6
+ CMPCLR,<< %r4,%r5,%r6
+ CMPCLR,<<= %r4,%r5,%r6
+ CMPCLR,SV %r4,%r5,%r6
+ CMPCLR,OD %r4,%r5,%r6
+ CMPCLR,TR %r4,%r5,%r6
+ CMPCLR,<> %r4,%r5,%r6
+ CMPCLR,>= %r4,%r5,%r6
+ CMPCLR,> %r4,%r5,%r6
+ CMPCLR,>>= %r4,%r5,%r6
+ CMPCLR,>> %r4,%r5,%r6
+ CMPCLR,NSV %r4,%r5,%r6
+ CMPCLR,EV %r4,%r5,%r6
+ CMPCLR,* %r4,%r5,%r6
+ CMPCLR,*= %r4,%r5,%r6
+ CMPCLR,*< %r4,%r5,%r6
+ CMPCLR,*<= %r4,%r5,%r6
+ CMPCLR,*<< %r4,%r5,%r6
+ CMPCLR,*<<= %r4,%r5,%r6
+ CMPCLR,*SV %r4,%r5,%r6
+ CMPCLR,*OD %r4,%r5,%r6
+ CMPCLR,*TR %r4,%r5,%r6
+ CMPCLR,*<> %r4,%r5,%r6
+ CMPCLR,*>= %r4,%r5,%r6
+ CMPCLR,*> %r4,%r5,%r6
+ CMPCLR,*>>= %r4,%r5,%r6
+ CMPCLR,*>> %r4,%r5,%r6
+ CMPCLR,*NSV %r4,%r5,%r6
+ CMPCLR,*EV %r4,%r5,%r6
+ b cmpiclrtst
+ cmpiclrtst
+ CMPICLR 4,%r5,%r6
+ CMPICLR,= 4,%r5,%r6
+ CMPICLR,< 4,%r5,%r6
+ CMPICLR,<= 4,%r5,%r6
+ CMPICLR,<< 4,%r5,%r6
+ CMPICLR,<<= 4,%r5,%r6
+ CMPICLR,SV 4,%r5,%r6
+ CMPICLR,OD 4,%r5,%r6
+ CMPICLR,TR 4,%r5,%r6
+ CMPICLR,<> 4,%r5,%r6
+ CMPICLR,>= 4,%r5,%r6
+ CMPICLR,> 4,%r5,%r6
+ CMPICLR,>>= 4,%r5,%r6
+ CMPICLR,>> 4,%r5,%r6
+ CMPICLR,NSV 4,%r5,%r6
+ CMPICLR,EV 4,%r5,%r6
+ CMPICLR,* 4,%r5,%r6
+ CMPICLR,*= 4,%r5,%r6
+ CMPICLR,*< 4,%r5,%r6
+ CMPICLR,*<= 4,%r5,%r6
+ CMPICLR,*<< 4,%r5,%r6
+ CMPICLR,*<<= 4,%r5,%r6
+ CMPICLR,*SV 4,%r5,%r6
+ CMPICLR,*OD 4,%r5,%r6
+ CMPICLR,*TR 4,%r5,%r6
+ CMPICLR,*<> 4,%r5,%r6
+ CMPICLR,*>= 4,%r5,%r6
+ CMPICLR,*> 4,%r5,%r6
+ CMPICLR,*>>= 4,%r5,%r6
+ CMPICLR,*>> 4,%r5,%r6
+ CMPICLR,*NSV 4,%r5,%r6
+ CMPICLR,*EV 4,%r5,%r6
+ b coprtst
+ coprtst
+ COPR,0,0
+ FID
+ COPR,7,0,n
+ COPR,1,0
+ COPR,7,31
+ COPR,7,32
+ COPR,7,64
+ COPR,7,128
+ COPR,7,256
+ COPR,7,512
+ COPR,7,0x400
+ COPR,7,0x800
+ COPR,7,0x1000
+ COPR,7,0x2000
+ COPR,7,0x4000
+ COPR,7,0x8000
+ COPR,7,0x10000
+ COPR,7,0x20000
+ COPR,7,0x40000
+ COPR,7,0x80000
+ COPR,7,0x100000
+ COPR,7,0x200000
+ b spop0tst
+ spop0tst
+ SPOP0,7,0
+ SPOP0,7,0,n
+ SPOP0,1,0
+ SPOP0,7,31
+ SPOP0,7,32
+ SPOP0,7,64
+ SPOP0,7,128
+ SPOP0,7,256
+ SPOP0,7,512
+ SPOP0,7,0x400
+ SPOP0,7,0x800
+ SPOP0,7,0x1000
+ SPOP0,7,0x2000
+ SPOP0,7,0x4000
+ SPOP0,7,0x8000
+ SPOP0,7,0x10000
+ SPOP0,7,0x20000
+ SPOP0,7,0x40000
+ SPOP0,7,0x80000
+ b spop1tst
+ spop1tst
+ SPOP1,7,0 %r5
+ SPOP1,7,0,n %r5
+ SPOP1,1,0 %r5
+ SPOP1,7,31 %r5
+ SPOP1,7,32 %r5
+ SPOP1,7,64 %r5
+ SPOP1,7,128 %r5
+ SPOP1,7,256 %r5
+ SPOP1,7,512 %r5
+ SPOP1,7,0x400 %r5
+ SPOP1,7,0x800 %r5
+ SPOP1,7,0x1000 %r5
+ SPOP1,7,0x2000 %r5
+ SPOP1,7,0x4000 %r5
+ b spop2tst
+ spop2tst
+ SPOP2,7,0 %r5
+ SPOP2,7,0,n %r5
+ SPOP2,1,0 %r5
+ SPOP2,7,31 %r5
+ SPOP2,7,32 %r5
+ SPOP2,7,64 %r5
+ SPOP2,7,128 %r5
+ SPOP2,7,256 %r5
+ SPOP2,7,512 %r5
+ SPOP2,7,0x400 %r5
+ SPOP2,7,0x800 %r5
+ SPOP2,7,0x1000 %r5
+ SPOP2,7,0x2000 %r5
+ SPOP2,7,0x4000 %r5
+ b spop3tst
+ spop3tst
+ SPOP3,7,0 %r5,%r8
+ SPOP3,7,0,n %r5,%r8
+ SPOP3,1,0 %r5,%r8
+ SPOP3,7,31 %r5,%r8
+ SPOP3,7,32 %r5,%r8
+ SPOP3,7,64 %r5,%r8
+ SPOP3,7,128 %r5,%r8
+ SPOP3,7,256 %r5,%r8
+ SPOP3,7,512 %r5,%r8
+ b additst
+ additst
+ ADDI 4,%r5,%r6
+ ADDI,TSV 4,%r5,%r6
+ ADDI,TC 4,%r5,%r6
+ ADDI,TSV,TC 4,%r5,%r6
+ ;
+ ADDI,= 4,%r5,%r6
+ ADDI,TSV,= 4,%r5,%r6
+ ADDI,TC,= 4,%r5,%r6
+ ADDI,TSV,TC,= 4,%r5,%r6
+ ;
+ b subitst
+ subitst
+ SUBI 4,%r5,%r6
+ SUBI,TSV 4,%r5,%r6
+ ;
+ SUBI,= 4,%r5,%r6
+ SUBI,TSV,= 4,%r5,%r6
+ ;
+ b addtst
+ addtst
+ ADD %r4,%r5,%r6
+ ADD,C %r4,%r5,%r6
+ ADD,DC %r4,%r5,%r6
+ ADD,L %r4,%r5,%r6
+ ADD,TSV %r4,%r5,%r6
+ ;
+ ADD,C,TSV %r4,%r5,%r6
+ ADD,DC,TSV %r4,%r5,%r6
+ ADD,TSV,C %r4,%r5,%r6
+ ADD,TSV,DC %r4,%r5,%r6
+ ;
+ ADD,= %r4,%r5,%r6
+ ADD,C,= %r4,%r5,%r6
+ ADD,DC,= %r4,%r5,%r6
+ ADD,L,= %r4,%r5,%r6
+ ADD,TSV,= %r4,%r5,%r6
+ ;
+ ADD,C,TSV,= %r4,%r5,%r6
+ ADD,DC,TSV,= %r4,%r5,%r6
+ ADD,TSV,C,= %r4,%r5,%r6
+ ADD,TSV,DC,= %r4,%r5,%r6
+ ;
+ b shladdtst
+ shladdtst
+ SHLADD %r4,1,%r5,%r6
+ SHLADD,L %r4,2,%r5,%r6
+ SHLADD,TSV %r4,3,%r5,%r6
+ ;
+ SHLADD,= %r4,1,%r5,%r6
+ SHLADD,L,= %r4,2,%r5,%r6
+ SHLADD,TSV,= %r4,3,%r5,%r6
+ ;
+ b subtst
+ subtst
+ SUB %r4,%r5,%r6
+ SUB,B %r4,%r5,%r6
+ SUB,DB %r4,%r5,%r6
+ SUB,TC %r4,%r5,%r6
+ SUB,TSV %r4,%r5,%r6
+ ;
+ SUB,B,TSV %r4,%r5,%r6
+ SUB,DB,TSV %r4,%r5,%r6
+ SUB,TC,TSV %r4,%r5,%r6
+ SUB,TSV,B %r4,%r5,%r6
+ SUB,TSV,DB %r4,%r5,%r6
+ SUB,TSV,TC %r4,%r5,%r6
+ ;
+ SUB,= %r4,%r5,%r6
+ SUB,B,= %r4,%r5,%r6
+ SUB,DB,= %r4,%r5,%r6
+ SUB,TC,= %r4,%r5,%r6
+ SUB,TSV,= %r4,%r5,%r6
+ ;
+ SUB,B,TSV,= %r4,%r5,%r6
+ SUB,DB,TSV,= %r4,%r5,%r6
+ SUB,TC,TSV,= %r4,%r5,%r6
+ SUB,TSV,B,= %r4,%r5,%r6
+ SUB,TSV,DB,= %r4,%r5,%r6
+ SUB,TSV,TC,= %r4,%r5,%r6
+ ;
+ b gate
+ gate
+ B,GATE test
+ B,GATE test,%r1
+ B,GATE test,%r2
+ B,GATE test,%r31
+
+ B btst
+ btst
+ B,L test,%r0
+ B,L test,%r1
+ B,L test,%r2
+ B,L,PUSH test
+ B,L,PUSH test,%r2
+ B,PUSH,L test
+ B,PUSH,L test,%r2
+
+ B betst
+ betst
+ BE test(%r8)
+ BE,L test(%r8)
+ BE,L test(%r8),%r31
+
+ B bvetst
+ bvetst
+ BVE (%r8)
+ BVE,L (%r8)
+ BVE,POP (%r8)
+
+ BVE,L (%r8),%r2
+ BVE,L,PUSH (%r8)
+ BVE,L,PUSH (%r8),%r2
+ BVE,PUSH,L (%r8)
+ BVE,PUSH,L (%r8),%r2
+
+ B bts_tst
+ bts_tst
+
+ PUSHNOM
+ CLRBTS
+ POPBTS 1
+ POPBTS 255
+ POPBTS 256
+ POPBTS 511
+ PUSHBTS %r0
+ PUSHBTS %r1
+ PUSHBTS %r31
+
+ b hsh
+ hsh
+ HSHLADD %r4,1,%r5,%r6
+ HSHLADD %r4,2,%r5,%r6
+ HSHLADD %r4,3,%r5,%r6
+ HSHRADD %r4,1,%r5,%r6
+ HSHRADD %r4,2,%r5,%r6
+ HSHRADD %r4,3,%r5,%r6
+
+ b sh
+ sh
+ SHLADD %r4,1,%r5,%r6
+ SHLADD %r4,2,%r5,%r6
+ SHLADD %r4,3,%r5,%r6
+
+
+ b mixs
+ mixs
+ MIXH,L %r1,%r2,%r3
+ MIXH,R %r1,%r2,%r3
+ MIXW,L %r1,%r2,%r3
+ MIXW,R %r1,%r2,%r3
+
+ b hw_shifts
+
+ hw_shifts
+ HSHL %r4,0,%r6
+ HSHR,U %r4,1,%r6
+ HSHR,S %r4,2,%r6
+ HSHL %r4,3,%r6
+ HSHR,U %r4,4,%r6
+ HSHR,S %r4,5,%r6
+ HSHL %r4,6,%r6
+ HSHR,U %r4,7,%r6
+ HSHR,S %r4,8,%r6
+ HSHL %r4,9,%r6
+ HSHR,U %r4,10,%r6
+ HSHR,S %r4,11,%r6
+ HSHL %r4,12,%r6
+ HSHR,U %r4,13,%r6
+ HSHR,S %r4,14,%r6
+ HSHL %r4,15,%r6
+
+ b fcmp3
+ fcmp3
+ fcmp,=,sgl,c0 %fr4l,%fr5r
+ fcmp,<,c1,dbl %fr5,%fr6
+ fcmp,sgl,<=,c2 %fr6r,%fr7l
+ fcmp,dbl,c3,> %fr7,%fr8
+ fcmp,c4,>=,sgl %fr8l,%fr9r
+ fcmp,c5,dbl,<> %fr9,%fr10
+ b fcmp2
+ fcmp2
+ fcmp,=,sgl %fr4l,%fr5r
+ fcmp,<,c6 %fr5,%fr6
+ fcmp,sgl,<= %fr6r,%fr7l
+ fcmp,dbl,c0 %fr7,%fr8
+ fcmp,c1,>= %fr8l,%fr9r
+ fcmp,c2,dbl %fr9,%fr10
+ b fcmp1
+ fcmp1
+ fcmp,< %fr5,%fr6
+ fcmp,dbl %fr7,%fr8
+ fcmp,c3 %fr9,%fr10
+ b fcmp0
+ fcmp0
+ fcmp %fr4l,%fr5r
+
+ b ftest2
+ ftest2
+ FTEST,ACC,C0
+ b ftest1a
+ ftest1a
+ FTEST,ACC
+ FTEST,ACC8
+ FTEST,ACC6
+ FTEST,ACC4
+ FTEST,ACC2
+ FTEST,REJ
+ FTEST,REJ8
+ b ftest1b
+ ftest1b
+ FTEST,C0
+ FTEST,C1
+ FTEST,C2
+ FTEST,C3
+ FTEST,C4
+ FTEST,C5
+ FTEST,C6
+ b ftest0
+ ftest0
+ FTEST
+
+ b fpin
+ fpin
+ FNEG,SGL %fr5R,%fr6L
+ FNEGABS,SGL %fr5R,%fr6L
+ FMPYFADD,SGL %fr6R,%fr12L,%fr18R,%fr24L
+ FMPYNFADD,SGL %fr6L,%fr12R,%fr18L,%fr24R
+
+ FNEG,DBL %fr5,%fr6
+ FNEGABS,DBL %fr5,%fr6
+ FMPYFADD,DBL %fr6,%fr12,%fr18,%fr24
+ FMPYNFADD,DBL %fr7,%fr13,%fr19,%fr25
+
+ b mmin
+ mmin
+ FIC %r5(%r9)
+ FIC %r5(%sr2,%r9)
+ FIC %r5(%sr6,%r9)
+ IDTLBT %r5,%r9
+ IITLBT %r5,%r9
+ PDTLB %r5(%sr2,%r9)
+ PDTLB,L %r5(%sr2,%r9)
+ PITLB %r5(%sr2,%r9)
+ PITLB,L %r5(%sr2,%r9)
+
+ b sysin
+ sysin
+ sync
+ syncdma
+ mfia %r10
+ mtsarcm %r10
+
+ b compl64
+ compl64
+ ADD,* %r5,%r6,%r7
+ ADD,*= %r5,%r6,%r7
+ ADD,*< %r5,%r6,%r7
+ ADD,*<= %r5,%r6,%r7
+ SUB,*<< %r5,%r6,%r7
+ SUB,*<<= %r5,%r6,%r7
+ ADD,*SV %r5,%r6,%r7
+ ADD,*OD %r5,%r6,%r7
+ ADD,*<> %r5,%r6,%r7
+ ADD,*>= %r5,%r6,%r7
+ ADD,*> %r5,%r6,%r7
+ SUB,*>>= %r5,%r6,%r7
+ SUB,*>> %r5,%r6,%r7
+ ADD,*NSV %r5,%r6,%r7
+ ADD,*EV %r5,%r6,%r7
+ ADD,*TR %r5,%r6,%r7
+ ADD,*NUV %r5,%r6,%r7
+ ADD,*ZNV %r5,%r6,%r7
+ ADD,*UV %r5,%r6,%r7
+ ADD,*VNZ %r5,%r6,%r7
+ UADDCM,*SWZ %r5,%r6,%r7
+ UADDCM,*SBZ %r5,%r6,%r7
+ UADDCM,*SHZ %r5,%r6,%r7
+ UADDCM,*SDC %r5,%r6,%r7
+ UADDCM,*SWC %r5,%r6,%r7
+ UADDCM,*SBC %r5,%r6,%r7
+ UADDCM,*SHC %r5,%r6,%r7
+ UADDCM,*NWZ %r5,%r6,%r7
+ UADDCM,*NBZ %r5,%r6,%r7
+ UADDCM,*NHZ %r5,%r6,%r7
+ UADDCM,*NDC %r5,%r6,%r7
+ UADDCM,*NWC %r5,%r6,%r7
+ UADDCM,*NBC %r5,%r6,%r7
+ UADDCM,*NHC %r5,%r6,%r7
+
+ b WordUnit
+ WordUnit
+ UADDCM %r5,%r6,%r7
+ UADDCM,SBZ %r5,%r6,%r7
+ UADDCM,SHZ %r5,%r6,%r7
+ UADDCM,SDC %r5,%r6,%r7
+ UADDCM,SBC %r5,%r6,%r7
+ UADDCM,SHC %r5,%r6,%r7
+ UADDCM,TR %r5,%r6,%r7
+ UADDCM,NBZ %r5,%r6,%r7
+ UADDCM,NHZ %r5,%r6,%r7
+ UADDCM,NDC %r5,%r6,%r7
+ UADDCM,NBC %r5,%r6,%r7
+ UADDCM,NHC %r5,%r6,%r7
+ .import Long,code
+ .import Short,code
+ Back
+ B,L Back,%r2
+ B,L Short,%r2
+ BE,L Back(%sr1,%r8),%r31
+ BE Back(%r0)
+ BE,L Short(%r0)
+ BV %r5(%r8)
+ BVE (%r8)
+ ;
+ ; with nullify
+ ;
+ BVE,N (%r8)
+
+ .exit
+ .procend
+
+ mainend
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+ NOP
+
+ .exit
+ .procend
+
+ .end
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20.com gdb/testsuite/gdb.disasm/pa20.com
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20.com Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20.com Thu Jul 22 17:49:48 1999
***************
*** 0 ****
--- 1 ----
+ x/709i main
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20.exp gdb/testsuite/gdb.disasm/pa20.exp
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20.exp Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20.exp Thu Jul 22 17:49:48 1999
***************
*** 0 ****
--- 1,74 ----
+ # pa20.exp Tests gdb disassembly operations for PA2.0 code
+ #
+ if ![istarget "hppa*-*-*"] {
+ verbose "Tests ignored for all but hppa based targets."
+ return
+ }
+
+ if $tracelevel {
+ strace $tracelevel
+ }
+
+ set prms_id 0
+ set bug_id 0
+
+ # use this to debug:
+ #log_user 1
+
+ set testfile pa20
+ set srcfile ${srcdir}/${subdir}/pa20-instr.s
+ set binfile ${srcdir}/${subdir}/${testfile}
+ set outfile ${objdir}/${subdir}/${testfile}.out
+ set comfile ${srcdir}/${subdir}/${testfile}.com
+ set tmpfile ${objdir}/${subdir}/${testfile}.tmp
+ set sedfile ${srcdir}/${subdir}/pa-sed.cmd
+ set diffile ${objdir}/${subdir}/${testfile}.dif
+ set tmp2file ${objdir}/${subdir}/${testfile}.tmp2
+
+ gdb_exit
+ remote_exec build "rm -f ${tmpfile} ${tmp2file} ${diffile}"
+
+ # To build a pa 2.0 executable
+ #
+ # as -o pa20 pa20-instr.s
+ # or
+ # cc -g -o pa20 pa20-instr.s
+ #
+ # The +DA2.0N flag doesn't seem to be needed.
+ #
+ # Don't reject if there are warnings, as we expect this warning:
+ #
+ # (Warning) At least one PA 2.0 object file (pa20-instr.o) was detected.
+ # The linked output may not run on a PA 1.x system.
+ #
+ # compile "${srcfile} -g -o ${binfile}"
+
+
+ # This non-standard start-up sequence is taken from that for
+ # the standard "gdb_start" in
+ # /CLO/Components/WDB/Src/gdb/gdb/testsuite/lib/gdb.exp
+ #
+ global GDB
+ if { [which $GDB] == 0 } {
+ perror "$GDB does not exist."
+ exit 1
+ }
+
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmpfile} $GDB -nx -batch -silent -se ${binfile} -command ${comfile}"
+
+ # Remove actual addresses, which may vary.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmp2file} sed -f ${sedfile} ${tmpfile}"
+
+ # Should be no differences after processing.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${diffile} diff ${outfile} ${tmp2file}"
+ set exec_output [remote_exec build "wc -l ${diffile}"]
+
+ if [ regexp "^0 {0 ${diffile}" ${exec_output} ] {
+ pass "Disassembly of HPPA 2.0 instructions"
+ } else {
+ fail "Disassembly of HPPA 2.0 instructions"
+ }
+
+ return 0
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20.out gdb/testsuite/gdb.disasm/pa20.out
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20.out Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20.out Thu Jul 22 17:49:48 1999
***************
*** 0 ****
--- 1,709 ----
+ <main>: pdc r5(sr0,r6)
+ <main+4>: pdc,m r5(sr0,r6)
+ <main+8>: fdc r5(sr0,r6)
+ <main+12>: fdc,m r5(sr0,r6)
+ <main+16>: fic r5(sr0,r6)
+ <main+20>: fic,m r5(sr0,r6)
+ <main+24>: fcnvff,sgl,dbl fr4,fr6
+ <main+28>: fneg,sgl fr0,fr6
+ <main+32>: fneg,sgl fr0,fr6
+ <main+36>: fneg,dbl fr0,fr6
+ <main+40>: fneg,quad fr0,fr6
+ <main+44>: fnegabs,sgl fr0,fr6
+ <main+48>: fnegabs,sgl fr0,fr6
+ <main+52>: fnegabs,dbl fr0,fr6
+ <main+56>: fnegabs,quad fr0,fr6
+ <main+60>: fmpyfadd,sgl fpe4,fpe4,fr6,fr8
+ <main+64>: fmpyfadd,sgl fpe4,fpe4,fr6,fr8
+ <main+68>: fmpyfadd,dbl fpe4,fpe4,fr6,fr8
+ <main+72>: fmpyfadd,dbl fpe4,fpe4,fr6,fr8
+ <main+76>: fmpynfadd,sgl fpe4,fpe4,fr6,fr8
+ <main+80>: fmpynfadd,sgl fpe4,fpe4,fr6,fr8
+ <main+84>: fmpynfadd,dbl fpe4,fpe4,fr6,fr8
+ <main+88>: fmpynfadd,dbl fpe4,fpe4,fr6,fr8
+ <main+92>: fcmp,sgl,true fpe4,fr4,3
+ <main+96>: ftest3
+ <main+100>: pmenb
+ <main+104>: copr,2,0x20
+ <main+108>: copr,2,0x22
+ <main+112>: mtsarcm r5
+ <main+116>: idtlbt r5,r6
+ <main+120>: iltlbt r5,r6
+ <main+124>: fldd 0x200(sr0,r4),fr5
+ <main+128>: fldd,ma 0x200(sr0,r4),fr5
+ <main+132>: fldds,ma 0(sr0,r4),fr5
+ <main+136>: fldw 0x400(sr0,r4),fr5
+ <main+140>: fldw,a 0x400(sr0,r4),fr5
+ <main+144>: fldw,b 0x400(sr0,r4),fr5
+ <main+148>: fstd fr5,0x400(sr0,r4)
+ <main+152>: fstds,ma fr5,0(sr0,r4)
+ <main+156>: fstd,ma fr5,0x400(sr0,r4)
+ <main+160>: fstd,mb fr5,0x400(sr0,r4)
+ <main+164>: mixw,l r4,r5,r6
+ <main+168>: mixw,l r4,r5,r6
+ <main+172>: mixw,r r4,r5,r6
+ <main+176>: mixh,l r4,r5,r6
+ <main+180>: mixh,l r4,r5,r6
+ <main+184>: mixh,r r4,r5,r6
+ <main+188>: hadd r1,rp,r3
+ <main+192>: hadd,us r3,r4,r5
+ <main+196>: hadd,ss r6,r7,r8
+ <main+200>: hsub r1,rp,r3
+ <main+204>: hsub,us r3,r4,r5
+ <main+208>: hsub,ss r6,r7,r8
+ <main+212>: havg r6,r7,r8
+ <main+216>: hshladd r3,3,r4,r5
+ <main+220>: hshradd r3,1,r4,r5
+ <main+224>: hshl r3,11,r4
+ <main+228>: hshr,s r0,11,r4
+ <main+232>: hshr,u r0,11,r4
+ <main+236>: hshr,s r0,11,r4
+ <main+240>: permh,1230 r1,r3
+ <main+244>: depdi 0xc,sar,17,r3
+ <main+248>: depdi,z 0xc,sar,17,r3
+ <main+252>: depdi,z,= 0xc,sar,17,r3
+ <main+256>: extrd,s,< r3,12,13,r4
+ <main+260>: extrd,u,= r3,sar,19,r4
+ <main+264>: bvb,< r9,sar,<labelc>
+ <main+268>: bb,>=,n r9,0x1f,<labelc>
+ <main+272>: shrpd r5,r6,41,r7
+ <main+276>: shrpd,= r1,rp,sar,r3
+ <main+280>: shrpd,<= r6,r7,sar,r3
+ <main+284>: bve (r6)
+ <main+288>: bve,n (r6)
+ <main+292>: bve,l (r5)
+ <main+296>: bve,l,push (r5)
+ <main+300>: bve,pop (r5)
+ <main+304>: pushnom
+ <main+308>: clrbts
+ <main+312>: popbts 6
+ <main+316>: pushbts r4
+ <main+320>: ldd r1(sr0,rp),r3
+ <main+324>: ldd,ma 0xa(sr0,rp),r3
+ <main+328>: ldd,mb 0(sr0,rp),r3
+ <main+332>: ldd,ma 0(sr0,rp),r3
+ <main+336>: ldd,ma 4(sr0,rp),r3
+ <main+340>: ldda r1(rp),r3
+ <main+344>: ldda,ma 8(rp),r3
+ <main+348>: ldda,mb 0(rp),r3
+ <main+352>: ldda,ma 0(rp),r3
+ <main+356>: ldda,ma 8(rp),r3
+ <main+360>: std r1,0(sr0,rp)
+ <main+364>: std,ma r1,0xa(sr0,rp)
+ <main+368>: std,mb r1,0(sr0,rp)
+ <main+372>: std,o r1,0(sr0,rp)
+ <main+376>: std,ma r1,4(sr0,rp)
+ <main+380>: stda r1,0(rp)
+ <main+384>: stda,ma r1,0xa(rp)
+ <main+388>: stda,mb r1,0(rp)
+ <main+392>: stda,o r1,0(rp)
+ <main+396>: stda,ma r1,4(rp)
+ <main+400>: ldcd r1(sr0,rp),r3
+ <main+404>: ldcd,m r1(sr0,rp),r3
+ <main+408>: ldcd,ma 0xa(sr0,rp),r3
+ <main+412>: ldcd,mb 0(sr0,rp),r3
+ <main+416>: ldcd,ma 0(sr0,rp),r3
+ <main+420>: ldcd,ma 4(sr0,rp),r3
+ <main+424>: stdby r1,5(sr0,rp)
+ <main+428>: stdby r1,5(sr0,rp)
+ <main+432>: stdby,b,m r1,5(sr0,rp)
+ <main+436>: stdby,e,m r1,5(sr0,rp)
+ <main+440>: stdby,e r1,5(sr0,rp)
+ <main+444>: ldd r1(sr0,rp),r3
+ <main+448>: ldd 0xa(sr0,rp),r3
+ <main+452>: add r1,rp,r3
+ <main+456>: addc r0,r1,rp
+ <main+460>: addc,d r0,r1,rp
+ <main+464>: addl r1,rp,r3
+ <main+468>: addo r3,r4,r5
+ <main+472>: addco r3,r4,r5
+ <main+476>: addco,d r3,r4,r5
+ <main+480>: addb,= r25,r26,<labelb>
+ <main+484>: addb,=,n r25,r26,<labelb>
+ <main+488>: addb,sv dp,ret0,<main>
+ <main+492>: addb,od dp,ret0,<main>
+ <main+496>: addbf dp,ret0,<main>
+ <main+500>: addbf,sv dp,ret0,<main>
+ <main+504>: addbf,od dp,ret0,<main>
+ <main+508>: addbf,= dp,ret0,<main>
+ <main+512>: addbf,nuv r1,r5,<main>
+ <main+516>: addbf,<=,n r10,r6,<labelb>
+ <main+520>: addb,nuv r1,r5,<main>
+ <main+524>: addb,<=,n r10,r6,<labelb>
+ <main+528>: addc ret0,ret1,sp
+ <main+532>: addc,uv ret0,ret1,sp
+ <main+536>: addco ret0,ret1,sp
+ <main+540>: addco,uv ret0,ret1,sp
+ <main+544>: addi 0,rp,r0
+ <main+548>: addi,> 1,r3,r0
+ <main+552>: addi,< 2,r4,r0
+ <main+556>: addibf,< -1,r5,<main>
+ <main+560>: addib,<=,n 0xa,r6,<labelb>
+ <main+564>: addibf,nuv -1,r5,<main>
+ <main+568>: addibf,<=,n 0xa,r6,<labelb>
+ <main+572>: addib,nuv -1,r5,<main>
+ <main+576>: addib,<=,n 0xa,r6,<labelb>
+ <main+580>: addil -0x800,r3
+ <main+584>: addil 0x88b8000,r3
+ <main+588>: addio 4,r22,r21
+ <main+592>: addio,< 4,r22,r21
+ <main+596>: addit 4,r22,r21
+ <main+600>: addit,tr 4,r22,r21
+ <main+604>: addito 0x3a6,r25,r24
+ <main+608>: addito,<> 0x3ff,r25,r24
+ <main+612>: addo ret0,ret1,sp
+ <main+616>: addo,sv ret0,ret1,sp
+ <main+620>: addl ret0,ret1,sp
+ <main+624>: addl,nsv ret0,ret1,sp
+ <main+628>: and sp,r31,sp
+ <main+632>: and,< sp,r31,sp
+ <main+636>: andcm r26,dp,ret0
+ <main+640>: andcm,> r26,dp,ret0
+ <labelb>: b <labelc>
+ <labelb+4>: b,n <labelc>
+ <labelb+8>: gate <labelc>,r0
+ <labelb+12>: bl <labelb>,r3
+ <labelb+16>: bvb,< r9,sar,<labelc>
+ <labelb+20>: bb,>=,n r9,0x1f,<labelc>
+ <labelb+24>: be 0x64(sr4,r11)
+ <labelb+28>: ble 0(sr4,r11)
+ <labelb+32>: bl <labelb>,r3
+ <labelb+36>: bl,n <labelb>,r3
+ <labelb+40>: ble 0x3038(sr0,r3)
+ <labelb+44>: ble,n 0x3038(sr0,r3)
+ <labelb+48>: blr r31,r3
+ <labelb+52>: blr,n r0,r3
+ <labelb+56>: break 0,1
+ <labelb+60>: break 0x1f,0x3e8
+ <labelb+64>: bv r0(r1)
+ <labelb+68>: bv,n r0(r20)
+ <labelb+72>: bvb,< r3,sar,<main>
+ <labelb+76>: bvb,<,n r3,sar,<main>
+ <labelb+80>: bve (r5)
+ <labelb+84>: bve,pop (r5)
+ <labelb+88>: bve,l (r5)
+ <labelb+92>: bve,l,push (r5)
+ <labelc>: fldds 0(sr2,r0),fr0
+ <labelc+4>: cldds,1,ma 1(sr2,r1),rp
+ <labelc+8>: cldds,2,mb 9(sr2,r6),r3
+ <labelc+12>: flddx r3(sr2,r10),fr0
+ <labelc+16>: flddx,s r3(sr2,r20),fpe2
+ <labelc+20>: clddx,1,m r3(sr2,sp),rp
+ <labelc+24>: clddx,2,sm r3(sr2,r0),r3
+ <labelc+28>: fldws 0(sr2,r0),fr0
+ <labelc+32>: fldws,ma 3(sr2,r0),fpe5
+ <labelc+36>: cldws,2,mb 7(sr2,r0),r3
+ <labelc+40>: fldwx r3(sr2,r0),fr0
+ <labelc+44>: fldwx,s r3(sr2,r0),fpe2
+ <labelc+48>: fldwx,m r3(sr2,r0),fpe5
+ <labelc+52>: cldwx,2,sm r3(sr2,r0),r3
+ <labelc+56>: comb,< r11,r12,<labelc>
+ <labelc+60>: combf,<,n r11,r12,<main>
+ <labelc+64>: comclr,<> rp,r3,r4
+ <labelc+68>: comib,<= 0,rp,<labeld>
+ <labelc+72>: comibf,sv,n -0x10,rp,<labeld>
+ <labelc+76>: comiclr,od 0x3e8,r0,r31
+ <labelc+80>: combf,<= r0,rp,<labeld>
+ <labelc+84>: combf,<<,n r16,rp,<labeld>
+ <labelc+88>: comb,<= r0,rp,<labeld>
+ <labelc+92>: comb,<<,n r16,rp,<labeld>
+ <labelc+96>: comclr r11,r12,r13
+ <labelc+100>: comclr,>= r11,r12,r13
+ <labelc+104>: comibf,<= 0,rp,<labeld>
+ <labelc+108>: comibf,<<=,n -0x10,rp,<labeld>
+ <labelc+112>: comib,<= 0,rp,<labeld>
+ <labelc+116>: comib,<,n -0x10,rp,<labeld>
+ <labelc+120>: comiclr 1,r3,r4
+ <labelc+124>: comiclr,ev 0x9d,r3,r4
+ <labelc+128>: fid
+ <labelc+132>: copr,7,0
+ <labelc+136>: copr,7,0xff
+ <labelc+140>: ldo 0(r3),r4
+ <labelc+144>: fstds fr8,0(sr1,r31)
+ <labelc+148>: cstds,7,ma r11,2(sr1,r3)
+ <labelc+152>: cstds,4,mb r14,2(sr1,r3)
+ <labelc+156>: fstws fr8,0(sr1,r31)
+ <labelc+160>: cstws,7,ma r11,2(sr1,r3)
+ <labelc+164>: cstws,4,mb r14,2(sr1,r3)
+ <labeld>: dcor r3,r4
+ <labeld+4>: idcor r3,r4
+ <labeld+8>: dcor,sbz r4,r5
+ <labeld+12>: dcor,shz r4,r6
+ <labeld+16>: dcor,sdc r4,r7
+ <labeld+20>: dcor,sbc r4,r8
+ <labeld+24>: dcor,shc r4,r9
+ <labeld+28>: dcor,nbz r4,r10
+ <labeld+32>: dcor,nhz r4,r11
+ <labeld+36>: dcor,ndc r4,r12
+ <labeld+40>: dcor,nbc r4,r13
+ <labeld+44>: dcor,nhc r4,r14
+ <labeld+48>: dep r21,14,3,r22
+ <labeld+52>: dep,>= r21,14,3,r22
+ <labeld+56>: depi 1,14,3,r22
+ <labeld+60>: depi,>= 2,14,3,r22
+ <labeld+64>: dep r19,1,2,r1
+ <labeld+68>: zdep r19,1,2,r1
+ <labeld+72>: zvdep r19,31,r1
+ <labeld+76>: zdep,< r19,30,1,r1
+ <labeld+80>: depi 0xf,0,1,rp
+ <labeld+84>: zdepi -0x10,0,1,rp
+ <labeld+88>: diag 0x1e240
+ <labeld+92>: ds r1,rp,r3
+ <labeld+96>: ds,<> r1,rp,r3
+ <labeld+100>: extrs r1,3,4,rp
+ <labeld+104>: extrs,od r1,3,4,rp
+ <labeld+108>: extru r1,3,4,rp
+ <labeld+112>: extru,ev r1,3,4,rp
+ <labeld+116>: extrs r0,3,4,r1
+ <labeld+120>: extrs r0,3,4,r1
+ <labeld+124>: extru r0,3,4,r1
+ <labeld+128>: extru,ev r0,3,4,r1
+ <labeld+132>: vextrs,<> r0,4,r1
+ <labeld+136>: fabs,sgl fpe4,fpe6
+ <labeld+140>: fabs,dbl fpe4,fr6
+ <labeld+144>: fadd,sgl fpe4,fr4,fr6
+ <labeld+148>: fadd,dbl fpe4,fr4,fr6
+ <labeld+152>: fcmp,sgl,false? fpe6,fpe4
+ <labeld+156>: fcmp,dbl,false fpe6,fpe4
+ <labeld+160>: fcmp,dbl,? fpe6,fpe4
+ <labeld+164>: fcmp,dbl,!<=> fpe6,fpe4
+ <labeld+168>: fcmp,dbl,= fpe6,fpe4
+ <labeld+172>: fcmp,dbl,=t fpe6,fpe4
+ <labeld+176>: fcmp,dbl,?= fpe6,fpe4
+ <labeld+180>: fcmp,dbl,!<> fpe6,fpe4
+ <labeld+184>: fcmp,dbl,!?>= fpe6,fpe4
+ <labeld+188>: fcmp,dbl,< fpe6,fpe4
+ <labeld+192>: fcmp,dbl,?< fpe6,fpe4
+ <labeld+196>: fcmp,dbl,!>= fpe6,fpe4
+ <labeld+200>: fcmp,dbl,!?> fpe6,fpe4
+ <labeld+204>: fcmp,dbl,<= fpe6,fpe4
+ <labeld+208>: fcmp,dbl,?<= fpe6,fpe4
+ <labeld+212>: fcmp,dbl,!> fpe6,fpe4
+ <labeld+216>: fcmp,dbl,!?<= fpe6,fpe4
+ <labeld+220>: fcmp,dbl,> fpe6,fpe4
+ <labeld+224>: fcmp,dbl,?> fpe6,fpe4
+ <labeld+228>: fcmp,dbl,!<= fpe6,fpe4
+ <labeld+232>: fcmp,dbl,!?< fpe6,fpe4
+ <labeld+236>: fcmp,dbl,>= fpe6,fpe4
+ <labeld+240>: fcmp,dbl,?>= fpe6,fpe4
+ <labeld+244>: fcmp,dbl,!< fpe6,fpe4
+ <labeld+248>: fcmp,dbl,!?= fpe6,fpe4
+ <labeld+252>: fcmp,dbl,<> fpe6,fpe4
+ <labeld+256>: fcmp,dbl,!= fpe6,fpe4
+ <labeld+260>: fcmp,dbl,!=t fpe6,fpe4
+ <labeld+264>: fcmp,dbl,!? fpe6,fpe4
+ <labeld+268>: fcmp,dbl,<=> fpe6,fpe4
+ <labeld+272>: fcmp,dbl,true? fpe6,fpe4
+ <labeld+276>: fcmp,dbl,true fpe6,fpe4
+ <labeld+280>: fcnvff,sgl,dbl fpe4,fr4
+ <labeld+284>: fcnvfx,sgl,sgl fpe4,fr4
+ <labeld+288>: fcnvfx,sgl,dbl fpe4,fr4
+ <labeld+292>: fcnvff,sgl,quad fpe4,fr4
+ <labeld+296>: fcnvfx,sgl,quad fpe4,fr4
+ <labeld+300>: fcnvxf,sgl,sgl fpe4,fr4
+ <labeld+304>: fcnvxf,sgl,dbl fpe4,fr4
+ <labeld+308>: fcnvxf,sgl,quad fpe4,fr4
+ <labeld+312>: fcnvff,dbl,sgl fpe4,fr4
+ <labeld+316>: fcnvfx,dbl,sgl fpe4,fr4
+ <labeld+320>: fcnvff,dbl,quad fpe4,fr4
+ <labeld+324>: fcnvfx,dbl,quad fpe4,fr4
+ <labeld+328>: fcnvff,quad,sgl fpe4,fr6
+ <labeld+332>: fcnvff,quad,dbl fpe4,fr6
+ <labeld+336>: fcnvfx,quad,sgl fpe4,fr6
+ <labeld+340>: fcnvfx,quad,quad fpe4,fr6
+ <labeld+344>: fcnvxf,quad,sgl fpe4,fr4
+ <labeld+348>: fcnvxf,quad,dbl fpe4,fr4
+ <labeld+352>: fcnvxf,quad,quad fpe4,fr4
+ <labeld+356>: fcnvfxt,dbl,sgl fpe6,fr4
+ <labeld+360>: fcpy,sgl fr5,fr6
+ <labeld+364>: fcpy,dbl fr5,fr6
+ <labeld+368>: fdc r3(sr0,r3)
+ <labeld+372>: fdc,m r0(sr0,r4)
+ <labeld+376>: fdce r0(sr3,r7)
+ <labeld+380>: fdce,m r0(sr3,r7)
+ <labeld+384>: fdiv,dbl fpe2,fr0,fpe4
+ <labeld+388>: fic r4(sr0,r5)
+ <labeld+392>: fic,m r4(sr2,r5)
+ <labeld+396>: fice r0(sr1,r8)
+ <labeld+400>: fice,m r0(sr1,r8)
+ <labeld+404>: diag 0x200
+ <labeld+408>: fid
+ <labeld+412>: fldds 0(sr0,r1),fpe2
+ <labeld+416>: fldds,ma 0xa(sr0,r1),fpe2
+ <labeld+420>: fldds,mb 0(sr0,r1),fpe2
+ <labeld+424>: fldds,ma 0(sr0,r1),fpe2
+ <labeld+428>: fldds,ma 4(sr0,r1),fpe2
+ <labeld+432>: fldds 0(sr0,r1),fpe2
+ <labeld+436>: fldds,ma 0xa(sr0,r1),fpe2
+ <labeld+440>: fldds,mb 0(sr0,r1),fpe2
+ <labeld+444>: flddx r0(sr0,r1),fpe2
+ <labeld+448>: flddx,s r10(sr0,r1),fpe2
+ <labeld+452>: flddx,m r0(sr0,r1),fpe2
+ <labeld+456>: flddx,sm r0(sr0,r1),fpe2
+ <labeld+460>: fldwx r1(sr0,r1),fpe2
+ <labeld+464>: fldws,ma 0xa(sr0,r1),fpe2
+ <labeld+468>: fldws,mb 0(sr0,r1),fpe2
+ <labeld+472>: fldws,ma 0(sr0,r1),fpe2
+ <labeld+476>: fldws,ma 4(sr0,r1),fpe2
+ <labeld+480>: fldws 1(sr0,r1),fpe2
+ <labeld+484>: fldws,ma 0xa(sr0,r1),fpe2
+ <labeld+488>: fldws,mb 0(sr0,r1),fpe2
+ <labeld+492>: fldwx r1(sr0,r1),fpe2
+ <labeld+496>: fldwx,s r10(sr0,r1),fpe2
+ <labeld+500>: fldwx,m r0(sr0,r1),fpe2
+ <labeld+504>: fldwx,sm r0(sr0,r1),fpe2
+ <labeld+508>: fmpy,sgl fr6,fr8,fr10
+ <labeld+512>: fmpy,dbl fr6,fr8,fr10
+ <labeld+516>: fmpyadd,sgl fr16,fr17,fr18,fr19,fr20
+ <labeld+520>: fmpyadd,dbl fr4,fr7,fr7,fr5,fr6
+ <labeld+524>: fmpyfadd,dbl fr10,fr10,fr12,fr13
+ <labeld+528>: fmpynfadd,dbl fr10,fr10,fr12,fr13
+ <labeld+532>: fmpysub,sgl fr16,fr17,fr18,fr19,fr30
+ <labeld+536>: fneg,dbl fr0,fpe2
+ <labeld+540>: fnegabs,sgl fr0,fpe2
+ <labeld+544>: frnd,dbl fpe4,fpe6
+ <labeld+548>: fsqrt,sgl fr16,fr17
+ <labeld+552>: fstds fpe6,0(sr0,rp)
+ <labeld+556>: fstds,ma fpe6,8(sr0,rp)
+ <labeld+560>: fstds,mb fpe6,0(sr0,rp)
+ <labeld+564>: fstds,ma fpe6,0(sr0,rp)
+ <labeld+568>: fstds,ma fpe6,4(sr0,rp)
+ <labeld+572>: fstds fpe6,0(sr0,rp)
+ <labeld+576>: fstds,ma fpe6,8(sr0,rp)
+ <labeld+580>: fstds,mb fpe6,0(sr0,rp)
+ <labeld+584>: fstdx fpe6,r0(sr0,rp)
+ <labeld+588>: fstdx,s fpe6,r8(sr0,rp)
+ <labeld+592>: fstdx,m fpe6,r0(sr0,rp)
+ <labeld+596>: fstdx,sm fpe6,r0(sr0,rp)
+ <labeld+600>: fstws fpe6,0(sr0,rp)
+ <labeld+604>: fstws,ma fpe6,8(sr0,rp)
+ <labeld+608>: fstws,mb fpe6,0(sr0,rp)
+ <labeld+612>: fstws,ma fpe6,0(sr0,rp)
+ <labeld+616>: fstws,ma fpe6,4(sr0,rp)
+ <labeld+620>: fstws fpe6,0(sr0,rp)
+ <labeld+624>: fstws,ma fpe6,8(sr0,rp)
+ <labeld+628>: fstws,mb fpe6,0(sr0,rp)
+ <labeld+632>: fstwx fpe6,r0(sr0,rp)
+ <labeld+636>: fstwx,s fpe6,r8(sr0,rp)
+ <labeld+640>: fstwx,m fpe6,r0(sr0,rp)
+ <labeld+644>: fstwx,sm fpe6,r0(sr0,rp)
+ <labeld+648>: fsub,dbl fr5,fpe4,fr0
+ <labeld+652>: ftest
+ <labeld+656>: ftest,acc
+ <labeld+660>: ftest,acc8
+ <labeld+664>: ftest,acc6
+ <labeld+668>: ftest,acc4
+ <labeld+672>: ftest,acc2
+ <labeld+676>: ftest,rej
+ <labeld+680>: ftest,rej8
+ <labelg>: gate <labelg>,r3
+ <labelg+4>: gate,n <labelu>,r3
+ <labelg+8>: hadd rp,r3,r4
+ <labelg+12>: idcor r4,r17
+ <labelg+16>: idcor,sbz r4,r17
+ <labelg+20>: idcor,shz r4,r17
+ <labelg+24>: idcor,sdc r4,r17
+ <labelg+28>: idcor,sbc r4,r17
+ <labelg+32>: idcor,shc r4,r17
+ <labelg+36>: idcor,tr r4,r17
+ <labelg+40>: idcor,nbz r4,r17
+ <labelg+44>: idcor,nhz r4,r17
+ <labelg+48>: idcor,ndc r4,r17
+ <labelg+52>: idcor,nbc r4,r17
+ <labelg+56>: idcor,nhc r4,r17
+ <labelg+60>: idtlbt r1,rp
+ <labelg+64>: iltlbt rp,r3
+ <labelk>: lha r0(sr0,r1),rp
+ <labelk+4>: ldbx r1(sr0,r1),r1
+ <labelk+8>: ldbs,ma 0xa(sr0,r1),r1
+ <labelk+12>: ldbs,mb 0(sr0,r1),r1
+ <labelk+16>: ldbs,ma 0(sr0,r1),r1
+ <labelk+20>: ldbs,ma 4(sr0,r1),r1
+ <labelk+24>: ldbs 1(sr0,r1),r1
+ <labelk+28>: ldbs,ma 0xa(sr0,r1),r1
+ <labelk+32>: ldbs,mb 0(sr0,r1),r1
+ <labelk+36>: ldbs,ma 0(sr0,r1),r1
+ <labelk+40>: ldbs,ma 4(sr0,r1),r1
+ <labelk+44>: ldbx r1(sr0,r1),r1
+ <labelk+48>: ldbx,s r10(sr0,r1),r1
+ <labelk+52>: ldbx,m r0(sr0,r1),r1
+ <labelk+56>: ldbx,sm r0(sr0,r1),r1
+ <labelk+60>: ldcd 0(sr0,r1),r1
+ <labelk+64>: ldcwx r1(sr0,r1),r1
+ <labelk+68>: ldcws,ma 0xa(sr0,r1),r1
+ <labelk+72>: ldcws,mb 0(sr0,r1),r1
+ <labelk+76>: ldcws,ma 0(sr0,r1),r1
+ <labelk+80>: ldcws,ma 4(sr0,r1),r1
+ <labelk+84>: ldcws 1(sr0,r1),r1
+ <labelk+88>: ldcws,ma 0xa(sr0,r1),r1
+ <labelk+92>: ldcws,mb 0(sr0,r1),r1
+ <labelk+96>: ldcws,ma 0(sr0,r1),r1
+ <labelk+100>: ldcws,ma 4(sr0,r1),r1
+ <labelk+104>: ldcwx r1(sr0,r1),r1
+ <labelk+108>: ldcwx,s r3(sr0,r1),r1
+ <labelk+112>: ldcwx,m r0(sr0,r1),r1
+ <labelk+116>: ldcwx,sm r0(sr0,r1),r1
+ <labelk+120>: ldhx r1(sr0,r1),r1
+ <labelk+124>: ldhs,ma 0xa(sr0,r1),r1
+ <labelk+128>: ldhs,mb 0(sr0,r1),r1
+ <labelk+132>: ldhs,ma 0(sr0,r1),r1
+ <labelk+136>: ldhs,ma 4(sr0,r1),r1
+ <labelk+140>: ldhs 1(sr0,r1),r1
+ <labelk+144>: ldhs,ma 0xa(sr0,r1),r1
+ <labelk+148>: ldhs,mb 0(sr0,r1),r1
+ <labelk+152>: ldhs,ma 0(sr0,r1),r1
+ <labelk+156>: ldhs,ma 4(sr0,r1),r1
+ <labelk+160>: ldhx r1(sr0,r1),r1
+ <labelk+164>: ldhx,s r10(sr0,r1),r1
+ <labelk+168>: ldhx,m r0(sr0,r1),r1
+ <labelk+172>: ldhx,sm r0(sr0,r1),r1
+ <labelk+176>: ldil 0x2dd0000,r6
+ <labelk+180>: ldo 0x64(r3),r20
+ <labelk+184>: ldsid (sr0,r0),r3
+ <labelk+188>: ldwx r1(sr0,r1),r1
+ <labelk+192>: ldws,ma 0xa(sr0,r1),r1
+ <labelk+196>: ldws,mb 0(sr0,r1),r1
+ <labelk+200>: ldws,ma 0(sr0,r1),r1
+ <labelk+204>: ldws,ma 4(sr0,r1),r1
+ <labelk+208>: ldwax r1(r3),rp
+ <labelk+212>: ldwas,ma 8(r3),rp
+ <labelk+216>: ldwas,mb 0(r3),rp
+ <labelk+220>: ldwas,ma 0(r3),rp
+ <labelk+224>: ldwas,ma 8(r3),rp
+ <labelk+228>: ldwas 1(r3),rp
+ <labelk+232>: ldwas,ma 8(r3),rp
+ <labelk+236>: ldwas,mb 0(r3),rp
+ <labelk+240>: ldwas,ma 0(r3),rp
+ <labelk+244>: ldwas,ma 8(r3),rp
+ <labelk+248>: ldwax r1(r3),rp
+ <labelk+252>: ldwax,s r8(r3),rp
+ <labelk+256>: ldwax,m r0(r3),rp
+ <labelk+260>: ldwax,sm r0(r3),rp
+ <labelk+264>: ldwm 8(sr1,r3),r4
+ <labelk+268>: ldws 1(sr0,r1),r1
+ <labelk+272>: ldws,ma 0xa(sr0,r1),r1
+ <labelk+276>: ldws,mb 0(sr0,r1),r1
+ <labelk+280>: ldws,ma 0(sr0,r1),r1
+ <labelk+284>: ldws,ma 4(sr0,r1),r1
+ <labelk+288>: ldwx r1(sr0,r3),rp
+ <labelk+292>: ldwx,s r8(sr0,r3),rp
+ <labelk+296>: ldwx,m r0(sr0,r3),rp
+ <labelk+300>: ldwx,sm r0(sr0,r3),rp
+ <labelk+304>: lpa r0(sr0,r3),r19
+ <labelk+308>: lpa,m r0(sr2,r3),r19
+ <labelk+312>: mfctl rctr,r4
+ <labelk+316>: mfctl pidr3,r4
+ <labelk+320>: mfia r25
+ <labelk+324>: mfsp sr4,ret1
+ <labelk+328>: mixh,l r1,rp,r3
+ <labelk+332>: movb r1,rp,<labelk>
+ <labelk+336>: movb,n r1,rp,<labelk>
+ <labelk+340>: movb,>=,n r1,rp,<main>
+ <labelk+344>: movib 0xf,r3,<main>
+ <labelk+348>: movib,< 0xf,r3,<main>
+ <labelk+352>: movib,<>,n 0xf,r3,<main>
+ <labelk+356>: mtctl r0,pcsq
+ <labelk+360>: mtsar r3
+ <labelk+364>: mtsarcm r7
+ <labelk+368>: mtsm rp
+ <labelk+372>: mtsp r19,sr3
+ <labelk+376>: nop
+ <labelk+380>: copy r1,r3
+ <labelk+384>: or,ev r1,r0,r3
+ <labelk+388>: pdc r0(sr0,r1)
+ <labelk+392>: pdc,m r0(sr0,r1)
+ <labelk+396>: pdtlb r8(sr2,rp)
+ <labelk+400>: pdtlb,m r8(sr2,rp)
+ <labelk+404>: pdtlb,l r8(sr2,rp)
+ <labelk+408>: pdtlb,l,m r8(sr2,rp)
+ <labelk+412>: pdtlbe r4(sr1,r21)
+ <labelk+416>: pdtlbe,m r4(sr1,r21)
+ <labelk+420>: pitlb r6(sr0,sp)
+ <labelk+424>: pitlb,m r6(sr0,sp)
+ <labelk+428>: pitlbe r6(sr0,sp)
+ <labelk+432>: pitlbe,m r6(sr0,sp)
+ <labelk+436>: prober (sr0,r26),r0,sp
+ <labelk+440>: probew (sr0,r26),r0,sp
+ <labelk+444>: proberi (sr0,r26),0xa,sp
+ <labelk+448>: probewi (sr0,r26),7,sp
+ <labelk+452>: rfi
+ <labelk+456>: rfir
+ <labelk+460>: rfir
+ <labelk+464>: rsm 0x1f,r24
+ <labelk+468>: sh1add r14,r15,r16
+ <labelk+472>: sh1add,nuv r14,r15,r16
+ <labelk+476>: sh1add,znv r14,r15,r16
+ <labelk+480>: sh1add,sv r14,r15,r16
+ <labelk+484>: sh1add,uv r14,r15,r16
+ <labelk+488>: sh1add,vnz r14,r15,r16
+ <labelk+492>: sh1add,nsv r14,r15,r16
+ <labelk+496>: sh1addl r14,r15,r16
+ <labelk+500>: sh1addl,nuv r14,r15,r16
+ <labelk+504>: sh1addl,znv r14,r15,r16
+ <labelk+508>: sh1addl,sv r14,r15,r16
+ <labelk+512>: sh1addl,uv r14,r15,r16
+ <labelk+516>: sh1addl,vnz r14,r15,r16
+ <labelk+520>: sh1addl,nsv r14,r15,r16
+ <labelk+524>: sh1addo r14,r15,r16
+ <labelk+528>: sh1addo,nuv r14,r15,r16
+ <labelk+532>: sh1addo,znv r14,r15,r16
+ <labelk+536>: sh1addo,sv r14,r15,r16
+ <labelk+540>: sh1addo,uv r14,r15,r16
+ <labelk+544>: sh1addo,vnz r14,r15,r16
+ <labelk+548>: sh1addo,nsv r14,r15,r16
+ <labelk+552>: sh2add r14,r15,r16
+ <labelk+556>: sh2add,nuv r14,r15,r16
+ <labelk+560>: sh2add,znv r14,r15,r16
+ <labelk+564>: sh2add,sv r14,r15,r16
+ <labelk+568>: sh2add,uv r14,r15,r16
+ <labelk+572>: sh2add,vnz r14,r15,r16
+ <labelk+576>: sh2add,nsv r14,r15,r16
+ <labelk+580>: sh2addl r14,r15,r16
+ <labelk+584>: sh2addl,nuv r14,r15,r16
+ <labelk+588>: sh2addl,znv r14,r15,r16
+ <labelk+592>: sh2addl,sv r14,r15,r16
+ <labelk+596>: sh2addl,uv r14,r15,r16
+ <labelk+600>: sh2addl,vnz r14,r15,r16
+ <labelk+604>: sh2addl,nsv r14,r15,r16
+ <labelk+608>: sh2addo r14,r15,r16
+ <labelk+612>: sh2addo,nuv r14,r15,r16
+ <labelk+616>: sh2addo,znv r14,r15,r16
+ <labelk+620>: sh2addo,sv r14,r15,r16
+ <labelk+624>: sh2addo,uv r14,r15,r16
+ <labelk+628>: sh2addo,vnz r14,r15,r16
+ <labelk+632>: sh2addo,nsv r14,r15,r16
+ <labelk+636>: sh3add r14,r15,r16
+ <labelk+640>: sh3add,nuv r14,r15,r16
+ <labelk+644>: sh3add,znv r14,r15,r16
+ <labelk+648>: sh3add,sv r14,r15,r16
+ <labelk+652>: sh3add,uv r14,r15,r16
+ <labelk+656>: sh3add,vnz r14,r15,r16
+ <labelk+660>: sh3add,nsv r14,r15,r16
+ <labelk+664>: sh3addl r14,r15,r16
+ <labelk+668>: sh3addl,nuv r14,r15,r16
+ <labelk+672>: sh3addl,znv r14,r15,r16
+ <labelk+676>: sh3addl,sv r14,r15,r16
+ <labelk+680>: sh3addl,uv r14,r15,r16
+ <labelk+684>: sh3addl,vnz r14,r15,r16
+ <labelk+688>: sh3addl,nsv r14,r15,r16
+ <labelk+692>: sh3addo r14,r15,r16
+ <labelk+696>: sh3addo,nuv r14,r15,r16
+ <labelk+700>: sh3addo,znv r14,r15,r16
+ <labelk+704>: sh3addo,sv r14,r15,r16
+ <labelk+708>: sh3addo,uv r14,r15,r16
+ <labelk+712>: sh3addo,vnz r14,r15,r16
+ <labelk+716>: sh3addo,nsv r14,r15,r16
+ <labelk+720>: shd r3,rp,15,r0
+ <labelk+724>: shd,<> r3,rp,15,r0
+ <labelk+728>: sh2add r1,r3,r6
+ <labelk+732>: sh2addo r1,r3,r6
+ <labelk+736>: sh2addl r1,r3,r6
+ <labelk+740>: sh2add,= r1,r3,r6
+ <labelk+744>: sh2add,< r1,r3,r6
+ <labelk+748>: sh2add,<= r1,r3,r6
+ <labelk+752>: sh2add,nuv r1,r3,r6
+ <labelk+756>: sh2add,znv r1,r3,r6
+ <labelk+760>: sh2add,sv r1,r3,r6
+ <labelk+764>: sh2add,od r1,r3,r6
+ <labelk+768>: sh2add,tr r1,r3,r6
+ <labelk+772>: sh2add,<> r1,r3,r6
+ <labelk+776>: sh2add,>= r1,r3,r6
+ <labelk+780>: sh2add,> r1,r3,r6
+ <labelk+784>: sh2add,uv r1,r3,r6
+ <labelk+788>: sh2add,vnz r1,r3,r6
+ <labelk+792>: sh2add,nsv r1,r3,r6
+ <labelk+796>: sh2add,ev r1,r3,r6
+ <labelk+800>: shd r1,rp,1,r3
+ <labelk+804>: spop0,0,0x23
+ <labelk+808>: spop1,3,0x23 r6
+ <labelk+812>: spop2,3,0x23 r6
+ <labelk+816>: spop3,3,0x23 r6,r7
+ <labelk+820>: ssm 0x7f,r1
+ <labelk+824>: stbs r0,8(sr1,r3)
+ <labelk+828>: stbs r0,8(sr1,r3)
+ <labelk+832>: stbs r0,8(sr1,r3)
+ <labelk+836>: stbs r0,8(sr1,r3)
+ <labelk+840>: stbs r0,8(sr1,r3)
+ <labelk+844>: stbs r0,8(sr1,r3)
+ <labelk+848>: stbys r7,6(sr1,sp)
+ <labelk+852>: stbys r7,6(sr1,sp)
+ <labelk+856>: stbys,e r7,6(sr1,sp)
+ <labelk+860>: stbys,b,m r7,6(sr1,sp)
+ <labelk+864>: stbys r7,6(sr1,sp)
+ <labelk+868>: stbys,e r7,6(sr1,sp)
+ <labelk+872>: stbys r7,6(sr1,sp)
+ <labelk+876>: stbys,b,m r7,6(sr1,sp)
+ <labelk+880>: stbys,e,m r7,6(sr1,sp)
+ <labelk+884>: stbys,b,m r7,6(sr1,sp)
+ <labelk+888>: stbys r7,6(sr1,sp)
+ <labelk+892>: stbys,e r7,6(sr1,sp)
+ <labelk+896>: std r18,0(sr3,ret1)
+ <labelk+900>: sths r18,0(sr3,ret1)
+ <labelk+904>: sths r18,0(sr3,ret1)
+ <labelk+908>: stws r17,3(sr0,r1)
+ <labelk+912>: stwas r16,0(r6)
+ <labelk+916>: stwm r16,0(sr3,r6)
+ <labelk+920>: stwas,ma r16,2(r6)
+ <labelk+924>: stws r16,0(sr0,r6)
+ <labelk+928>: sub r1,r0,r3
+ <labelk+932>: subb r1,r0,r3
+ <labelk+936>: subdb r1,r0,r3
+ <labelk+940>: subt r1,r0,r3
+ <labelk+944>: subo r1,r0,r3
+ <labelk+948>: subto r1,r0,r3
+ <labelk+952>: subbo r1,r0,r3
+ <labelk+956>: subbo,< r1,r0,r3
+ <labelk+960>: subb r8,r9,r10
+ <labelk+964>: subb,<<= r8,r9,r10
+ <labelk+968>: subb,>>= r8,r9,r10
+ <labelk+972>: subb,nsv r8,r9,r10
+ <labelk+976>: subbo r8,r9,r10
+ <labelk+980>: subbo,<<= r8,r9,r10
+ <labelk+984>: subbo,>>= r8,r9,r10
+ <labelk+988>: subbo,nsv r8,r9,r10
+ <labelk+992>: subi 9,r3,r5
+ <labelk+996>: subio 2,r3,r5
+ <labelk+1000>: subio 5,dp,r26
+ <labelk+1004>: subio,< 5,dp,r26
+ <labelk+1008>: subo r8,r9,r10
+ <labelk+1012>: subo,<<= r8,r9,r10
+ <labelk+1016>: subo,>>= r8,r9,r10
+ <labelk+1020>: subo,nsv r8,r9,r10
+ <labelk+1024>: subt r8,r9,r10
+ <labelk+1028>: subt,<= r8,r9,r10
+ <labelk+1032>: subt,>= r8,r9,r10
+ <labelk+1036>: subt,nsv r8,r9,r10
+ <labelk+1040>: subto r8,r9,r10
+ <labelk+1044>: subto,<<= r8,r9,r10
+ <labelk+1048>: subto,>>= r8,r9,r10
+ <labelk+1052>: subto,nsv r8,r9,r10
+ <labelk+1056>: sync
+ <labelk+1060>: syncdma
+ <labelu>: uaddcm r3,r4,r5
+ <labelu+4>: uaddcmt r3,r4,r5
+ <labelu+8>: uaddcmt r3,r4,r5
+ <labelu+12>: uaddcmt,shc r3,r4,r5
+ <labelu+16>: uxor r19,r3,r20
+ <labelu+20>: uxor,shz r19,r3,r20
+ <labelu+24>: vdep r7,3,r8
+ <labelu+28>: vdep,tr rp,3,r8
+ <labelu+32>: vdepi 7,3,r8
+ <labelu+36>: vdepi,= 2,3,r8
+ <labelu+40>: vextrs r4,30,r4
+ <labelu+44>: vextrs,< r4,30,r4
+ <labelu+48>: vextru r4,30,r4
+ <labelu+52>: vextru,>= r4,30,r4
+ <labelu+56>: vshd r3,rp,r0
+ <labelu+60>: vshd,< r3,rp,r0
+ <labelu+64>: xmpyu fpe6,fr4,fr5
+ <labelu+68>: xor r0,r1,rp
+ <labelu+72>: xor,tr r0,r1,rp
+ <labelu+76>: xor,>= r0,r1,rp
+ <labelu+80>: zdep r18,1,2,rp
+ <labelu+84>: zdep,<> r18,2,3,rp
+ <labelu+88>: zdepi 1,1,2,rp
+ <labelu+92>: zdepi,ev 3,2,3,rp
+ <labelu+96>: zvdep r18,30,rp
+ <labelu+100>: zvdep,< r18,8,rp
+ <labelu+104>: zvdepi 0xf,30,rp
+ <labelu+108>: zvdepi,od 8,8,rp
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-instr.s gdb/testsuite/gdb.disasm/pa20w-instr.s
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-instr.s Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20w-instr.s Thu Jul 22 17:49:49 1999
***************
*** 0 ****
--- 1,1034 ----
+ ; assemble as "as +DA2.0W -o pa20w pa20-instr.s"
+ ; or
+ ; cc -g +DA2.0W -o pa20w pa20w-instr.s
+ ;
+ ; PA-RISC assembly-language test program for the debugger.
+ ;
+ ; This test is *not* intended to be executed. Rather, this test serves
+ ; as a comprehensive test for the debugger's PA disassembler.
+ ;
+
+ ; Some instructions are PA1.x, some PA2.0
+
+ .level 2.0W
+
+ .code
+ .export main,ENTRY
+ .export mainend,ENTRY
+ .space $TEXT$
+ .subspa $CODE$
+
+ main
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+ labela
+ PDC %r5(0,%r6)
+ PDC,M %r5(%r6)
+ FDC %r5(0,%r6)
+ FDC,M %r5(0,%r6)
+ ;;
+ ;; This gets an assembly error--it may be format in the draft manual only
+ ;; FDC 5(0,%r6)
+
+ FIC %r5(0,%r6)
+ FIC,M %r5(0,%r6)
+
+ FCNV,SGL,DBL %fr4,%fr6
+ ;;
+ ;; I don't know the magic to get the truncate flag to work
+ ;; FCNV,T,DBL,SGL %fr4,%fr6
+
+ FNEG %fr4,%fr6
+ FNEG,SGL %fr4,%fr6
+ FNEG,DBL %fr4,%fr6
+ FNEG,QUAD %fr4,%fr6
+
+ FNEGABS %fr4,%fr6
+ FNEGABS,SGL %fr4,%fr6
+ FNEGABS,DBL %fr4,%fr6
+ FNEGABS,QUAD %fr4,%fr6
+
+ FMPYFADD %fr2,%fr4,%fr6,%fr8
+ FMPYFADD,SGL %fr2,%fr4,%fr6,%fr8
+ FMPYFADD,DBL %fr2,%fr4,%fr6,%fr8
+ FMPYFADD,QUAD %fr2,%fr4,%fr6,%fr8
+
+ FMPYNFADD %fr2,%fr4,%fr6,%fr8
+ FMPYNFADD,SGL %fr2,%fr4,%fr6,%fr8
+ FMPYNFADD,DBL %fr2,%fr4,%fr6,%fr8
+ FMPYNFADD,QUAD %fr2,%fr4,%fr6,%fr8
+
+ FCMP,SGL,true %fr2,%fr4,3
+ FTEST 3
+
+ PMENB
+ PMDIS
+ PMDIS,N
+
+ MTSARCM %r5
+ IDTLBT %r5,%r6
+ IITLBT %r5,%r6
+
+ FLDD 512(%r4),%fr5
+ FLDD,MA 512(%r4),%fr5
+ FLDD,O 0(%r4),%fr5
+
+ FLDW 1024(0,%r4),%fr5
+ FLDW,MA 1024(0,%r4),%fr5
+ FLDW,MB 1024(0,%r4),%fr5
+
+ FSTD %fr5,1024(0,%r4)
+ FSTD,O %fr5,0(0,%r4)
+ FSTD,MA %fr5,1024(0,%r4)
+ FSTD,MB %fr5,1024(0,%r4)
+
+ MIXW %r4,%r5,%r6
+ MIXW,L %r4,%r5,%r6
+ MIXW,R %r4,%r5,%r6
+
+ MIXH %r4,%r5,%r6
+ MIXH,L %r4,%r5,%r6
+ MIXH,R %r4,%r5,%r6
+
+ HADD %r1,%r2,%r3
+ HADD,US %r3,%r4,%r5
+ HADD,SS %r6,%r7,%r8
+
+ HSUB %r1,%r2,%r3
+ HSUB,US %r3,%r4,%r5
+ HSUB,SS %r6,%r7,%r8
+
+ HAVG %r6,%r7,%r8
+
+ HSHLADD %r3,3,%r4,%r5
+ HSHRADD %r3,1,%r4,%r5
+
+ HSHL %r3,11,%r4
+ HSHR %r3,11,%r4
+ HSHR,U %r3,11,%r4
+ HSHR,S %r3,11,%r4
+
+ PERMH,1230 %r1,%r3
+
+ DEPDI 12,%cr11,17,%r3
+ DEPDI,Z 12,%cr11,17,%r3
+ DEPDI,Z,= 12,%cr11,17,%r3
+
+ EXTRD,< %r3,12,13,%r4
+ EXTRD,U,= %r3,%cr11,19,%r4
+
+ BB,< %r9,%cr11,labelc
+ BB,>=,N %r9,31,labelc
+
+ SHRPD,>= %r5,%r6,41,%r7
+ SHRPD,= %r1,%r2,%cr11,%r3
+ SHRPD,OD %r6,%r7,%cr11,%r3
+
+ BVE (%r6)
+ BVE,N (%r6)
+ BVE,L (%r5),%r2
+ BVE,L,PUSH (%r5),%r2
+ BVE,POP (%r5)
+
+ PUSHNOM
+ CLRBTS
+ POPBTS 6
+ PUSHBTS %r4
+
+ LDD %r1(0,%r2),%r3
+ LDD,MA 10(0,%r2),%r3
+ LDD,MB 0(0,%r2),%r3
+ LDD,O 0(0,%r2),%r3
+ LDD,MA,SL 4(0,%r2),%r3
+
+ LDDA %r1(%r2),%r3
+ LDDA,MA 8(%r2),%r3
+ LDDA,MB 0(%r2),%r3
+ LDDA,O 0(%r2),%r3
+ LDDA,MA,SL 8(%r2),%r3
+
+ STD %r1,(0,%r2)
+ STD,MA %r1,10(0,%r2)
+ STD,MB %r1,0(0,%r2)
+ STD,O %r1,0(0,%r2)
+ STD,MA,SL %r1,4(0,%r2)
+
+ STDA %r1,(%r2)
+ STDA,MA %r1,10(%r2)
+ STDA,MB %r1,0(%r2)
+ STDA,O %r1,0(%r2)
+ STDA,MA,SL %r1,4(%r2)
+
+ LDCD %r1(0,%r2),%r3
+ LDCD,M %r1(0,%r2),%r3
+ LDCD,MA 10(0,%r2),%r3
+ LDCD,MB 0(0,%r2),%r3
+ LDCD,O 0(0,%r2),%r3
+ LDCD,MA 4(0,%r2),%r3
+
+ STDBY %r1,5(0,%r2)
+ STDBY,B %r1,5(%r2)
+ STDBY,B,M %r1,5(%r2)
+ STDBY,E,M %r1,5(%r2)
+ STDBY,E %r1,5(%r2)
+
+ LDD %r1(0,%r2),%r3
+ LDD 10(0,%r2),%r3
+ ADD %r1,%r2,%r3
+ ADD,C %r0,%r1,%r2
+ ADD,DC %r0,%r1,%r2
+ ADD,L %r1,%r2,%r3
+ ADD,TSV %r3,%r4,%r5
+ ADD,C,TSV %r3,%r4,%r5
+ ADD,DC,TSV %r3,%r4,%r5
+
+ ADDB,= %r25,%r26,labelb
+ ADDB,=,N %r25,%r26,labelb
+ ;; In wide mode, the following commented out completers are not
+ ;; available
+ ;; ADDB,SV %r27,%r28,labela
+ ;; ADDB,OD %r27,%r28,labela
+ ADDB,TR %r27,%r28,labela
+ ;; ADDB,NSV %r27,%r28,labela
+ ;; ADDB,EV %r27,%r28,labela
+ ADDB,<> %r27,%r28,labela
+
+ ADDBF,NUV %r1,%r5,labela
+ ADDBF,<=,N %r10,%r6,labelb
+
+ ADDBT,NUV %r1,%r5,labela
+ ADDBT,<=,N %r10,%r6,labelb
+
+ ADDC %r28,%r29,%r30
+ ADDC,UV %r28,%r29,%r30
+
+ ADDCO %r28,%r29,%r30
+ ADDCO,UV %r28,%r29,%r30
+
+ ADDI 0,%r2,%r0
+ ADDI,> 1,%r3,%r0
+ ADDI,< 2,%r4,%r0
+
+ ADDIB,>= -1,%r5,labela
+ ADDIB,<=,N 10,%r6,labelb
+
+ ADDIBF,NUV -1,%r5,labela
+ ADDIBF,<=,N 10,%r6,labelb
+
+ ADDIBT,NUV -1,%r5,labela
+ ADDIBT,<=,N 10,%r6,labelb
+
+ ADDIL -1,%r3
+ ADDIL 70000,%r3
+
+ ADDIO 4,%r22,%r21
+ ADDIO,< 4,%r22,%r21
+
+ ADDIT 4,%r22,%r21
+ ADDIT,TR 4,%r22,%r21
+
+ ADDITO 934,%r25,%r24
+ ADDITO,<> 1023,%r25,%r24
+
+ ADDO %r28,%r29,%r30
+ ADDO,SV %r28,%r29,%r30
+
+ ADDL %r28,%r29,%r30
+ ADDL,NSV %r28,%r29,%r30
+
+ AND %r30,%r31,%r30
+ AND,< %r30,%r31,%r30
+
+ ANDCM %r26,%r27,%r28
+ ANDCM,> %r26,%r27,%r28
+
+ labelb
+ B labelc
+ B,N labelc
+ B,GATE labelc
+ B,L labelb,%r3
+
+ BB,< %r9,%cr11,labelc
+ BB,>=,N %r9,31,labelc
+
+ BE 100(%sr4,%r11)
+ BE,L 0(%sr4,%r11),%sr0,%r31
+
+ BL labelb,%r3
+ BL,N labelb,%r3
+
+ BLE 12345(%sr0,%r3)
+ BLE,N 12345(%sr0,%r3)
+
+ BLR %r31,%r3
+ BLR,N %r0,%r3
+
+ BREAK 0,1
+ BREAK 31,1000
+
+ BV 0(%r1)
+ BV,N (%r20)
+
+ BVB,< %r3,labela
+ BVB,<,N %r3,labela
+
+ BVE (%r5)
+ BVE,POP (%r5)
+ ; PA2.0 opcodes:
+ BVE,L (%r5),%r2
+ BVE,L,PUSH (%r5),%r2
+
+ labelc
+ CLDDS,0 0(%sr2,%r0),0
+ CLDDS,1,MA 1(%sr2,%r1),2
+ CLDDS,2,MB 9(%sr2,%r6),3
+
+ CLDDX,0 %r3(%sr2,%r10),0
+ CLDDX,0,S %r3(%sr2,%r20),1
+ CLDDX,1,M %r3(%sr2,%r30),2
+ CLDDX,2,SM %r3(%sr2,%r0),3
+
+ CLDWS,0 0(%sr2,%r0),0
+ CLDWS,1,MA 3(%sr2,%r0),2
+ CLDWS,2,MB 7(%sr2,%r0),3
+
+ CLDWX,0 %r3(%sr2,%r0),0
+ CLDWX,0,S %r3(%sr2,%r0),1
+ CLDWX,1,M %r3(%sr2,%r0),2
+ CLDWX,2,SM %r3(%sr2,%r0),3
+
+ CMPB,< %r11,%r12,labelc
+ ;; not accepted in 2.0W
+ ;; CMPB,>=,N %r11,%r12,main
+
+ CMPCLR,<> %r2,%r3,%r4
+
+ CMPIB,<= 0,%r2,labeld
+ CMPIB,NSV,N -16,%r2,labeld
+
+ CMPICLR,OD 1000,%r0,%r31
+
+ COMBF,<= %r0,%r2,labeld
+ COMBF,<<,N %r16,%r2,labeld
+
+ COMBT,<= %r0,%r2,labeld
+ COMBT,<<,N %r16,%r2,labeld
+
+ COMCLR %r11,%r12,%r13
+ COMCLR,>= %r11,%r12,%r13
+
+ COMIBF,<= 0,%r2,labeld
+ COMIBF,<<=,N -16,%r2,labeld
+
+ COMIBT,<= 0,%r2,labeld
+ COMIBT,<,N -16,%r2,labeld
+
+ COMICLR 1,%r3,%r4
+ COMICLR,EV 157,%r3,%r4
+
+ COPR,0,0
+ COPR,7,0
+ COPR,7,255
+
+ COPY %r3,%r4
+
+ CSTDS,0 8,0(%sr1,%r31)
+ CSTDS,7,MA 11,2(%sr1,%r3)
+ CSTDS,4,MB 14,2(%sr1,%r3)
+
+ CSTWS,0 8,0(%sr1,%r31)
+ CSTWS,7,MA 11,2(%sr1,%r3)
+ CSTWS,4,MB 14,2(%sr1,%r3)
+
+ labeld
+ DCOR %r3,%r4
+ DCOR,I %r3,%r4
+ DCOR,SBZ %r4,%r5
+ DCOR,SHZ %r4,%r6
+ DCOR,SDC %r4,%r7
+ DCOR,SBC %r4,%r8
+ DCOR,SHC %r4,%r9
+ DCOR,NBZ %r4,%r10
+ DCOR,NHZ %r4,%r11
+ DCOR,NDC %r4,%r12
+ DCOR,NBC %r4,%r13
+ DCOR,NHC %r4,%r14
+
+ DEP %r21,14,3,%r22
+ DEP,>= %r21,14,3,%r22
+
+ DEPI 1,14,3,%r22
+ DEPI,>= 2,14,3,%r22
+
+ DEPW %r19,1,2,%r1
+ DEPW,Z %r19,1,2,%r1
+ DEPW,Z %r19,%cr11,31,%r1
+ DEPW,Z,< %r19,30,1,%r1
+
+ DEPWI 15,0,1,%r2
+ DEPWI,Z -16,0,1,%r2
+
+ DIAG 123456
+
+ DS %r1,%r2,%r3
+ DS,<> %r1,%r2,%r3
+
+ labele
+ EXTRS %r1,3,4,%r2
+ EXTRS,OD %r1,3,4,%r2
+
+ EXTRU %r1,3,4,%r2
+ EXTRU,EV %r1,3,4,%r2
+
+ EXTRW %r0,3,4,%r1
+ EXTRW,S %r0,3,4,%r1
+ EXTRW,U %r0,3,4,%r1
+ EXTRW,U,EV %r0,3,4,%r1
+ EXTRW,<> %r0,%cr11,4,%r1
+
+ labelf
+ FABS,SGL %fr2,%fr3
+ FABS,DBL %fr2,%fr6
+
+ FADD,SGL %fr2,%fr4,%fr6
+ FADD,DBL %fr2,%fr4,%fr6
+
+ FCMP,SGL %fr3,%fr2
+ FCMP,DBL,false %fr3,%fr2
+ FCMP,DBL,? %fr3,%fr2
+ FCMP,DBL,!<=> %fr3,%fr2
+ FCMP,DBL,= %fr3,%fr2
+ FCMP,DBL,=T %fr3,%fr2
+ FCMP,DBL,?= %fr3,%fr2
+ FCMP,DBL,!<> %fr3,%fr2
+ FCMP,DBL,!?>= %fr3,%fr2
+ FCMP,DBL,< %fr3,%fr2
+ FCMP,DBL,?< %fr3,%fr2
+ FCMP,DBL,!>= %fr3,%fr2
+ FCMP,DBL,!?> %fr3,%fr2
+ FCMP,DBL,<= %fr3,%fr2
+ FCMP,DBL,?<= %fr3,%fr2
+ FCMP,DBL,!> %fr3,%fr2
+ FCMP,DBL,!?<= %fr3,%fr2
+ FCMP,DBL,> %fr3,%fr2
+ FCMP,DBL,?> %fr3,%fr2
+ FCMP,DBL,!<= %fr3,%fr2
+ FCMP,DBL,!?< %fr3,%fr2
+ FCMP,DBL,>= %fr3,%fr2
+ FCMP,DBL,?>= %fr3,%fr2
+ FCMP,DBL,!< %fr3,%fr2
+ FCMP,DBL,!?= %fr3,%fr2
+ FCMP,DBL,<> %fr3,%fr2
+ FCMP,DBL,!= %fr3,%fr2
+ FCMP,DBL,!=T %fr3,%fr2
+ FCMP,DBL,!? %fr3,%fr2
+ FCMP,DBL,<=> %fr3,%fr2
+ FCMP,DBL,true? %fr3,%fr2
+ FCMP,DBL,true %fr3,%fr2
+
+ FCNV,SGL,DBL %fr2,%fr4
+ FCNV,SGL,W %fr2,%fr4
+ FCNV,SGL,DW %fr2,%fr4
+ FCNV,SGL,QUAD %fr2,%fr4
+ FCNV,SGL,QW %fr2,%fr4
+ FCNV,W,SGL %fr2,%fr4
+ FCNV,W,DBL %fr2,%fr4
+ FCNV,W,QUAD %fr2,%fr4
+ FCNV,DBL,SGL %fr2,%fr4
+ FCNV,DBL,W %fr2,%fr4
+ FCNV,DBL,QUAD %fr2,%fr4
+ FCNV,DBL,QW %fr2,%fr4
+ FCNV,QUAD,SGL %fr2,%fr6
+ FCNV,QUAD,DBL %fr2,%fr6
+ FCNV,QUAD,W %fr2,%fr6
+ FCNV,QUAD,QW %fr2,%fr6
+ FCNV,QW,SGL %fr2,%fr4
+ FCNV,QW,DBL %fr2,%fr4
+ FCNV,QW,QUAD %fr2,%fr4
+
+ FCNVFXT,DBL %fr3,%fr4
+
+ FCPY,SGL %fr5,%fr6
+ FCPY,DBL %fr5,%fr6
+
+ FDC %r3(0,%r3)
+ ;; In wide mode, the following commented out completers are not
+ ;; available
+ ;; FDC,M 0(0,%r4)
+
+ FDCE %r0(%sr3,%r7)
+ FDCE,M %r0(%sr3,%r7)
+
+ FDIV,DBL %fr1,%fr0,%fr2
+
+ FIC %r4(0,%r5)
+ FIC,M %r4(%sr2,%r5)
+
+ FICE %r0(%sr1,%r8)
+ FICE,M %r0(%sr1,%r8)
+
+ DIAG 512
+
+ FID
+
+ FLDD 0(0,%r1),%fr1
+ FLDD,MA 10(0,%r1),%fr1
+ FLDD,MB 0(0,%r1),%fr1
+ FLDD,O 0(0,%r1),%fr1
+ FLDD,MA,SL 4(0,%r1),%fr1
+
+ FLDDS 0(0,%r1),%fr1
+ FLDDS,MA 10(0,%r1),%fr1
+ FLDDS,MB 0(0,%r1),%fr1
+
+ FLDDX 0(0,%r1),%fr1
+ FLDDX,S %r10(0,%r1),%fr1
+ FLDDX,M 0(0,%r1),%fr1
+ FLDDX,SM 0(0,%r1),%fr1
+
+ FLDW %r1(0,%r1),%fr1
+ FLDW,MA 10(0,%r1),%fr1
+ FLDW,MB 0(0,%r1),%fr1
+ FLDW,O 0(0,%r1),%fr1
+ FLDW,MA,SL 4(0,%r1),%fr1
+
+ FLDWS %r1(0,%r1),%fr1
+ FLDWS,MA 10(0,%r1),%fr1
+ FLDWS,MB 0(0,%r1),%fr1
+
+ FLDWX %r1(0,%r1),%fr1
+ FLDWX,S %r10(0,%r1),%fr1
+ FLDWX,M 0(0,%r1),%fr1
+ FLDWX,SM 0(0,%r1),%fr1
+
+ FMPY,SGL %fr6,%fr8,%fr10
+ FMPY,DBL %fr6,%fr8,%fr10
+
+ FMPYADD,SGL %fr16,%fr17,%fr18,%fr19,%fr20
+ FMPYADD,DBL %fr4,%fr7,%fr7,%fr5,%fr6
+
+ FMPYFADD,DBL %fr10,%fr11,%fr12,%fr13
+
+ FMPYNFADD,DBL %fr10,%fr11,%fr12,%fr13
+
+ FMPYSUB,SGL %fr16,%fr17,%fr18,%fr19,%fr30
+
+ ; PA2.0 opcodes:
+ FNEG,DBL %fr10,%fr1
+
+ ; PA2.0 opcodes:
+ FNEGABS,SGL %fr1,%fr1
+
+ FRND,DBL %fr2,%fr3
+
+ FSQRT,SGL %fr16,%fr17
+
+ FSTD %fr3,0(0,%r2)
+ FSTD,MA %fr3,8(0,%r2)
+ FSTD,MB %fr3,0(0,%r2)
+ FSTD,O %fr3,0(0,%r2)
+ FSTD,MA,SL %fr3,4(0,%r2)
+
+ FSTDS %fr3,0(0,%r2)
+ FSTDS,MA %fr3,8(0,%r2)
+ FSTDS,MB %fr3,0(0,%r2)
+
+ FSTDX %fr3,0(0,%r2)
+ FSTDX,S %fr3,%r8(0,%r2)
+ FSTDX,M %fr3,0(0,%r2)
+ FSTDX,SM %fr3,0(0,%r2)
+
+ FSTW %fr3,0(0,%r2)
+ FSTW,MA %fr3,8(0,%r2)
+ FSTW,MB %fr3,0(0,%r2)
+ FSTW,O %fr3,0(0,%r2)
+ FSTW,MA,SL %fr3,4(0,%r2)
+
+ FSTWS %fr3,0(0,%r2)
+ FSTWS,MA %fr3,8(0,%r2)
+ FSTWS,MB %fr3,0(0,%r2)
+
+ FSTWX %fr3,0(0,%r2)
+ FSTWX,S %fr3,%r8(0,%r2)
+ FSTWX,M %fr3,0(0,%r2)
+ FSTWX,SM %fr3,0(0,%r2)
+
+ FSUB,DBL %fr5,%fr2,%fr0
+
+ FTEST
+ FTEST,ACC
+ FTEST,ACC8
+ FTEST,ACC6
+ FTEST,ACC4
+ FTEST,ACC2
+ FTEST,REJ
+ FTEST,REJ8
+
+ labelg
+ GATE labelg,%r3
+ GATE,N labelu,%r3
+
+ labelh
+ ; PA2.0 opcodes:
+ HADD %r2,%r3,%r4
+
+ labeli
+ IDCOR %r4,%r17
+ IDCOR,SBZ %r4,%r17
+ IDCOR,SHZ %r4,%r17
+ IDCOR,SDC %r4,%r17
+ IDCOR,SBC %r4,%r17
+ IDCOR,SHC %r4,%r17
+ IDCOR,TR %r4,%r17
+ IDCOR,NBZ %r4,%r17
+ IDCOR,NHZ %r4,%r17
+ IDCOR,NDC %r4,%r17
+ IDCOR,NBC %r4,%r17
+ IDCOR,NHC %r4,%r17
+
+ ; PA2.0 opcodes:
+ IDTLBT %r1,%r2
+
+ ; IDTLBA %r5,(%sr2,%r4)
+
+ ; IDTLBP %r5,(%sr2,%r4)
+
+ ; PA2.0 opcodes:
+ IITLBT %r2,%r3
+
+ ; IITLBA %r5,(%sr2,%r4)
+
+ ; IITLBP %r5,(%sr2,%r4)
+
+ labelj
+ labelk
+ labell
+ LCI %r0(0,%r1),%r2
+
+ LDB %r1(0,%r1),%r1
+ LDB,MA 10(0,%r1),%r1
+ LDB,MB 0(0,%r1),%r1
+ LDB,O 0(0,%r1),%r1
+ LDB,MA,SL 4(0,%r1),%r1
+
+ LDBS %r1(0,%r1),%r1
+ LDBS,MA 10(0,%r1),%r1
+ LDBS,MB 0(0,%r1),%r1
+ LDBS,O 0(0,%r1),%r1
+ LDBS,MA,SL 4(0,%r1),%r1
+
+ LDBX %r1(0,%r1),%r1
+ LDBX,S %r10(0,%r1),%r1
+ LDBX,M 0(0,%r1),%r1
+ LDBX,SM 0(0,%r1),%r1
+
+ ; PA2.0 opcodes:
+ LDCD 0(0,%r1),%r1
+
+ LDCW %r1(0,%r1),%r1
+ LDCW,MA 10(0,%r1),%r1
+ LDCW,MB 0(0,%r1),%r1
+ LDCW,O 0(0,%r1),%r1
+ LDCW,MA,CO 4(0,%r1),%r1
+
+ LDCWS %r1(0,%r1),%r1
+ LDCWS,MA 10(0,%r1),%r1
+ LDCWS,MB 0(0,%r1),%r1
+ LDCWS,O 0(0,%r1),%r1
+ LDCWS,MA,CO 4(0,%r1),%r1
+
+ LDCWX %r1(0,%r1),%r1
+ LDCWX,S %r3(0,%r1),%r1
+ LDCWX,M 0(0,%r1),%r1
+ LDCWX,SM 0(0,%r1),%r1
+
+ LDH %r1(0,%r1),%r1
+ LDH,MA 10(0,%r1),%r1
+ LDH,MB 0(0,%r1),%r1
+ LDH,O 0(0,%r1),%r1
+ LDH,MA,SL 4(0,%r1),%r1
+
+ LDHS %r1(0,%r1),%r1
+ LDHS,MA 10(0,%r1),%r1
+ LDHS,MB 0(0,%r1),%r1
+ LDHS,O 0(0,%r1),%r1
+ LDHS,MA,SL 4(0,%r1),%r1
+
+ LDHX %r1(0,%r1),%r1
+ LDHX,S %r10(0,%r1),%r1
+ LDHX,M 0(0,%r1),%r1
+ LDHX,SM 0(0,%r1),%r1
+
+ LDIL 23456,%r6
+
+ LDO 100(%r3),%r20
+
+ LDSID (0,%r0),%r3
+
+ LDW %r1(0,%r1),%r1
+ LDW,MA 10(0,%r1),%r1
+ LDW,MB 0(0,%r1),%r1
+ LDW,O 0(0,%r1),%r1
+ LDW,MA,SL 4(0,%r1),%r1
+
+ LDWA %r1(%r3),%r2
+ LDWA,MA 8(%r3),%r2
+ LDWA,MB 0(%r3),%r2
+ LDWA,O 0(%r3),%r2
+ LDWA,MA,SL 8(%r3),%r2
+
+ LDWAS %r1(%r3),%r2
+ LDWAS,MA 8(%r3),%r2
+ LDWAS,MB 0(%r3),%r2
+ LDWAS,O 0(%r3),%r2
+ LDWAS,MA,SL 8(%r3),%r2
+
+ LDWAX %r1(%r3),%r2
+ LDWAX,S %r8(%r3),%r2
+ LDWAX,M 0(%r3),%r2
+ LDWAX,SM 0(%r3),%r2
+
+ LDWM 0x7fff(%r3),%r4
+
+ LDWS %r1(0,%r1),%r1
+ LDWS,MA 10(0,%r1),%r1
+ LDWS,MB 0(0,%r1),%r1
+ LDWS,O 0(0,%r1),%r1
+ LDWS,MA,SL 4(0,%r1),%r1
+
+ LDWX %r1(%r3),%r2
+ LDWX,S %r8(%r3),%r2
+ LDWX,M 0(%r3),%r2
+ LDWX,SM 0(%r3),%r2
+
+ LPA %r0(0,%r3),%r19
+ LPA,M %r0(%sr2,%r3),%r19
+
+ labelm
+ MFCTL %cr0,%r4
+ MFCTL %cr12,%r4
+
+ ; PA2.0 opcodes:
+ MFIA %r25
+
+ MFSP %sr4,%r29
+
+ ; PA2.0 opcodes:
+ MIXH,L %r1,%r2,%r3
+
+ MOVB %r1,%r2,labelk
+ MOVB,N %r1,%r2,labelj
+ MOVB,>=,N %r1,%r2,labela
+
+ ;; Instructions not supported by assembler for 2.0W
+ ;; MOVIB 15,%r3,main
+ ;; MOVIB,< 15,%r3,main
+ ;; MOVIB,<>,N 15,%r3,main
+
+ MTCTL %r0,%cr17
+
+ MTSAR %r3
+
+ ; PA2.0 opcodes:
+ MTSARCM %r7
+
+ MTSM %r2
+
+ MTSP %r19,%sr3
+
+ labeln
+ NOP
+
+ labelo
+ OR %r1,%r0,%r3
+ OR,EV %r1,%r0,%r3
+
+ labelp
+ PDC %r0(0,%r1)
+ PDC,M %r0(0,%r1)
+
+ PDTLB %r8(%sr2,%r2)
+ PDTLB,M %r8(%sr2,%r2)
+ ; PA2.0 opcodes:
+ PDTLB,L %r8(%sr2,%r2)
+ PDTLB,L,M %r8(%sr2,%r2)
+
+ PDTLBE %r4(%sr1,%r21)
+ PDTLBE,M %r4(%sr1,%r21)
+
+ PITLB %r6(%sr0,%r30)
+ PITLB,M %r6(%sr0,%r30)
+
+ PITLBE %r6(%sr0,%r30)
+ PITLBE,M %r6(%sr0,%r30)
+
+ PROBE,R (%sr0,%r26),%r0,%r30
+ PROBE,W (%sr0,%r26),%r0,%r30
+
+ PROBEI,R (%sr0,%r26),10,%r30
+ PROBEI,W (%sr0,%r26),7,%r30
+
+ labelq
+ labelr
+ RFI
+ RFI,R
+
+ RFIR
+
+ RSM 31,%r24
+
+ labels
+ SH1ADD %r14,%r15,%r16
+ SH1ADD,NUV %r14,%r15,%r16
+ SH1ADD,ZNV %r14,%r15,%r16
+ SH1ADD,SV %r14,%r15,%r16
+ SH1ADD,UV %r14,%r15,%r16
+ SH1ADD,VNZ %r14,%r15,%r16
+ SH1ADD,NSV %r14,%r15,%r16
+
+ SH1ADDL %r14,%r15,%r16
+ SH1ADDL,NUV %r14,%r15,%r16
+ SH1ADDL,ZNV %r14,%r15,%r16
+ SH1ADDL,SV %r14,%r15,%r16
+ SH1ADDL,UV %r14,%r15,%r16
+ SH1ADDL,VNZ %r14,%r15,%r16
+ SH1ADDL,NSV %r14,%r15,%r16
+
+ SH1ADDO %r14,%r15,%r16
+ SH1ADDO,NUV %r14,%r15,%r16
+ SH1ADDO,ZNV %r14,%r15,%r16
+ SH1ADDO,SV %r14,%r15,%r16
+ SH1ADDO,UV %r14,%r15,%r16
+ SH1ADDO,VNZ %r14,%r15,%r16
+ SH1ADDO,NSV %r14,%r15,%r16
+
+ SH2ADD %r14,%r15,%r16
+ SH2ADD,NUV %r14,%r15,%r16
+ SH2ADD,ZNV %r14,%r15,%r16
+ SH2ADD,SV %r14,%r15,%r16
+ SH2ADD,UV %r14,%r15,%r16
+ SH2ADD,VNZ %r14,%r15,%r16
+ SH2ADD,NSV %r14,%r15,%r16
+
+ SH2ADDL %r14,%r15,%r16
+ SH2ADDL,NUV %r14,%r15,%r16
+ SH2ADDL,ZNV %r14,%r15,%r16
+ SH2ADDL,SV %r14,%r15,%r16
+ SH2ADDL,UV %r14,%r15,%r16
+ SH2ADDL,VNZ %r14,%r15,%r16
+ SH2ADDL,NSV %r14,%r15,%r16
+
+ SH2ADDO %r14,%r15,%r16
+ SH2ADDO,NUV %r14,%r15,%r16
+ SH2ADDO,ZNV %r14,%r15,%r16
+ SH2ADDO,SV %r14,%r15,%r16
+ SH2ADDO,UV %r14,%r15,%r16
+ SH2ADDO,VNZ %r14,%r15,%r16
+ SH2ADDO,NSV %r14,%r15,%r16
+
+ SH3ADD %r14,%r15,%r16
+ SH3ADD,NUV %r14,%r15,%r16
+ SH3ADD,ZNV %r14,%r15,%r16
+ SH3ADD,SV %r14,%r15,%r16
+ SH3ADD,UV %r14,%r15,%r16
+ SH3ADD,VNZ %r14,%r15,%r16
+ SH3ADD,NSV %r14,%r15,%r16
+
+ SH3ADDL %r14,%r15,%r16
+ SH3ADDL,NUV %r14,%r15,%r16
+ SH3ADDL,ZNV %r14,%r15,%r16
+ SH3ADDL,SV %r14,%r15,%r16
+ SH3ADDL,UV %r14,%r15,%r16
+ SH3ADDL,VNZ %r14,%r15,%r16
+ SH3ADDL,NSV %r14,%r15,%r16
+
+ SH3ADDO %r14,%r15,%r16
+ SH3ADDO,NUV %r14,%r15,%r16
+ SH3ADDO,ZNV %r14,%r15,%r16
+ SH3ADDO,SV %r14,%r15,%r16
+ SH3ADDO,UV %r14,%r15,%r16
+ SH3ADDO,VNZ %r14,%r15,%r16
+ SH3ADDO,NSV %r14,%r15,%r16
+
+ SHD %r3,%r2,15,%r0
+ SHD,<> %r3,%r2,15,%r0
+
+ SHLADD %r1,2,%r3,%r6
+ SHLADD,TSV %r1,2,%r3,%r6
+ SHLADD,L %r1,2,%r3,%r6
+ SHLADD,= %r1,2,%r3,%r6
+ SHLADD,< %r1,2,%r3,%r6
+ SHLADD,<= %r1,2,%r3,%r6
+ SHLADD,NUV %r1,2,%r3,%r6
+ SHLADD,ZNV %r1,2,%r3,%r6
+ SHLADD,SV %r1,2,%r3,%r6
+ SHLADD,OD %r1,2,%r3,%r6
+ SHLADD,TR %r1,2,%r3,%r6
+ SHLADD,<> %r1,2,%r3,%r6
+ SHLADD,>= %r1,2,%r3,%r6
+ SHLADD,> %r1,2,%r3,%r6
+ SHLADD,UV %r1,2,%r3,%r6
+ SHLADD,VNZ %r1,2,%r3,%r6
+ SHLADD,NSV %r1,2,%r3,%r6
+ SHLADD,EV %r1,2,%r3,%r6
+
+ SHRPW %r1,%r2,1,%r3
+
+ SPOP0,0,35
+
+ SPOP1,3,35 %r6
+
+ SPOP2,3,35 %r6
+
+ SPOP3,3,35 %r6,%r7
+
+ SSM 127,%r1
+
+ STB %r0,8(%sr1,%r3)
+ STB,BC %r0,8(%sr1,%r3)
+ STB,SL %r0,8(%sr1,%r3)
+
+ STBS %r0,8(%sr1,%r3)
+ STBS,BC %r0,8(%sr1,%r3)
+ STBS,SL %r0,8(%sr1,%r3)
+
+ STBY %r7,6(%sr1,%r30)
+ STBY,B %r7,6(%sr1,%r30)
+ STBY,E %r7,6(%sr1,%r30)
+ STBY,M %r7,6(%sr1,%r30)
+ STBY,B,BC %r7,6(%sr1,%r30)
+ STBY,E,SL %r7,6(%sr1,%r30)
+
+ STBYS %r7,6(%sr1,%r30)
+ STBYS,B,M %r7,6(%sr1,%r30)
+ STBYS,E,M %r7,6(%sr1,%r30)
+ STBYS,M %r7,6(%sr1,%r30)
+ STBYS,B,BC %r7,6(%sr1,%r30)
+ STBYS,E,SL %r7,6(%sr1,%r30)
+
+ ; PA2.0 opcodes:
+ STD %r18,0(%sr3,%r29)
+
+ STH %r18,0(%sr3,%r29)
+
+ STHS %r18,0(%sr3,%r29)
+
+ STW %r17,3(0,%r1)
+
+ STWA %r16,0(%r6)
+
+ STWM %r16,0x7fff(%r6)
+
+ STWAS,MA %r16,2(%r6)
+
+ STWS %r16,0(%r6)
+
+ SUB %r1,%r0,%r3
+ SUB,B %r1,%r0,%r3
+ SUB,DB %r1,%r0,%r3
+ SUB,TC %r1,%r0,%r3
+ SUB,TSV %r1,%r0,%r3
+ SUB,TSV,TC %r1,%r0,%r3
+ SUB,B,TSV %r1,%r0,%r3
+ SUB,B,TSV,< %r1,%r0,%r3
+
+ SUBB %r8,%r9,%r10
+ SUBB,<<= %r8,%r9,%r10
+ SUBB,>>= %r8,%r9,%r10
+ SUBB,NSV %r8,%r9,%r10
+
+ SUBBO %r8,%r9,%r10
+ SUBBO,<<= %r8,%r9,%r10
+ SUBBO,>>= %r8,%r9,%r10
+ SUBBO,NSV %r8,%r9,%r10
+
+ SUBI 9,%r3,%r5
+ SUBI,TSV 2,%r3,%r5
+
+ SUBIO 5,%r27,%r26
+ SUBIO,< 5,%r27,%r26
+
+ SUBO %r8,%r9,%r10
+ SUBO,<<= %r8,%r9,%r10
+ SUBO,>>= %r8,%r9,%r10
+ SUBO,NSV %r8,%r9,%r10
+
+ SUBT %r8,%r9,%r10
+ SUBT,<= %r8,%r9,%r10
+ SUBT,>= %r8,%r9,%r10
+ SUBT,NSV %r8,%r9,%r10
+
+ SUBTO %r8,%r9,%r10
+ SUBTO,<<= %r8,%r9,%r10
+ SUBTO,>>= %r8,%r9,%r10
+ SUBTO,NSV %r8,%r9,%r10
+
+ SYNC
+
+ SYNCDMA
+
+ labelt
+ labelu
+ UADDCM %r3,%r4,%r5
+ UADDCM,TC %r3,%r4,%r5
+
+ UADDCMT %r3,%r4,%r5
+ UADDCMT,SHC %r3,%r4,%r5
+
+ UXOR %r19,%r3,%r20
+ UXOR,SHZ %r19,%r3,%r20
+
+ labelv
+ VDEP %r7,3,%r8
+ VDEP,TR %r2,3,%r8
+
+ VDEPI 7,3,%r8
+ VDEPI,= 2,3,%r8
+
+ VEXTRS %r4,30,%r4
+ VEXTRS,< %r4,30,%r4
+
+ VEXTRU %r4,30,%r4
+ VEXTRU,>= %r4,30,%r4
+
+ VSHD %r3,%r2,%r0
+ VSHD,< %r3,%r2,%r0
+
+ labelw
+ labelx
+ XMPYU %fr3,%fr4,%fr5
+
+ XOR %r0,%r1,%r2
+ XOR,TR %r0,%r1,%r2
+ XOR,>= %r0,%r1,%r2
+
+ labely
+ labelz
+ ZDEP %r18,1,2,%r2
+ ZDEP,<> %r18,2,3,%r2
+
+ ZDEPI 1,1,2,%r2
+ ZDEPI,EV 3,2,3,%r2
+
+ ZVDEP %r18,30,%r2
+ ZVDEP,< %r18,8,%r2
+
+ ZVDEPI 15,30,%r2
+ ZVDEPI,OD 8,8,%r2
+
+ .exit
+ .procend
+
+ mainend
+ .proc
+ .callinfo NO_CALLS,FRAME=0
+ .entry
+
+ NOP
+
+ .exit
+ .procend
+
+ .end
Binary files ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-t3 and gdb/testsuite/gdb.disasm/pa20w-t3 differ
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-t3.com gdb/testsuite/gdb.disasm/pa20w-t3.com
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-t3.com Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20w-t3.com Thu Jul 22 17:49:49 1999
***************
*** 0 ****
--- 1,3 ----
+ set height 0
+ set width 0
+ x/950i main
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-t3.exp gdb/testsuite/gdb.disasm/pa20w-t3.exp
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-t3.exp Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20w-t3.exp Thu Jul 22 17:49:49 1999
***************
*** 0 ****
--- 1,92 ----
+ # pa20w-t3.exp Tests gdb disassembly operations for PA2.0W code
+ #
+ if ![istarget "hppa2.0w-hp-hpux*"] {
+ verbose "Tests ignored for all but hpux hppa 2.0w based targets."
+ return
+ }
+
+ if $tracelevel {
+ strace $tracelevel
+ }
+
+ gdb_exit
+
+ set prms_id 0
+ set bug_id 0
+
+ #
+ # use this to debug:
+ #log_user 1
+
+ set testfile pa20w-t3
+ set srcfile ${srcdir}/${subdir}/pa20w-instr.s
+ set binfile ${srcdir}/${subdir}/${testfile}
+ set outfile ${srcdir}/${subdir}/${testfile}.out
+ set comfile ${srcdir}/${subdir}/${testfile}.com
+ set tmpfile ${objdir}/${subdir}/${testfile}.tmp
+ set tmp2file ${objdir}/${subdir}/${testfile}.tmp2
+ set diffile ${objdir}/${subdir}/${testfile}.dif
+ set sedfile ${srcdir}/${subdir}/pa-sed.cmd
+
+ # To build a pa 2.0 executable
+ #
+ # as -o pa20_3 pa20w-instr.s
+ # or
+ # cc -g +DA2.0W -o pa20_3 pa20w-instr.s
+ #
+ # The +DA2.0N flag doesn't seem to be needed.
+ #
+ # Don't reject if there are warnings, as we expect this warning:
+ #
+ # (Warning) At least one PA 2.0 object file (pa20w-instr.o) was detected.
+ # The linked output may not run on a PA 1.x system.
+ #
+ # and this one:
+ #
+ # /CLO/BUILD_ENV/usr/ccs/bin/ld: Unsatisfied symbols:
+ # test (code)
+ # Short (code)
+ #
+ # It's ok, we don't care. However, since we don't want addresses
+ # and the like to change, unless the binary file is deleted, we want
+ # to use the old one. So it's an element.
+ #
+ # if ![file exists $binfile] then {
+ # compile "${srcfile} -g -o ${binfile}"
+ # }
+
+ remote_exec build "rm -f ${tmpfile} ${tmp2file} ${diffile}"
+
+
+ # This non-standard start-up sequence is taken from that for
+ # the standard "gdb_start" in
+ # /CLO/Components/WDB/Src/gdb/gdb/testsuite/lib/gdb.exp
+ #
+ # We use a non-standard form because we want to pass a command file.
+ # Incidentially, this causes passing a command file to be tested
+ # by implication.
+ #
+ global GDB
+ if { [which $GDB] == 0 } {
+ perror "$GDB does not exist."
+ exit 1
+ }
+
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmpfile} $GDB -n -batch -silent -se ${binfile} -x ${comfile}"
+
+ # Remove actual addresses, which may vary.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${tmp2file} sed -f ${sedfile} ${tmpfile}"
+
+ # Should be no differences.
+ #
+ remote_exec build "${srcdir}/tools/redirect_cmd ${diffile} diff ${outfile} ${tmp2file}"
+ set exec_output [remote_exec build "wc -l ${diffile}"]
+
+ if [ regexp "^0 {0 ${diffile}" ${exec_output} ] {
+ pass "Disassembly"
+ } else {
+ fail "Disassembly"
+ }
+
+ return 0
diff -c -N ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-t3.out gdb/testsuite/gdb.disasm/pa20w-t3.out
*** ../gdb-19990719/gdb/testsuite/gdb.disasm/pa20w-t3.out Wed Dec 31 16:00:00 1969
--- gdb/testsuite/gdb.disasm/pa20w-t3.out Thu Jul 22 17:49:50 1999
***************
*** 0 ****
--- 1,950 ----
+ <main>: pdc %r5(%sr0,%r6)
+ <main+4>: pdc,m %r5(%sr0,%r6)
+ <main+8>: fdc %r5(%sr0,%r6)
+ <main+12>: fdc,m %r5(%sr0,%r6)
+ <main+16>: fic %r5(%sr0,%r6)
+ <main+20>: fic,m %r5(%sr0,%r6)
+ <main+24>: fcnv,sgl,dbl %fr4,%fr6
+ <main+28>: fneg,sgl %fr4,%fr6
+ <main+32>: fneg,sgl %fr4,%fr6
+ <main+36>: fneg,dbl %fr4,%fr6
+ <main+40>: fneg,quad %fr4,%fr6
+ <main+44>: fnegabs,sgl %fr4,%fr6
+ <main+48>: fnegabs,sgl %fr4,%fr6
+ <main+52>: fnegabs,dbl %fr4,%fr6
+ <main+56>: fnegabs,quad %fr4,%fr6
+ <main+60>: fmpyfadd,sgl %fr2,%fr4,%fr6,%fr8
+ <main+64>: fmpyfadd,sgl %fr2,%fr4,%fr6,%fr8
+ <main+68>: fmpyfadd,dbl %fr2,%fr4,%fr6,%fr8
+ <main+72>: fmpyfadd,dbl %fr2,%fr4R,%fr6,%fr8
+ <main+76>: fmpynfadd,sgl %fr2,%fr4,%fr6,%fr8
+ <main+80>: fmpynfadd,sgl %fr2,%fr4,%fr6,%fr8
+ <main+84>: fmpynfadd,dbl %fr2,%fr4,%fr6,%fr8
+ <main+88>: fmpynfadd,dbl %fr2,%fr4R,%fr6,%fr8
+ <main+92>: fcmp,sgl,true %fr2,%fr4,3
+ <main+96>: ftest 3
+ <main+100>: pmenb
+ <main+104>: pmdis
+ <main+108>: pmdis,n
+ <main+112>: mtsarcm %r5
+ <main+116>: idtlbt %r5,%r6
+ <main+120>: iitlbt %r5,%r6
+ <main+124>: fldd 0x200(%r4),%fr5
+ <main+128>: fldd,ma 0x200(%r4),%fr5
+ <main+132>: fldd,o 0(%sr0,%r4),%fr5
+ <main+136>: fldw 0x400(%r4),%fr5
+ <main+140>: fldw,ma 0x400(%r4),%fr5
+ <main+144>: fldw,mb 0x400(%r4),%fr5
+ <main+148>: fstd %fr5,0x400(%r4)
+ <main+152>: fstd,o %fr5,0(%sr0,%r4)
+ <main+156>: fstd,ma %fr5,0x400(%r4)
+ <main+160>: fstd,mb %fr5,0x400(%r4)
+ <main+164>: mixw,l %r4,%r5,%r6
+ <main+168>: mixw,l %r4,%r5,%r6
+ <main+172>: mixw,r %r4,%r5,%r6
+ <main+176>: mixh,l %r4,%r5,%r6
+ <main+180>: mixh,l %r4,%r5,%r6
+ <main+184>: mixh,r %r4,%r5,%r6
+ <main+188>: hadd %r1,%rp,%r3
+ <main+192>: hadd,us %r3,%r4,%r5
+ <main+196>: hadd,ss %r6,%r7,%r8
+ <main+200>: hsub %r1,%rp,%r3
+ <main+204>: hsub,us %r3,%r4,%r5
+ <main+208>: hsub,ss %r6,%r7,%r8
+ <main+212>: havg %r6,%r7,%r8
+ <main+216>: hshladd %r3,3,%r4,%r5
+ <main+220>: hshradd %r3,1,%r4,%r5
+ <main+224>: hshl %r3,11,%r4
+ <main+228>: hshr,s %r3,11,%r4
+ <main+232>: hshr,u %r3,11,%r4
+ <main+236>: hshr,s %r3,11,%r4
+ <main+240>: permh,1230 %r1,%r3
+ <main+244>: depdi 0xc,%sar,17,%r3
+ <main+248>: depdi,z 0xc,%sar,17,%r3
+ <main+252>: depdi,z,= 0xc,%sar,17,%r3
+ <main+256>: extrd,s,< %r3,12,13,%r4
+ <main+260>: extrd,u,= %r3,%sar,19,%r4
+ <main+264>: bb,< %r9,%sar,<labelc>
+ <main+268>: bb,>=,n %r9,0x1f,<labelc>
+ <main+272>: shrpd,>= %r5,%r6,41,%r7
+ <main+276>: shrpd,= %r1,%rp,%sar,%r3
+ <main+280>: shrpd,od %r6,%r7,%sar,%r3
+ <main+284>: bve (%r6)
+ <main+288>: bve,n (%r6)
+ <main+292>: bve,l (%r5),%r2
+ <main+296>: bve,l,push (%r5),%r2
+ <main+300>: bve,pop (%r5)
+ <main+304>: pushnom
+ <main+308>: clrbts
+ <main+312>: popbts 6
+ <main+316>: pushbts %r4
+ <main+320>: ldd %r1(%sr0,%rp),%r3
+ <main+324>: ldd,ma 0xa(%sr0,%rp),%r3
+ <main+328>: ldd,mb 0(%sr0,%rp),%r3
+ <main+332>: ldd,o 0(%sr0,%rp),%r3
+ <main+336>: ldd,ma,sl 4(%sr0,%rp),%r3
+ <main+340>: ldda %r1(%rp),%r3
+ <main+344>: ldda,ma 8(%rp),%r3
+ <main+348>: ldda,mb 0(%rp),%r3
+ <main+352>: ldda,o 0(%rp),%r3
+ <main+356>: ldda,ma,sl 8(%rp),%r3
+ <main+360>: std %r1,0(%sr0,%rp)
+ <main+364>: std,ma %r1,0xa(%sr0,%rp)
+ <main+368>: std,mb %r1,0(%sr0,%rp)
+ <main+372>: std,o %r1,0(%sr0,%rp)
+ <main+376>: std,ma,sl %r1,4(%sr0,%rp)
+ <main+380>: stda %r1,0(%rp)
+ <main+384>: stda,ma %r1,0xa(%rp)
+ <main+388>: stda,mb %r1,0(%rp)
+ <main+392>: stda,o %r1,0(%rp)
+ <main+396>: stda,ma,sl %r1,4(%rp)
+ <main+400>: ldcd %r1(%sr0,%rp),%r3
+ <main+404>: ldcd,m %r1(%sr0,%rp),%r3
+ <main+408>: ldcd,ma 0xa(%sr0,%rp),%r3
+ <main+412>: ldcd,mb 0(%sr0,%rp),%r3
+ <main+416>: ldcd,o 0(%sr0,%rp),%r3
+ <main+420>: ldcd,ma 4(%sr0,%rp),%r3
+ <main+424>: stdby,b %r1,5(%sr0,%rp)
+ <main+428>: stdby,b %r1,5(%sr0,%rp)
+ <main+432>: stdby,b,m %r1,5(%sr0,%rp)
+ <main+436>: stdby,e,m %r1,5(%sr0,%rp)
+ <main+440>: stdby,e %r1,5(%sr0,%rp)
+ <main+444>: ldd %r1(%sr0,%rp),%r3
+ <main+448>: ldd 0xa(%sr0,%rp),%r3
+ <main+452>: add %r1,%rp,%r3
+ <main+456>: add,c %r0,%r1,%rp
+ <main+460>: add,dc %r0,%r1,%rp
+ <main+464>: add,l %r1,%rp,%r3
+ <main+468>: add,tsv %r3,%r4,%r5
+ <main+472>: add,tsv,c %r3,%r4,%r5
+ <main+476>: add,tsv,dc %r3,%r4,%r5
+ <main+480>: addb,= %r25,%r26,<labelb>
+ <main+484>: addb,=,n %r25,%r26,<labelb>
+ <main+488>: addb,tr %dp,%ret0,<main>
+ <main+492>: addb,<> %dp,%ret0,<main>
+ <main+496>: addb,uv %r1,%r5,<main>
+ <main+500>: addb,>,n %r10,%r6,<labelb>
+ <main+504>: addb,nuv %r1,%r5,<main>
+ <main+508>: addb,<=,n %r10,%r6,<labelb>
+ <main+512>: add,c %ret0,%ret1,%sp
+ <main+516>: add,c,uv %ret0,%ret1,%sp
+ <main+520>: add,tsv,c %ret0,%ret1,%sp
+ <main+524>: add,tsv,c,uv %ret0,%ret1,%sp
+ <main+528>: addi 0,%rp,%r0
+ <main+532>: addi,> 1,%r3,%r0
+ <main+536>: addi,< 2,%r4,%r0
+ <main+540>: addib,>= -1,%r5,<main>
+ <main+544>: addib,<=,n 0xa,%r6,<labelb>
+ <main+548>: addib,uv -1,%r5,<main>
+ <main+552>: addib,>,n 0xa,%r6,<labelb>
+ <main+556>: addib,nuv -1,%r5,<main>
+ <main+560>: addib,<=,n 0xa,%r6,<labelb>
+ <main+564>: addil L'-0x800,%r3,%r1
+ <main+568>: addil L'0x88b8000,%r3,%r1
+ <main+572>: addi,tsv 4,%r22,%r21
+ <main+576>: addi,tsv,< 4,%r22,%r21
+ <main+580>: addi,tc 4,%r22,%r21
+ <main+584>: addi,tc,tr 4,%r22,%r21
+ <main+588>: addi,tsv,tc 0x3a6,%r25,%r24
+ <main+592>: addi,tsv,tc,<> 0x3ff,%r25,%r24
+ <main+596>: add,tsv %ret0,%ret1,%sp
+ <main+600>: add,tsv,sv %ret0,%ret1,%sp
+ <main+604>: add,l %ret0,%ret1,%sp
+ <main+608>: add,l,nsv %ret0,%ret1,%sp
+ <main+612>: and %sp,%r31,%sp
+ <main+616>: and,< %sp,%r31,%sp
+ <main+620>: andcm %r26,%dp,%ret0
+ <main+624>: andcm,> %r26,%dp,%ret0
+ <labelb>: b <labelc>
+ <labelb+4>: b,n <labelc>
+ <labelb+8>: b,gate <labelc>,%r0
+ <labelb+12>: b,l <labelb>,%r3
+ <labelb+16>: bb,< %r9,%sar,<labelc>
+ <labelb+20>: bb,>=,n %r9,0x1f,<labelc>
+ <labelb+24>: be 0x64(%sr4,%r11)
+ <labelb+28>: be,l 0(%sr4,%r11)
+ <labelb+32>: b,l <labelb>,%r3
+ <labelb+36>: b,l,n <labelb>,%r3
+ <labelb+40>: be,l 0x3038(%sr0,%r3)
+ <labelb+44>: be,l,n 0x3038(%sr0,%r3)
+ <labelb+48>: blr %r31,%r3
+ <labelb+52>: blr,n %r0,%r3
+ <labelb+56>: break 0,1
+ <labelb+60>: break 0x1f,0x3e8
+ <labelb+64>: bv %r0(%r1)
+ <labelb+68>: bv,n %r0(%r20)
+ <labelb+72>: bb,< %r3,%sar,<main>
+ <labelb+76>: bb,<,n %r3,%sar,<main>
+ <labelb+80>: bve (%r5)
+ <labelb+84>: bve,pop (%r5)
+ <labelb+88>: bve,l (%r5),%r2
+ <labelb+92>: bve,l,push (%r5),%r2
+ <labelc>: fldd 0(%sr2,%r0),%fr0
+ <labelc+4>: cldd,1,ma 1(%sr2,%r1),2
+ <labelc+8>: cldd,2,mb 9(%sr2,%r6),3
+ <labelc+12>: fldd %r3(%sr2,%r10),%fr0
+ <labelc+16>: fldd,s %r3(%sr2,%r20),%fr1
+ <labelc+20>: cldd,1,m %r3(%sr2,%sp),2
+ <labelc+24>: cldd,2,sm %r3(%sr2,%r0),3
+ <labelc+28>: fldw 0(%sr2,%r0),%fr0
+ <labelc+32>: fldw,ma 3(%sr2,%r0),%fr2R
+ <labelc+36>: cldw,2,mb 7(%sr2,%r0),3
+ <labelc+40>: fldw %r3(%sr2,%r0),%fr0
+ <labelc+44>: fldw,s %r3(%sr2,%r0),%fr1
+ <labelc+48>: fldw,m %r3(%sr2,%r0),%fr2R
+ <labelc+52>: cldw,2,sm %r3(%sr2,%r0),3
+ <labelc+56>: cmpb,< %r11,%r12,<labelc>
+ <labelc+60>: cmpclr,<> %rp,%r3,%r4
+ <labelc+64>: cmpib,<= 0,%rp,<labeld>
+ <labelc+68>: cmpib,nsv,n -0x10,%rp,<labeld>
+ <labelc+72>: cmpiclr,od 0x3e8,%r0,%r31
+ <labelc+76>: cmpb,> %r0,%rp,<labeld>
+ <labelc+80>: cmpb,>>=,n %r16,%rp,<labeld>
+ <labelc+84>: cmpb,<= %r0,%rp,<labeld>
+ <labelc+88>: cmpb,<<,n %r16,%rp,<labeld>
+ <labelc+92>: cmpclr %r11,%r12,%r13
+ <labelc+96>: cmpclr,>= %r11,%r12,%r13
+ <labelc+100>: cmpib,> 0,%rp,<labeld>
+ <labelc+104>: cmpib,>>,n -0x10,%rp,<labeld>
+ <labelc+108>: cmpib,<= 0,%rp,<labeld>
+ <labelc+112>: cmpib,<,n -0x10,%rp,<labeld>
+ <labelc+116>: cmpiclr 1,%r3,%r4
+ <labelc+120>: cmpiclr,ev 0x9d,%r3,%r4
+ <labelc+124>: fid
+ <labelc+128>: copr,7,0
+ <labelc+132>: copr,7,0xff
+ <labelc+136>: copy %r3,%r4
+ <labelc+140>: fstd %fr8,0(%sr1,%r31)
+ <labelc+144>: cstd,7,ma 11,2(%sr1,%r3)
+ <labelc+148>: cstd,4,mb 14,2(%sr1,%r3)
+ <labelc+152>: fstw %fr8,0(%sr1,%r31)
+ <labelc+156>: cstw,7,ma 11,2(%sr1,%r3)
+ <labelc+160>: cstw,4,mb 14,2(%sr1,%r3)
+ <labeld>: dcor %r3,%r4
+ <labeld+4>: dcor,i %r3,%r4
+ <labeld+8>: dcor,sbz %r4,%r5
+ <labeld+12>: dcor,shz %r4,%r6
+ <labeld+16>: dcor,sdc %r4,%r7
+ <labeld+20>: dcor,sbc %r4,%r8
+ <labeld+24>: dcor,shc %r4,%r9
+ <labeld+28>: dcor,nbz %r4,%r10
+ <labeld+32>: dcor,nhz %r4,%r11
+ <labeld+36>: dcor,ndc %r4,%r12
+ <labeld+40>: dcor,nbc %r4,%r13
+ <labeld+44>: dcor,nhc %r4,%r14
+ <labeld+48>: depw %r21,14,3,%r22
+ <labeld+52>: depw,>= %r21,14,3,%r22
+ <labeld+56>: depwi 1,14,3,%r22
+ <labeld+60>: depwi,>= 2,14,3,%r22
+ <labeld+64>: depw %r19,1,2,%r1
+ <labeld+68>: depw,z %r19,1,2,%r1
+ <labeld+72>: depw,z %r19,%sar,31,%r1
+ <labeld+76>: depw,z,< %r19,30,1,%r1
+ <labeld+80>: depwi 0xf,0,1,%rp
+ <labeld+84>: depwi,z -0x10,0,1,%rp
+ <labeld+88>: diag 0x1e240
+ <labeld+92>: ds %r1,%rp,%r3
+ <labeld+96>: ds,<> %r1,%rp,%r3
+ <labeld+100>: extrw,s %r1,3,4,%rp
+ <labeld+104>: extrw,s,od %r1,3,4,%rp
+ <labeld+108>: extrw,u %r1,3,4,%rp
+ <labeld+112>: extrw,u,ev %r1,3,4,%rp
+ <labeld+116>: extrw,s %r0,3,4,%r1
+ <labeld+120>: extrw,s %r0,3,4,%r1
+ <labeld+124>: extrw,u %r0,3,4,%r1
+ <labeld+128>: extrw,u,ev %r0,3,4,%r1
+ <labeld+132>: extrw,s,<> %r0,%sar,4,%r1
+ <labeld+136>: fabs,sgl %fr2,%fr3
+ <labeld+140>: fabs,dbl %fr2,%fr6
+ <labeld+144>: fadd,sgl %fr2,%fr4,%fr6
+ <labeld+148>: fadd,dbl %fr2,%fr4,%fr6
+ <labeld+152>: fcmp,sgl,false? %fr3,%fr2
+ <labeld+156>: fcmp,dbl,false %fr3,%fr2
+ <labeld+160>: fcmp,dbl,? %fr3,%fr2
+ <labeld+164>: fcmp,dbl,!<=> %fr3,%fr2
+ <labeld+168>: fcmp,dbl,= %fr3,%fr2
+ <labeld+172>: fcmp,dbl,=t %fr3,%fr2
+ <labeld+176>: fcmp,dbl,?= %fr3,%fr2
+ <labeld+180>: fcmp,dbl,!<> %fr3,%fr2
+ <labeld+184>: fcmp,dbl,!?>= %fr3,%fr2
+ <labeld+188>: fcmp,dbl,< %fr3,%fr2
+ <labeld+192>: fcmp,dbl,?< %fr3,%fr2
+ <labeld+196>: fcmp,dbl,!>= %fr3,%fr2
+ <labeld+200>: fcmp,dbl,!?> %fr3,%fr2
+ <labeld+204>: fcmp,dbl,<= %fr3,%fr2
+ <labeld+208>: fcmp,dbl,?<= %fr3,%fr2
+ <labeld+212>: fcmp,dbl,!> %fr3,%fr2
+ <labeld+216>: fcmp,dbl,!?<= %fr3,%fr2
+ <labeld+220>: fcmp,dbl,> %fr3,%fr2
+ <labeld+224>: fcmp,dbl,?> %fr3,%fr2
+ <labeld+228>: fcmp,dbl,!<= %fr3,%fr2
+ <labeld+232>: fcmp,dbl,!?< %fr3,%fr2
+ <labeld+236>: fcmp,dbl,>= %fr3,%fr2
+ <labeld+240>: fcmp,dbl,?>= %fr3,%fr2
+ <labeld+244>: fcmp,dbl,!< %fr3,%fr2
+ <labeld+248>: fcmp,dbl,!?= %fr3,%fr2
+ <labeld+252>: fcmp,dbl,<> %fr3,%fr2
+ <labeld+256>: fcmp,dbl,!= %fr3,%fr2
+ <labeld+260>: fcmp,dbl,!=t %fr3,%fr2
+ <labeld+264>: fcmp,dbl,!? %fr3,%fr2
+ <labeld+268>: fcmp,dbl,<=> %fr3,%fr2
+ <labeld+272>: fcmp,dbl,true? %fr3,%fr2
+ <labeld+276>: fcmp,dbl,true %fr3,%fr2
+ <labeld+280>: fcnv,sgl,dbl %fr2,%fr4
+ <labeld+284>: fcnv,sgl,w %fr2,%fr4
+ <labeld+288>: fcnv,sgl,dw %fr2,%fr4
+ <labeld+292>: fcnv,sgl,quad %fr2,%fr4
+ <labeld+296>: fcnv,sgl,qw %fr2,%fr4
+ <labeld+300>: fcnv,w,sgl %fr2,%fr4
+ <labeld+304>: fcnv,w,dbl %fr2,%fr4
+ <labeld+308>: fcnv,w,quad %fr2,%fr4
+ <labeld+312>: fcnv,dbl,sgl %fr2,%fr4
+ <labeld+316>: fcnv,dbl,w %fr2,%fr4
+ <labeld+320>: fcnv,dbl,quad %fr2,%fr4
+ <labeld+324>: fcnv,dbl,qw %fr2,%fr4
+ <labeld+328>: fcnv,quad,sgl %fr2,%fr6
+ <labeld+332>: fcnv,quad,dbl %fr2,%fr6
+ <labeld+336>: fcnv,quad,w %fr2,%fr6
+ <labeld+340>: fcnv,quad,qw %fr2,%fr6
+ <labeld+344>: fcnv,qw,sgl %fr2,%fr4
+ <labeld+348>: fcnv,qw,dbl %fr2,%fr4
+ <labeld+352>: fcnv,qw,quad %fr2,%fr4
+ <labeld+356>: fcnv,t,dbl,w %fr3,%fr4
+ <labeld+360>: fcpy,sgl %fr5,%fr6
+ <labeld+364>: fcpy,dbl %fr5,%fr6
+ <labeld+368>: fdc %r3(%sr0,%r3)
+ <labeld+372>: fdce %r0(%sr3,%r7)
+ <labeld+376>: fdce,m %r0(%sr3,%r7)
+ <labeld+380>: fdiv,dbl %fr1,%fr0,%fr2
+ <labeld+384>: fic %r4(%sr0,%r5)
+ <labeld+388>: fic,m %r4(%sr2,%r5)
+ <labeld+392>: fice %r0(%sr1,%r8)
+ <labeld+396>: fice,m %r0(%sr1,%r8)
+ <labeld+400>: diag 0x200
+ <labeld+404>: fid
+ <labeld+408>: fldd 0(%sr0,%r1),%fr1
+ <labeld+412>: fldd,ma 0xa(%sr0,%r1),%fr1
+ <labeld+416>: fldd,mb 0(%sr0,%r1),%fr1
+ <labeld+420>: fldd,o 0(%sr0,%r1),%fr1
+ <labeld+424>: fldd,ma,sl 4(%sr0,%r1),%fr1
+ <labeld+428>: fldd 0(%sr0,%r1),%fr1
+ <labeld+432>: fldd,ma 0xa(%sr0,%r1),%fr1
+ <labeld+436>: fldd,mb 0(%sr0,%r1),%fr1
+ <labeld+440>: fldd %r0(%sr0,%r1),%fr1
+ <labeld+444>: fldd,s %r10(%sr0,%r1),%fr1
+ <labeld+448>: fldd,m %r0(%sr0,%r1),%fr1
+ <labeld+452>: fldd,sm %r0(%sr0,%r1),%fr1
+ <labeld+456>: fldw %r1(%sr0,%r1),%fr1
+ <labeld+460>: fldw,ma 0xa(%sr0,%r1),%fr1
+ <labeld+464>: fldw,mb 0(%sr0,%r1),%fr1
+ <labeld+468>: fldw,o 0(%sr0,%r1),%fr1
+ <labeld+472>: fldw,ma,sl 4(%sr0,%r1),%fr1
+ <labeld+476>: fldw 1(%sr0,%r1),%fr1
+ <labeld+480>: fldw,ma 0xa(%sr0,%r1),%fr1
+ <labeld+484>: fldw,mb 0(%sr0,%r1),%fr1
+ <labeld+488>: fldw %r1(%sr0,%r1),%fr1
+ <labeld+492>: fldw,s %r10(%sr0,%r1),%fr1
+ <labeld+496>: fldw,m %r0(%sr0,%r1),%fr1
+ <labeld+500>: fldw,sm %r0(%sr0,%r1),%fr1
+ <labeld+504>: fmpy,sgl %fr6,%fr8,%fr10
+ <labeld+508>: fmpy,dbl %fr6,%fr8,%fr10
+ <labeld+512>: fmpyadd,sgl %fr16,%fr17,%fr18,%fr19,%fr20
+ <labeld+516>: fmpyadd,dbl %fr4,%fr7,%fr7,%fr5,%fr6
+ <labeld+520>: fmpyfadd,dbl %fr10,%fr11,%fr12,%fr13
+ <labeld+524>: fmpynfadd,dbl %fr10,%fr11,%fr12,%fr13
+ <labeld+528>: fmpysub,sgl %fr16,%fr17,%fr18,%fr19,%fr30
+ <labeld+532>: fneg,dbl %fr10,%fr1
+ <labeld+536>: fnegabs,sgl %fr1,%fr1
+ <labeld+540>: frnd,dbl %fr2,%fr3
+ <labeld+544>: fsqrt,sgl %fr16,%fr17
+ <labeld+548>: fstd %fr3,0(%sr0,%rp)
+ <labeld+552>: fstd,ma %fr3,8(%sr0,%rp)
+ <labeld+556>: fstd,mb %fr3,0(%sr0,%rp)
+ <labeld+560>: fstd,o %fr3,0(%sr0,%rp)
+ <labeld+564>: fstd,ma,sl %fr3,4(%sr0,%rp)
+ <labeld+568>: fstd %fr3,0(%sr0,%rp)
+ <labeld+572>: fstd,ma %fr3,8(%sr0,%rp)
+ <labeld+576>: fstd,mb %fr3,0(%sr0,%rp)
+ <labeld+580>: fstd %fr3,%r0(%sr0,%rp)
+ <labeld+584>: fstd,s %fr3,%r8(%sr0,%rp)
+ <labeld+588>: fstd,m %fr3,%r0(%sr0,%rp)
+ <labeld+592>: fstd,sm %fr3,%r0(%sr0,%rp)
+ <labeld+596>: fstw %fr3,0(%sr0,%rp)
+ <labeld+600>: fstw,ma %fr3,8(%sr0,%rp)
+ <labeld+604>: fstw,mb %fr3,0(%sr0,%rp)
+ <labeld+608>: fstw,o %fr3,0(%sr0,%rp)
+ <labeld+612>: fstw,ma,sl %fr3,4(%sr0,%rp)
+ <labeld+616>: fstw %fr3,0(%sr0,%rp)
+ <labeld+620>: fstw,ma %fr3,8(%sr0,%rp)
+ <labeld+624>: fstw,mb %fr3,0(%sr0,%rp)
+ <labeld+628>: fstw %fr3,%r0(%sr0,%rp)
+ <labeld+632>: fstw,s %fr3,%r8(%sr0,%rp)
+ <labeld+636>: fstw,m %fr3,%r0(%sr0,%rp)
+ <labeld+640>: fstw,sm %fr3,%r0(%sr0,%rp)
+ <labeld+644>: fsub,dbl %fr5,%fr2,%fr0
+ <labeld+648>: ftest
+ <labeld+652>: ftest,acc
+ <labeld+656>: ftest,acc8
+ <labeld+660>: ftest,acc6
+ <labeld+664>: ftest,acc4
+ <labeld+668>: ftest,acc2
+ <labeld+672>: ftest,rej
+ <labeld+676>: ftest,rej8
+ <labelg>: b,gate <labelg>,%r3
+ <labelg+4>: b,gate,n <labelu>,%r3
+ <labelg+8>: hadd %rp,%r3,%r4
+ <labelg+12>: dcor,i %r4,%r17
+ <labelg+16>: dcor,i,sbz %r4,%r17
+ <labelg+20>: dcor,i,shz %r4,%r17
+ <labelg+24>: dcor,i,sdc %r4,%r17
+ <labelg+28>: dcor,i,sbc %r4,%r17
+ <labelg+32>: dcor,i,shc %r4,%r17
+ <labelg+36>: dcor,i,tr %r4,%r17
+ <labelg+40>: dcor,i,nbz %r4,%r17
+ <labelg+44>: dcor,i,nhz %r4,%r17
+ <labelg+48>: dcor,i,ndc %r4,%r17
+ <labelg+52>: dcor,i,nbc %r4,%r17
+ <labelg+56>: dcor,i,nhc %r4,%r17
+ <labelg+60>: idtlbt %r1,%rp
+ <labelg+64>: iitlbt %rp,%r3
+ <labelk>: lci %r0(%sr0,%r1),%rp
+ <labelk+4>: ldb %r1(%sr0,%r1),%r1
+ <labelk+8>: ldb,ma 0xa(%sr0,%r1),%r1
+ <labelk+12>: ldb,mb 0(%sr0,%r1),%r1
+ <labelk+16>: ldb,o 0(%sr0,%r1),%r1
+ <labelk+20>: ldb,ma,sl 4(%sr0,%r1),%r1
+ <labelk+24>: ldb 1(%sr0,%r1),%r1
+ <labelk+28>: ldb,ma 0xa(%sr0,%r1),%r1
+ <labelk+32>: ldb,mb 0(%sr0,%r1),%r1
+ <labelk+36>: ldb,o 0(%sr0,%r1),%r1
+ <labelk+40>: ldb,ma,sl 4(%sr0,%r1),%r1
+ <labelk+44>: ldb %r1(%sr0,%r1),%r1
+ <labelk+48>: ldb,s %r10(%sr0,%r1),%r1
+ <labelk+52>: ldb,m %r0(%sr0,%r1),%r1
+ <labelk+56>: ldb,sm %r0(%sr0,%r1),%r1
+ <labelk+60>: ldcd 0(%sr0,%r1),%r1
+ <labelk+64>: ldcw %r1(%sr0,%r1),%r1
+ <labelk+68>: ldcw,ma 0xa(%sr0,%r1),%r1
+ <labelk+72>: ldcw,mb 0(%sr0,%r1),%r1
+ <labelk+76>: ldcw,o 0(%sr0,%r1),%r1
+ <labelk+80>: ldcw,ma,co 4(%sr0,%r1),%r1
+ <labelk+84>: ldcw 1(%sr0,%r1),%r1
+ <labelk+88>: ldcw,ma 0xa(%sr0,%r1),%r1
+ <labelk+92>: ldcw,mb 0(%sr0,%r1),%r1
+ <labelk+96>: ldcw,o 0(%sr0,%r1),%r1
+ <labelk+100>: ldcw,ma,co 4(%sr0,%r1),%r1
+ <labelk+104>: ldcw %r1(%sr0,%r1),%r1
+ <labelk+108>: ldcw,s %r3(%sr0,%r1),%r1
+ <labelk+112>: ldcw,m %r0(%sr0,%r1),%r1
+ <labelk+116>: ldcw,sm %r0(%sr0,%r1),%r1
+ <labelk+120>: ldh %r1(%sr0,%r1),%r1
+ <labelk+124>: ldh,ma 0xa(%sr0,%r1),%r1
+ <labelk+128>: ldh,mb 0(%sr0,%r1),%r1
+ <labelk+132>: ldh,o 0(%sr0,%r1),%r1
+ <labelk+136>: ldh,ma,sl 4(%sr0,%r1),%r1
+ <labelk+140>: ldh 1(%sr0,%r1),%r1
+ <labelk+144>: ldh,ma 0xa(%sr0,%r1),%r1
+ <labelk+148>: ldh,mb 0(%sr0,%r1),%r1
+ <labelk+152>: ldh,o 0(%sr0,%r1),%r1
+ <labelk+156>: ldh,ma,sl 4(%sr0,%r1),%r1
+ <labelk+160>: ldh %r1(%sr0,%r1),%r1
+ <labelk+164>: ldh,s %r10(%sr0,%r1),%r1
+ <labelk+168>: ldh,m %r0(%sr0,%r1),%r1
+ <labelk+172>: ldh,sm %r0(%sr0,%r1),%r1
+ <labelk+176>: ldil L'0x2dd0000,%r6
+ <labelk+180>: ldo 0x64(%r3),%r20
+ <labelk+184>: ldsid (%sr0,%r0),%r3
+ <labelk+188>: ldw %r1(%sr0,%r1),%r1
+ <labelk+192>: ldw,ma 0xa(%sr0,%r1),%r1
+ <labelk+196>: ldw,mb 0(%sr0,%r1),%r1
+ <labelk+200>: ldw,o 0(%sr0,%r1),%r1
+ <labelk+204>: ldw,ma,sl 4(%sr0,%r1),%r1
+ <labelk+208>: ldwa %r1(%r3),%rp
+ <labelk+212>: ldwa,ma 8(%r3),%rp
+ <labelk+216>: ldwa,mb 0(%r3),%rp
+ <labelk+220>: ldwa,o 0(%r3),%rp
+ <labelk+224>: ldwa,ma,sl 8(%r3),%rp
+ <labelk+228>: ldwa 1(%r3),%rp
+ <labelk+232>: ldwa,ma 8(%r3),%rp
+ <labelk+236>: ldwa,mb 0(%r3),%rp
+ <labelk+240>: ldwa,o 0(%r3),%rp
+ <labelk+244>: ldwa,ma,sl 8(%r3),%rp
+ <labelk+248>: ldwa %r1(%r3),%rp
+ <labelk+252>: ldwa,s %r8(%r3),%rp
+ <labelk+256>: ldwa,m %r0(%r3),%rp
+ <labelk+260>: ldwa,sm %r0(%r3),%rp
+ <labelk+264>: ldw,ma 8(%r3),%r4
+ <labelk+268>: ldw 1(%sr0,%r1),%r1
+ <labelk+272>: ldw,ma 0xa(%sr0,%r1),%r1
+ <labelk+276>: ldw,mb 0(%sr0,%r1),%r1
+ <labelk+280>: ldw,o 0(%sr0,%r1),%r1
+ <labelk+284>: ldw,ma,sl 4(%sr0,%r1),%r1
+ <labelk+288>: ldw %r1(%sr0,%r3),%rp
+ <labelk+292>: ldw,s %r8(%sr0,%r3),%rp
+ <labelk+296>: ldw,m %r0(%sr0,%r3),%rp
+ <labelk+300>: ldw,sm %r0(%sr0,%r3),%rp
+ <labelk+304>: lpa %r0(%sr0,%r3),%r19
+ <labelk+308>: lpa,m %r0(%sr2,%r3),%r19
+ <labelk+312>: mfctl %rctr,%r4
+ <labelk+316>: mfctl %pidr3,%r4
+ <labelk+320>: mfia %r25
+ <labelk+324>: mfsp %sr4,%ret1
+ <labelk+328>: mixh,l %r1,%rp,%r3
+ <labelk+332>: movb %r1,%rp,<labelk>
+ <labelk+336>: movb,n %r1,%rp,<labelk>
+ <labelk+340>: movb,>=,n %r1,%rp,<main>
+ <labelk+344>: mtctl %r0,%pcsq
+ <labelk+348>: mtsar %r3
+ <labelk+352>: mtsarcm %r7
+ <labelk+356>: mtsm %rp
+ <labelk+360>: mtsp %r19,%sr3
+ <labelk+364>: nop
+ <labelk+368>: or %r1,%r0,%r3
+ <labelk+372>: or,ev %r1,%r0,%r3
+ <labelk+376>: pdc %r0(%sr0,%r1)
+ <labelk+380>: pdc,m %r0(%sr0,%r1)
+ <labelk+384>: pdtlb %r8(%sr2,%rp)
+ <labelk+388>: pdtlb,m %r8(%sr2,%rp)
+ <labelk+392>: pdtlb,l %r8(%sr2,%rp)
+ <labelk+396>: pdtlb,l,m %r8(%sr2,%rp)
+ <labelk+400>: pdtlbe %r4(%sr1,%r21)
+ <labelk+404>: pdtlbe,m %r4(%sr1,%r21)
+ <labelk+408>: pitlb %r6(%sr0,%sp)
+ <labelk+412>: pitlb,m %r6(%sr0,%sp)
+ <labelk+416>: pitlbe %r6(%sr0,%sp)
+ <labelk+420>: pitlbe,m %r6(%sr0,%sp)
+ <labelk+424>: probe,r (%sr0,%r26),%r0,%sp
+ <labelk+428>: probe,w (%sr0,%r26),%r0,%sp
+ <labelk+432>: probei,r (%sr0,%r26),0xa,%sp
+ <labelk+436>: probei,w (%sr0,%r26),7,%sp
+ <labelk+440>: rfi
+ <labelk+444>: rfi,r
+ <labelk+448>: rfi,r
+ <labelk+452>: rsm 0x1f,%r24
+ <labelk+456>: shladd %r14,1,%r15,%r16
+ <labelk+460>: shladd,nuv %r14,1,%r15,%r16
+ <labelk+464>: shladd,znv %r14,1,%r15,%r16
+ <labelk+468>: shladd,sv %r14,1,%r15,%r16
+ <labelk+472>: shladd,uv %r14,1,%r15,%r16
+ <labelk+476>: shladd,vnz %r14,1,%r15,%r16
+ <labelk+480>: shladd,nsv %r14,1,%r15,%r16
+ <labelk+484>: shladd,l %r14,1,%r15,%r16
+ <labelk+488>: shladd,l,nuv %r14,1,%r15,%r16
+ <labelk+492>: shladd,l,znv %r14,1,%r15,%r16
+ <labelk+496>: shladd,l,sv %r14,1,%r15,%r16
+ <labelk+500>: shladd,l,uv %r14,1,%r15,%r16
+ <labelk+504>: shladd,l,vnz %r14,1,%r15,%r16
+ <labelk+508>: shladd,l,nsv %r14,1,%r15,%r16
+ <labelk+512>: shladd,tsv %r14,1,%r15,%r16
+ <labelk+516>: shladd,tsv,nuv %r14,1,%r15,%r16
+ <labelk+520>: shladd,tsv,znv %r14,1,%r15,%r16
+ <labelk+524>: shladd,tsv,sv %r14,1,%r15,%r16
+ <labelk+528>: shladd,tsv,uv %r14,1,%r15,%r16
+ <labelk+532>: shladd,tsv,vnz %r14,1,%r15,%r16
+ <labelk+536>: shladd,tsv,nsv %r14,1,%r15,%r16
+ <labelk+540>: shladd %r14,2,%r15,%r16
+ <labelk+544>: shladd,nuv %r14,2,%r15,%r16
+ <labelk+548>: shladd,znv %r14,2,%r15,%r16
+ <labelk+552>: shladd,sv %r14,2,%r15,%r16
+ <labelk+556>: shladd,uv %r14,2,%r15,%r16
+ <labelk+560>: shladd,vnz %r14,2,%r15,%r16
+ <labelk+564>: shladd,nsv %r14,2,%r15,%r16
+ <labelk+568>: shladd,l %r14,2,%r15,%r16
+ <labelk+572>: shladd,l,nuv %r14,2,%r15,%r16
+ <labelk+576>: shladd,l,znv %r14,2,%r15,%r16
+ <labelk+580>: shladd,l,sv %r14,2,%r15,%r16
+ <labelk+584>: shladd,l,uv %r14,2,%r15,%r16
+ <labelk+588>: shladd,l,vnz %r14,2,%r15,%r16
+ <labelk+592>: shladd,l,nsv %r14,2,%r15,%r16
+ <labelk+596>: shladd,tsv %r14,2,%r15,%r16
+ <labelk+600>: shladd,tsv,nuv %r14,2,%r15,%r16
+ <labelk+604>: shladd,tsv,znv %r14,2,%r15,%r16
+ <labelk+608>: shladd,tsv,sv %r14,2,%r15,%r16
+ <labelk+612>: shladd,tsv,uv %r14,2,%r15,%r16
+ <labelk+616>: shladd,tsv,vnz %r14,2,%r15,%r16
+ <labelk+620>: shladd,tsv,nsv %r14,2,%r15,%r16
+ <labelk+624>: shladd %r14,3,%r15,%r16
+ <labelk+628>: shladd,nuv %r14,3,%r15,%r16
+ <labelk+632>: shladd,znv %r14,3,%r15,%r16
+ <labelk+636>: shladd,sv %r14,3,%r15,%r16
+ <labelk+640>: shladd,uv %r14,3,%r15,%r16
+ <labelk+644>: shladd,vnz %r14,3,%r15,%r16
+ <labelk+648>: shladd,nsv %r14,3,%r15,%r16
+ <labelk+652>: shladd,l %r14,3,%r15,%r16
+ <labelk+656>: shladd,l,nuv %r14,3,%r15,%r16
+ <labelk+660>: shladd,l,znv %r14,3,%r15,%r16
+ <labelk+664>: shladd,l,sv %r14,3,%r15,%r16
+ <labelk+668>: shladd,l,uv %r14,3,%r15,%r16
+ <labelk+672>: shladd,l,vnz %r14,3,%r15,%r16
+ <labelk+676>: shladd,l,nsv %r14,3,%r15,%r16
+ <labelk+680>: shladd,tsv %r14,3,%r15,%r16
+ <labelk+684>: shladd,tsv,nuv %r14,3,%r15,%r16
+ <labelk+688>: shladd,tsv,znv %r14,3,%r15,%r16
+ <labelk+692>: shladd,tsv,sv %r14,3,%r15,%r16
+ <labelk+696>: shladd,tsv,uv %r14,3,%r15,%r16
+ <labelk+700>: shladd,tsv,vnz %r14,3,%r15,%r16
+ <labelk+704>: shladd,tsv,nsv %r14,3,%r15,%r16
+ <labelk+708>: shrpw %r3,%rp,15,%r0
+ <labelk+712>: shrpw,<> %r3,%rp,15,%r0
+ <labelk+716>: shladd %r1,2,%r3,%r6
+ <labelk+720>: shladd,tsv %r1,2,%r3,%r6
+ <labelk+724>: shladd,l %r1,2,%r3,%r6
+ <labelk+728>: shladd,= %r1,2,%r3,%r6
+ <labelk+732>: shladd,< %r1,2,%r3,%r6
+ <labelk+736>: shladd,<= %r1,2,%r3,%r6
+ <labelk+740>: shladd,nuv %r1,2,%r3,%r6
+ <labelk+744>: shladd,znv %r1,2,%r3,%r6
+ <labelk+748>: shladd,sv %r1,2,%r3,%r6
+ <labelk+752>: shladd,od %r1,2,%r3,%r6
+ <labelk+756>: shladd,tr %r1,2,%r3,%r6
+ <labelk+760>: shladd,<> %r1,2,%r3,%r6
+ <labelk+764>: shladd,>= %r1,2,%r3,%r6
+ <labelk+768>: shladd,> %r1,2,%r3,%r6
+ <labelk+772>: shladd,uv %r1,2,%r3,%r6
+ <labelk+776>: shladd,vnz %r1,2,%r3,%r6
+ <labelk+780>: shladd,nsv %r1,2,%r3,%r6
+ <labelk+784>: shladd,ev %r1,2,%r3,%r6
+ <labelk+788>: shrpw %r1,%rp,1,%r3
+ <labelk+792>: spop0,0,0x23
+ <labelk+796>: spop1,3,0x23 %r6
+ <labelk+800>: spop2,3,0x23 %r6
+ <labelk+804>: spop3,3,0x23 %r6,%r7
+ <labelk+808>: ssm 0x7f,%r1
+ <labelk+812>: stb %r0,8(%sr1,%r3)
+ <labelk+816>: stb,bc %r0,8(%sr1,%r3)
+ <labelk+820>: stb,sl %r0,8(%sr1,%r3)
+ <labelk+824>: stb %r0,8(%sr1,%r3)
+ <labelk+828>: stb,bc %r0,8(%sr1,%r3)
+ <labelk+832>: stb,sl %r0,8(%sr1,%r3)
+ <labelk+836>: stby,b %r7,6(%sr1,%sp)
+ <labelk+840>: stby,b %r7,6(%sr1,%sp)
+ <labelk+844>: stby,e %r7,6(%sr1,%sp)
+ <labelk+848>: stby,b,m %r7,6(%sr1,%sp)
+ <labelk+852>: stby,b,bc %r7,6(%sr1,%sp)
+ <labelk+856>: stby,e,sl %r7,6(%sr1,%sp)
+ <labelk+860>: stby,b %r7,6(%sr1,%sp)
+ <labelk+864>: stby,b,m %r7,6(%sr1,%sp)
+ <labelk+868>: stby,e,m %r7,6(%sr1,%sp)
+ <labelk+872>: stby,b,m %r7,6(%sr1,%sp)
+ <labelk+876>: stby,b,bc %r7,6(%sr1,%sp)
+ <labelk+880>: stby,e,sl %r7,6(%sr1,%sp)
+ <labelk+884>: std %r18,0(%sr3,%ret1)
+ <labelk+888>: sth %r18,0(%sr3,%ret1)
+ <labelk+892>: sth %r18,0(%sr3,%ret1)
+ <labelk+896>: stw %r17,3(%sr0,%r1)
+ <labelk+900>: stwa %r16,0(%r6)
+ <labelk+904>: stw,ma %r16,0(%r6)
+ <labelk+908>: stwa,ma %r16,2(%r6)
+ <labelk+912>: stw %r16,0(%sr0,%r6)
+ <labelk+916>: sub %r1,%r0,%r3
+ <labelk+920>: sub,b %r1,%r0,%r3
+ <labelk+924>: sub,db* %r1,%r0,%r3
+ <labelk+928>: sub,tc %r1,%r0,%r3
+ <labelk+932>: sub,tsv %r1,%r0,%r3
+ <labelk+936>: sub,tsv,tc %r1,%r0,%r3
+ <labelk+940>: sub,tsv,b %r1,%r0,%r3
+ <labelk+944>: sub,tsv,b,< %r1,%r0,%r3
+ <labelk+948>: sub,b %r8,%r9,%r10
+ <labelk+952>: sub,b,<<= %r8,%r9,%r10
+ <labelk+956>: sub,b,>>= %r8,%r9,%r10
+ <labelk+960>: sub,b,nsv %r8,%r9,%r10
+ <labelk+964>: sub,tsv,b %r8,%r9,%r10
+ <labelk+968>: sub,tsv,b,<<= %r8,%r9,%r10
+ <labelk+972>: sub,tsv,b,>>= %r8,%r9,%r10
+ <labelk+976>: sub,tsv,b,nsv %r8,%r9,%r10
+ <labelk+980>: subi 9,%r3,%r5
+ <labelk+984>: subio 2,%r3,%r5
+ <labelk+988>: subio 5,%dp,%r26
+ <labelk+992>: subio,< 5,%dp,%r26
+ <labelk+996>: sub,tsv %r8,%r9,%r10
+ <labelk+1000>: sub,tsv,<<= %r8,%r9,%r10
+ <labelk+1004>: sub,tsv,>>= %r8,%r9,%r10
+ <labelk+1008>: sub,tsv,nsv %r8,%r9,%r10
+ <labelk+1012>: sub,tc %r8,%r9,%r10
+ <labelk+1016>: sub,tc,<= %r8,%r9,%r10
+ <labelk+1020>: sub,tc,>= %r8,%r9,%r10
+ <labelk+1024>: sub,tc,nsv %r8,%r9,%r10
+ <labelk+1028>: sub,tsv,tc %r8,%r9,%r10
+ <labelk+1032>: sub,tsv,tc,<<= %r8,%r9,%r10
+ <labelk+1036>: sub,tsv,tc,>>= %r8,%r9,%r10
+ <labelk+1040>: sub,tsv,tc,nsv %r8,%r9,%r10
+ <labelk+1044>: sync
+ <labelk+1048>: syncdma
+ <labelu>: uaddcm %r3,%r4,%r5
+ <labelu+4>: uaddcm,tc %r3,%r4,%r5
+ <labelu+8>: uaddcm,tc %r3,%r4,%r5
+ <labelu+12>: uaddcm,tc,shc %r3,%r4,%r5
+ <labelu+16>: uxor %r19,%r3,%r20
+ <labelu+20>: uxor,shz %r19,%r3,%r20
+ <labelu+24>: depw %r7,%sar,3,%r8
+ <labelu+28>: depw,tr %rp,%sar,3,%r8
+ <labelu+32>: depwi 7,%sar,3,%r8
+ <labelu+36>: depwi,= 2,%sar,3,%r8
+ <labelu+40>: extrw,s %r4,%sar,30,%r4
+ <labelu+44>: extrw,s,< %r4,%sar,30,%r4
+ <labelu+48>: extrw,u %r4,%sar,30,%r4
+ <labelu+52>: extrw,u,>= %r4,%sar,30,%r4
+ <labelu+56>: shrpw %r3,%rp,%sar,%r0
+ <labelu+60>: shrpw,< %r3,%rp,%sar,%r0
+ <labelu+64>: xmpyu %fr3,%fr4,%fr5
+ <labelu+68>: xor %r0,%r1,%rp
+ <labelu+72>: xor,tr %r0,%r1,%rp
+ <labelu+76>: xor,>= %r0,%r1,%rp
+ <labelu+80>: depw,z %r18,1,2,%rp
+ <labelu+84>: depw,z,<> %r18,2,3,%rp
+ <labelu+88>: depwi,z 1,1,2,%rp
+ <labelu+92>: depwi,z,ev 3,2,3,%rp
+ <labelu+96>: depw,z %r18,%sar,30,%rp
+ <labelu+100>: depw,z,< %r18,%sar,8,%rp
+ <labelu+104>: depwi,z 0xf,%sar,30,%rp
+ <labelu+108>: depwi,z,od 8,%sar,8,%rp
+ <labelu+112>: fstqs %fr5,9(%sr0,%r4)
+ <labelu+116>: fldw,ma 3(%sr2,%r0),%fr10R
+ <labelu+120>: fadd,sgl %fr30,%fr30R,%fr31R
+ <labelu+124>: fadd,dbl %fr29,%fr30,%fr31
+ <labelu+128>: fadd,dbl %fr2,%fr4,%fr8
+ <mainend>: nop
+ <__d_shl_get>: std %rp,-0x10(%sp)
+ <__d_shl_get+4>: std,ma %r3,0x70(%sp)
+ <__d_shl_get+8>: copy %ret1,%r3
+ <__d_shl_get+12>: std %dp,-0x68(%sp)
+ <__d_shl_get+16>: nop
+ <__d_shl_get+20>: std %r26,-0x40(%ret1)
+ <__d_shl_get+24>: std %r25,-0x38(%ret1)
+ <__d_shl_get+28>: std %r24,-0x30(%ret1)
+ <__d_shl_get+32>: sth %r23,-0x22(%ret1)
+ <__d_shl_get+36>: std %r22,-0x20(%ret1)
+ <__d_shl_get+40>: std %r21,-0x18(%ret1)
+ <__d_shl_get+44>: std %r20,-0x10(%ret1)
+ <__d_shl_get+48>: std %r19,-8(%ret1)
+ <__d_shl_get+52>: ldd -0x40(%ret1),%r31
+ <__d_shl_get+56>: addil L'-0x800,%dp,%r1
+ <__d_shl_get+60>: ldd 0x768(%r1),%r19
+ <__d_shl_get+64>: shladd %r31,3,%r19,%r19
+ <__d_shl_get+68>: ldd 0(%r19),%r19
+ <__d_shl_get+72>: ldd -0x38(%ret1),%r26
+ <__d_shl_get+76>: ldd -0x30(%ret1),%r25
+ <__d_shl_get+80>: ldh -0x22(%ret1),%r20
+ <__d_shl_get+84>: extrw,s %r20,31,16,%r24
+ <__d_shl_get+88>: ldd -0x20(%ret1),%r23
+ <__d_shl_get+92>: ldd -0x18(%ret1),%r22
+ <__d_shl_get+96>: ldd -0x10(%ret1),%r21
+ <__d_shl_get+100>: ldd -8(%ret1),%r20
+ <__d_shl_get+104>: ldo -0x10(%sp),%ret1
+ <__d_shl_get+108>: ldd 0x10(%r19),%rp
+ <__d_shl_get+112>: bve,l (%rp),%r2
+ <__d_shl_get+116>: ldd 0x18(%r19),%dp
+ <__d_shl_get+120>: ldd -0x68(%sp),%dp
+ <__d_shl_get+124>: stw %ret0,-0x58(%sp)
+ <__d_shl_get+128>: ldw -0x58(%sp),%ret0
+ <__d_shl_get+132>: ldd -0x80(%sp),%rp
+ <__d_shl_get+136>: bve (%rp)
+ <__d_shl_get+140>: ldd,mb -0x70(%sp),%r3
+ <__d_plt_call>: std %rp,-0x10(%sp)
+ <__d_plt_call+4>: std,ma %r3,0x60(%sp)
+ <__d_plt_call+8>: copy %ret1,%r3
+ <__d_plt_call+12>: std %dp,-0x58(%sp)
+ <__d_plt_call+16>: nop
+ <__d_plt_call+20>: addil L'-0x800,%dp,%r1
+ <__d_plt_call+24>: ldd 0x770(%r1),%r19
+ <__d_plt_call+28>: ldd 0(%r19),%r19
+ <__d_plt_call+32>: ldo -0x10(%sp),%ret1
+ <__d_plt_call+36>: ldd 0x10(%r19),%r20
+ <__d_plt_call+40>: bve,l (%r20),%r2
+ <__d_plt_call+44>: ldd 0x18(%r19),%dp
+ <__d_plt_call+48>: ldd -0x58(%sp),%dp
+ <__d_plt_call+52>: depd,z %ret0,63,32,%ret0
+ <__d_plt_call+56>: ldd -0x70(%sp),%rp
+ <__d_plt_call+60>: bve (%rp)
+ <__d_plt_call+64>: ldd,mb -0x60(%sp),%r3
+ <__d_plt_call+68>: break 0,0
+ <__d_eh_break>: std,ma %r3,0x10(%sp)
+ <__d_eh_break+4>: copy %ret1,%r3
+ <__d_eh_break+8>: nop
+ <__d_eh_break+12>: stw %r26,-0x3c(%ret1)
+ <__d_eh_break+16>: std %r25,-0x38(%ret1)
+ <__d_eh_break+20>: stw %r24,-0x2c(%ret1)
+ <__d_eh_break+24>: bve (%rp)
+ <__d_eh_break+28>: ldd,mb -0x10(%sp),%r3
+ <__d_eh_notify_callback>: std %rp,-0x10(%sp)
+ <__d_eh_notify_callback+4>: std,ma %r3,0x70(%sp)
+ <__d_eh_notify_callback+8>: std %r4,-0x68(%sp)
+ <__d_eh_notify_callback+12>: copy %ret1,%r3
+ <__d_eh_notify_callback+16>: std %dp,-0x60(%sp)
+ <__d_eh_notify_callback+20>: nop
+ <__d_eh_notify_callback+24>: copy %ret1,%r4
+ <__d_eh_notify_callback+28>: stw %r26,-0x3c(%r4)
+ <__d_eh_notify_callback+32>: std %r25,-0x38(%r4)
+ <__d_eh_notify_callback+36>: stw %r24,-0x2c(%r4)
+ <__d_eh_notify_callback+40>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+44>: ldd 0x778(%r1),%r19
+ <__d_eh_notify_callback+48>: ldw 0(%r19),%r19
+ <__d_eh_notify_callback+52>: cmpib,<>,n 0,%r19,<__d_eh_notify_callback+68>
+ <__d_eh_notify_callback+56>: b <__d_eh_notify_callback+284>
+ <__d_eh_notify_callback+60>: ldi 0,%ret0
+ <__d_eh_notify_callback+64>: b,n <__d_eh_notify_callback+268>
+ <__d_eh_notify_callback+68>: ldo -0x10(%sp),%ret1
+ <__d_eh_notify_callback+72>: b,l <__d_getpid>,%r2
+ <__d_eh_notify_callback+76>: nop
+ <__d_eh_notify_callback+80>: ldd -0x60(%sp),%dp
+ <__d_eh_notify_callback+84>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+88>: copy %r1,%r19
+ <__d_eh_notify_callback+92>: ldd 0x778(%r19),%r19
+ <__d_eh_notify_callback+96>: ldw 0(%r19),%r19
+ <__d_eh_notify_callback+100>: cmpb,=,n %ret0,%r19,<__d_eh_notify_callback+132>
+ <__d_eh_notify_callback+104>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+108>: copy %r1,%ret0
+ <__d_eh_notify_callback+112>: ldd 0x778(%ret0),%r19
+ <__d_eh_notify_callback+116>: stw %r0,0(%r19)
+ <__d_eh_notify_callback+120>: b <__d_eh_notify_callback+284>
+ <__d_eh_notify_callback+124>: ldi 0,%ret0
+ <__d_eh_notify_callback+128>: b,n <__d_eh_notify_callback+268>
+ <__d_eh_notify_callback+132>: ldw -0x3c(%r4),%r19
+ <__d_eh_notify_callback+136>: cmpib,=,n 1,%r19,<__d_eh_notify_callback+204>
+ <__d_eh_notify_callback+140>: cmpib,=,n 0,%r19,<__d_eh_notify_callback+148>
+ <__d_eh_notify_callback+144>: b,n <__d_eh_notify_callback+260>
+ <__d_eh_notify_callback+148>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+152>: copy %r1,%r19
+ <__d_eh_notify_callback+156>: ldd 0x780(%r19),%r19
+ <__d_eh_notify_callback+160>: ldw 0(%r19),%r19
+ <__d_eh_notify_callback+164>: cmpib,=,n 0,%r19,<__d_eh_notify_callback+200>
+ <__d_eh_notify_callback+168>: ldw -0x3c(%r4),%r19
+ <__d_eh_notify_callback+172>: ldd -0x38(%r4),%r20
+ <__d_eh_notify_callback+176>: ldw -0x2c(%r4),%r24
+ <__d_eh_notify_callback+180>: copy %r19,%r26
+ <__d_eh_notify_callback+184>: copy %r20,%r25
+ <__d_eh_notify_callback+188>: b,l <__d_eh_break>,%r2
+ <__d_eh_notify_callback+192>: ldo -0x10(%sp),%ret1
+ <__d_eh_notify_callback+196>: ldd -0x60(%sp),%dp
+ <__d_eh_notify_callback+200>: b,n <__d_eh_notify_callback+268>
+ <__d_eh_notify_callback+204>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+208>: copy %r1,%r19
+ <__d_eh_notify_callback+212>: ldd 0x788(%r19),%r19
+ <__d_eh_notify_callback+216>: ldw 0(%r19),%r19
+ <__d_eh_notify_callback+220>: cmpib,=,n 0,%r19,<__d_eh_notify_callback+256>
+ <__d_eh_notify_callback+224>: ldw -0x3c(%r4),%r19
+ <__d_eh_notify_callback+228>: ldd -0x38(%r4),%r20
+ <__d_eh_notify_callback+232>: ldw -0x2c(%r4),%r24
+ <__d_eh_notify_callback+236>: copy %r19,%r26
+ <__d_eh_notify_callback+240>: copy %r20,%r25
+ <__d_eh_notify_callback+244>: b,l <__d_eh_break>,%r2
+ <__d_eh_notify_callback+248>: ldo -0x10(%sp),%ret1
+ <__d_eh_notify_callback+252>: ldd -0x60(%sp),%dp
+ <__d_eh_notify_callback+256>: b,n <__d_eh_notify_callback+268>
+ <__d_eh_notify_callback+260>: b <__d_eh_notify_callback+268>
+ <__d_eh_notify_callback+264>: nop
+ <__d_eh_notify_callback+268>: addil L'-0x800,%dp,%r1
+ <__d_eh_notify_callback+272>: copy %r1,%r19
+ <__d_eh_notify_callback+276>: ldd 0x790(%r19),%r19
+ <__d_eh_notify_callback+280>: ldw 0(%r19),%ret0
+ <__d_eh_notify_callback+284>: ldd -0x80(%sp),%rp
+ <__d_eh_notify_callback+288>: ldd -0x68(%sp),%r4
+ <__d_eh_notify_callback+292>: bve (%rp)
+ <__d_eh_notify_callback+296>: ldd,mb -0x70(%sp),%r3
+ <__d_eh_notify_callback+300>: break 0,0
+ <_end_>: std,ma %r3,0x30(%sp)
+ <_end_+4>: copy %ret1,%r3
+ <_end_+8>: nop
+ <_end_+12>: ldi 1,%r19
+ <_end_+16>: std %r19,-0x18(%sp)
+ <_end_+20>: bve (%rp)
+ <_end_+24>: ldd,mb -0x30(%sp),%r3
+ <_end_+28>: break 0,0
+ <__d_ldsp>: bve (%r1)
+ <__d_ldsp+4>: nop
+ <__d_ldsp+8>: break 4,8
+ <__d_getpid>: copy %r22,%ret0
+ <__d_getpid+4>: copy %dp,%r22
+ <__d_getpid+8>: addil L'-0x800,%dp,%r1
+ <__d_getpid+12>: ldd 0x748(%r1),%r1
+ <__d_getpid+16>: ldd 0(%sr0,%r1),%r1
+ <__d_getpid+20>: copy %r22,%dp
+ <__d_getpid+24>: ldi 0x14,%r22
+ <__d_getpid+28>: shladd,l %r22,3,%r1,%r1
+ <__d_getpid+32>: ldd 0(%sr0,%r1),%r1
+ <__d_getpid+36>: be,l 0(%sr4,%r1)
+ <__d_getpid+40>: nop
+ <__d_getpid+44>: bve (%rp)
+ <__d_getpid+48>: nop
+ <__wdb_call_dummy>: nop
+ <__wdb_call_dummy+4>: nop
+ <__wdb_call_dummy+8>: nop
+ <__wdb_call_dummy+12>: nop
+ <__wdb_call_dummy+16>: nop
+ <__wdb_call_dummy+20>: nop
+ <__wdb_call_dummy+24>: nop
+ <__wdb_call_dummy+28>: nop
+ <__wdb_call_dummy+32>: nop
+ <__wdb_call_dummy+36>: nop
+ <__wdb_call_dummy+40>: nop
+ <__wdb_call_dummy+44>: nop
+ <__wdb_call_dummy+48>: nop
+ <__wdb_call_dummy+52>: nop
+ <__wdb_call_dummy+56>: nop
+ <__wdb_call_dummy+60>: nop
+ <__wdb_call_dummy+64>: nop
+ <__wdb_call_dummy+68>: nop
+ <__wdb_call_dummy+72>: nop
+ <__wdb_call_dummy+76>: nop
+ <__wdb_call_dummy+80>: nop
+ <__wdb_call_dummy+84>: nop
+ <__wdb_call_dummy+88>: nop
+ <__wdb_call_dummy+92>: nop
+ <__wdb_call_dummy+96>: nop
+ <__wdb_call_dummy+100>: nop
+ <__wdb_call_dummy+104>: nop
+ <__wdb_call_dummy+108>: nop
+ <__wdb_call_dummy+112>: nop
+ <__wdb_call_dummy+116>: nop
+ <__wdb_call_dummy+120>: nop
+ <__wdb_call_dummy+124>: nop
+ <__wdb_call_dummy+128>: nop
+ <__wdb_call_dummy+132>: nop
+ <__wdb_call_dummy+136>: nop
+ <__wdb_call_dummy+140>: nop
+ <__wdb_call_dummy+144>: nop
+ <__wdb_call_dummy+148>: nop
+ <__wdb_call_dummy+152>: nop
+ <__wdb_call_dummy+156>: nop
+ <__wdb_call_dummy+160>: nop
+ <__wdb_call_dummy+164>: nop
+ <__wdb_call_dummy+168>: nop
+ <__wdb_call_dummy+172>: nop
+ <__wdb_call_dummy+176>: nop
+ <__wdb_call_dummy+180>: nop
+ <__wdb_call_dummy+184>: nop
+ <__wdb_call_dummy+188>: nop
+ <__wdb_call_dummy+192>: nop
+ <__wdb_call_dummy+196>: nop
+ <__wdb_call_dummy+200>: nop
+ <__wdb_call_dummy+204>: nop
+ <__wdb_call_dummy+208>: nop
+ <__wdb_call_dummy+212>: nop
+ <__wdb_call_dummy+216>: nop
+ <__wdb_call_dummy+220>: nop
+ <__wdb_call_dummy+224>: nop
+ <__wdb_call_dummy+228>: nop
+ <__wdb_call_dummy+232>: nop
+ <__wdb_call_dummy+236>: nop
+ <__wdb_call_dummy+240>: nop
+ <__wdb_call_dummy+244>: nop
+ <__wdb_call_dummy+248>: nop
+ <__wdb_call_dummy+252>: nop
+ <__wdb_call_dummy+256>: nop
+ <__wdb_call_dummy+260>: nop
+ <__wdb_call_dummy+264>: nop
+ <__wdb_call_dummy+268>: nop
+ <__wdb_call_dummy+272>: nop
+ <__wdb_call_dummy+276>: nop
+ <__wdb_call_dummy+280>: nop
+ <__wdb_call_dummy+284>: nop
+ <__wdb_call_dummy+288>: nop
+ <__wdb_call_dummy+292>: nop
+ <__wdb_call_dummy+296>: nop
+ <__wdb_call_dummy+300>: nop
+ <__wdb_call_dummy+304>: nop
+ <__wdb_call_dummy+308>: nop
+ <__wdb_call_dummy+312>: nop
+ <__wdb_call_dummy+316>: nop
+ <__wdb_call_dummy+320>: nop
+ <__wdb_call_dummy+324>: nop