gdb and binutils branch gdb-7.8-branch updated. 02350eddb14a719e4c53a1fc93e3f5fd1e762504

[palves at sourceware dot org]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "gdb and binutils".

The branch, gdb-7.8-branch has been updated
       via  02350eddb14a719e4c53a1fc93e3f5fd1e762504 (commit)
      from  45e9b677bd79b001548b15921adf6bd1962562c0 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=02350eddb14a719e4c53a1fc93e3f5fd1e762504

commit 02350eddb14a719e4c53a1fc93e3f5fd1e762504
Author: Pedro Alves <palves@redhat.com>
Date:   Mon Jun 23 16:57:25 2014 +0100

    x86 Linux watchpoints: Couldn't write debug register: Invalid argument.
    
    This patch fixes this on x86 Linux:
    
     (gdb) watch *buf@2
     Hardware watchpoint 8: *buf@2
     (gdb) si
     0x00000000004005a7      34        for (i = 0; i < 100000; i++); /* stepi line */
     (gdb) del
     Delete all breakpoints? (y or n) y
     (gdb) watch *(buf+1)@1
     Hardware watchpoint 9: *(buf+1)@1
     (gdb) si
     0x00000000004005a7 in main () at ../../../src/gdb/testsuite/gdb.base/watchpoint-reuse-slot.c:34
     34        for (i = 0; i < 100000; i++); /* stepi line */
     Couldn't write debug register: Invalid argument.
     (gdb)
    
    In the example above the debug registers are being switched from this
    state:
    
            CONTROL (DR7): 0000000000050101          STATUS (DR6): 0000000000000000
            DR0: addr=0x0000000000601040, ref.count=1  DR1: addr=0x0000000000000000, ref.count=0
            DR2: addr=0x0000000000000000, ref.count=0  DR3: addr=0x0000000000000000, ref.count=0
    
    to this:
    
            CONTROL (DR7): 0000000000010101          STATUS (DR6): 0000000000000000
            DR0: addr=0x0000000000601041, ref.count=1  DR1: addr=0x0000000000000000, ref.count=0
            DR2: addr=0x0000000000000000, ref.count=0  DR3: addr=0x0000000000000000, ref.count=0
    
    That is, before, DR7 was setup for watching a 2 byte region starting
    at what's in DR0 (0x601040).
    
    And after, DR7 is setup for watching a 1 byte region starting at
    what's in DR0 (0x601041).
    
    We always write DR0..DR3 before DR7, because if we enable a slot's
    bits in DR7, you need to have already written the corresponding
    DR0..DR3 registers -- the kernel rejects the DR7 write with EINVAL
    otherwise.
    
    The error shown above is the opposite scenario.  When we try to write
    0x601041 to DR0, DR7's bits still indicate intent of watching a 2-byte
    region.  That DR0/DR7 combination is invalid, because 0x601041 is
    unaligned.  To watch two bytes, we'd have to use two slots.  So the
    kernel errors out with EINVAL.
    
    Fix this by always first clearing DR7, then writing DR0..DR3, and then
    setting DR7's bits.
    
    A little optimization -- if we're disabling the last watchpoint, then
    we can clear DR7 just once.  The changes to nat/i386-dregs.c make that
    easier to detect, and as bonus, they make it a little easier to make
    sense of DR7 in the debug logs, as we no longer need to remember we're
    seeing stale bits.
    
    Tested on x86_64 Fedora 20, native and GDBserver.
    
    This adds an exhaustive test that switches between many different
    combinations of watchpoint types and addresses and widths.
    
    gdb/
    2014-06-23  Pedro Alves  <palves@redhat.com>
    
    	* amd64-linux-nat.c (amd64_linux_prepare_to_resume): Clear
    	DR_CONTROL before setting DR0..DR3.
    	* i386-linux-nat.c (i386_linux_prepare_to_resume): Likewise.
    	* i386-nat.c (i386_remove_aligned_watchpoint): Clear all bits of
    	DR_CONTROL related to the debug register slot being disabled.  If
    	all slots are vacant, clear local slowdown as well, and assert
    	DR_CONTROL is 0.
    
    gdb/gdbserver/
    2014-06-23  Pedro Alves  <palves@redhat.com>
    
    	* linux-x86-low.c (x86_linux_prepare_to_resume): Clear DR_CONTROL
    	before setting DR0..DR3.
    	* i386-low.c (i386_remove_aligned_watchpoint): Clear all bits of
    	DR_CONTROL related to the debug register slot being disabled.  If
    	all slots are vacant, clear local slowdown as well, and assert
    	DR_CONTROL is 0.
    
    gdb/testsuite/
    2014-06-23  Pedro Alves  <palves@redhat.com>
    
    	* gdb.base/watchpoint-reuse-slot.c: New file.
    	* gdb.base/watchpoint-reuse-slot.exp: New file.

-----------------------------------------------------------------------

Summary of changes:
 gdb/ChangeLog                                    |   10 ++
 gdb/amd64-linux-nat.c                            |   10 +-
 gdb/gdbserver/ChangeLog                          |    9 +
 gdb/gdbserver/i386-low.c                         |   20 +++
 gdb/gdbserver/linux-x86-low.c                    |    5 +-
 gdb/i386-linux-nat.c                             |    5 +-
 gdb/i386-nat.c                                   |   20 +++
 gdb/testsuite/ChangeLog                          |    5 +
 gdb/testsuite/gdb.base/watchpoint-reuse-slot.c   |   37 +++++
 gdb/testsuite/gdb.base/watchpoint-reuse-slot.exp |  187 ++++++++++++++++++++++
 10 files changed, 305 insertions(+), 3 deletions(-)
 create mode 100644 gdb/testsuite/gdb.base/watchpoint-reuse-slot.c
 create mode 100644 gdb/testsuite/gdb.base/watchpoint-reuse-slot.exp


hooks/post-receive
-- 
gdb and binutils