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src/sim/v850 ChangeLog interp.c v850-dc v850.igen
- From: nickc at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 10 Jan 2013 09:57:03 -0000
- Subject: src/sim/v850 ChangeLog interp.c v850-dc v850.igen
CVSROOT: /cvs/src
Module name: src
Changes by: nickc@sourceware.org 2013-01-10 09:57:03
Modified files:
sim/v850 : ChangeLog interp.c v850-dc v850.igen
Log message:
* interp.c (sim_open): Add support for bfd_arch_v850_rh850
architecture type. Add support for bfd_mach_v850e2 and
bfd_mach_v850e2v3 machine numbers.
* v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
(cmpf.d): Correct order of operands.
(cmpf.s): Likewise.
(trncf.dul): New pattern.
(trncf.duw): New pattern.
(trncf.sul): New pattern.
(trncf.suw): New pattern.
* v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/v850/ChangeLog.diff?cvsroot=src&r1=1.52&r2=1.53
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/v850/interp.c.diff?cvsroot=src&r1=1.7&r2=1.8
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/v850/v850-dc.diff?cvsroot=src&r1=1.4&r2=1.5
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/v850/v850.igen.diff?cvsroot=src&r1=1.11&r2=1.12