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src/sim/bfin ChangeLog dv-bfin_cec.h dv-bfin_c ...
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 25 May 2011 12:54:20 -0000
- Subject: src/sim/bfin ChangeLog dv-bfin_cec.h dv-bfin_c ...
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2011-05-25 12:54:19
Modified files:
sim/bfin : ChangeLog dv-bfin_cec.h dv-bfin_ctimer.h
dv-bfin_dma.h dv-bfin_dmac.h dv-bfin_ebiu_amc.h
dv-bfin_ebiu_ddrc.h dv-bfin_ebiu_sdc.h
dv-bfin_emac.h dv-bfin_eppi.h dv-bfin_evt.h
dv-bfin_gpio.h dv-bfin_gptimer.h dv-bfin_jtag.h
dv-bfin_mmu.h dv-bfin_nfc.h dv-bfin_otp.h
dv-bfin_pfmon.h dv-bfin_pll.h dv-bfin_ppi.h
dv-bfin_rtc.h dv-bfin_sic.h dv-bfin_spi.h
dv-bfin_trace.h dv-bfin_twi.h dv-bfin_uart.h
dv-bfin_uart2.h dv-bfin_wdog.h dv-bfin_wp.h
machs.c machs.h
Log message:
sim: bfin: move model data into machs.h
Pull the model data (register addresses/sizes) out of the different model
files and into the machs.h header. The models themselves don't care about
where they're mapped, only the mach code does. This allows us to keep the
model headers from being included in the mach code which can cause issues
with model-specific names colliding. Such as when a newer device model is
created, but with incompatible register names/layouts.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.40&r2=1.41
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_cec.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_ctimer.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_dma.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_dmac.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_ebiu_amc.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_ebiu_ddrc.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_ebiu_sdc.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_emac.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_eppi.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_evt.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_gpio.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_gptimer.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_jtag.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_mmu.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_nfc.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_otp.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_pfmon.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_pll.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_ppi.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_rtc.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_sic.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_spi.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_trace.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_twi.h.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_uart.h.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_uart2.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_wdog.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_wp.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/machs.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/machs.h.diff?cvsroot=src&r1=1.1&r2=1.2