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src/sim ChangeLog configure configure.ac iq200 ...


CVSROOT:	/cvs/src
Module name:	src
Changes by:	corinna@sourceware.org	2005-03-08 08:55:34

Modified files:
	sim            : ChangeLog configure configure.ac 
Added files:
	sim/iq2000     : ChangeLog Makefile.in acconfig.h arch.c arch.h 
	                 config.in configure configure.ac cpu.c cpu.h 
	                 cpuall.h decode.c decode.h iq2000-sim.h 
	                 iq2000.c mloop.in model.c sem-switch.c sem.c 
	                 sim-if.c sim-main.h tconfig.in 

Log message:
	* iq2000: New target subdirectory.
	* configure.ac: Add iq2000 target.
	* configure: Regenerate.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/ChangeLog.diff?cvsroot=src&r1=1.46&r2=1.47
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/configure.diff?cvsroot=src&r1=1.16&r2=1.17
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/configure.ac.diff?cvsroot=src&r1=1.4&r2=1.5
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/ChangeLog.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/Makefile.in.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/acconfig.h.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/arch.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/arch.h.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/config.in.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/configure.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/configure.ac.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/cpu.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/cpu.h.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/cpuall.h.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/decode.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/decode.h.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/iq2000-sim.h.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/iq2000.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/mloop.in.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/model.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/sem-switch.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/sem.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/sim-if.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/sim-main.h.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/iq2000/tconfig.in.diff?cvsroot=src&r1=NONE&r2=1.1


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